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KR970014413A - Control device for converting digital planar image data into virtual stereoscopic image data - Google Patents

Control device for converting digital planar image data into virtual stereoscopic image data Download PDF

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Publication number
KR970014413A
KR970014413A KR1019950025318A KR19950025318A KR970014413A KR 970014413 A KR970014413 A KR 970014413A KR 1019950025318 A KR1019950025318 A KR 1019950025318A KR 19950025318 A KR19950025318 A KR 19950025318A KR 970014413 A KR970014413 A KR 970014413A
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South Korea
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image data
signal
image
counter
output
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KR1019950025318A
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Korean (ko)
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KR100345443B1 (en
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성필문
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박남은
주식회사 우보전자
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)

Abstract

본 발명은 디지탈 평면영상 데이타를 가상 입체영상 데이타로 변환하기 위한 제어장치에 관한 것으로, 영상 주파수 클럭 및 수평 동기 신호를 입력받아 카운트하는 주파수 카운터부(11); 및 상기 주파수 카운터부(11)의 출력신호와, 외부로부터 인가되는 수평 동기 신호를 각각 입력받아 소정 비트의 영상 디지틀 데이타를 제어하기 위한 신호를 출력하는 영상 제어 신호 발명부(12)를 구비하여, 보통의 2차원 일반 영상 데이타를 간단하게 구성되는 회로를 통해, 3차원의 가상 입체 영상 데이타로 실시간 변환할 수 있도록 제어할 뿐만 아니라, 기존의 영상 매체에 용이하게 적용할 수 있도록 하는 특유의 효과가 있는 것이다.The present invention relates to a control device for converting digital planar image data into virtual stereoscopic image data, comprising: a frequency counter unit (11) for receiving and counting an image frequency clock and a horizontal synchronization signal; And an image control signal invention unit 12 which receives an output signal of the frequency counter unit 11 and a horizontal synchronization signal applied from the outside, and outputs a signal for controlling a predetermined bit of image digital data. Through a simple circuit, ordinary 2D general image data can be controlled in real time to 3D virtual stereoscopic image data, and a unique effect can be easily applied to existing image media. It is.

Description

디지탈 평면영상 데이타를 가상 입체영상 데이타로 변환하기 위한 제어장치Control device for converting digital planar image data into virtual stereoscopic image data

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 디지털 평면영상 데이타를 가상 입체영상 데이타로 변환하기 위한 제어장치의 개략적인 구성을 나타낸 블럭도.1 is a block diagram showing a schematic configuration of a control device for converting digital planar image data into virtual stereoscopic image data according to the present invention.

Claims (4)

디지탈 평면영상 데이타를 가상 입체영상 데이타로 변환하기 위한 제어장치에 있어서, 영상 주파수 클럭 및 수평 동기 신호를 입력받아 카운트하는 주파수 카운트 수단(11); 및 상기 주파수 카운트 수단(11)의 출력신호와, 외부로 부터 인가되는 수평 동기 신호를 각각 입력받아 소정 비트의 영상 디지틀 데이타를 제어하기 위한 신호를 출력하는 영상 제어 신호 발생 수단(12)을 포함하는 것을 특징으로 하는 디지털 평면영상 데이타를 가상 입체영상 데이타로 변환하기 위한 제어장치.A control apparatus for converting digital planar image data into virtual stereoscopic image data, comprising: frequency counting means (11) for receiving and counting an image frequency clock and a horizontal synchronizing signal; And an image control signal generating means (12) for receiving an output signal of the frequency counting means (11) and a horizontal synchronizing signal applied from the outside, and outputting a signal for controlling a predetermined bit of image digital data. And a control device for converting digital planar image data into virtual stereoscopic image data. 제1항에 있어서, 상기 주파수 카운트 수단(11)은 수평동기신호(SYNCBLK)를 리셋신호로 하고, 영상 주파수 클럭(CLKIN)에 따라 순차적 카운트를 수행하며, 그 출력 펄스 중 어느 하나를 상기 영상 제어 신호 발생 수단(12)에 클럭 신호로 공급하는 소정 비트의 제 1카운터(51)를 포함하는 것을 특징으로 하는 디지탈 평면형상 데이타를 가상입체상영 데이타로 변환하기 위한 제어장치.2. The frequency counting means (11) according to claim 1, wherein the frequency counting means (11) uses the horizontal synchronization signal (SYNCBLK) as a reset signal, performs sequential counting according to the image frequency clock (CLKIN), and controls any one of the output pulses. And a first counter (51) having a predetermined bit supplied to the signal generating means (12) as a clock signal. 제1항 또는 제2항에 있어서, 상기 영상 제어 신호 발생 수단(12)은 상기 주파수 카운트 수단의 제1카운터(51)의 출력 펄스 중 어느 하나를 클럭으로 하고, 상기 수평동기신호(SYNCBLK)에 동기 되어 상기 영상 디지틀 데이타의 비트수만큼 순차적으로 카운트하여 웨어트별로 출력하는 제2카운터(53); 상기 수평동기신호(SYNCBLK)를 클리어 신호로 하여, 상기 제2카운터(53)의 출력에 따라 출력(Q)를 토글시키는 토글 수단(53, 54, 55); 및 상기 토글 수단(53, 54, 55)의 출력(Q)에 따라 선택적으로 상기 제2카운터(52)의 출력값을 그대로 영상 제어신호(AS1, AS2, AS3)로 출력하거나, 또는 상기 제2카운터(52)의 값을 반전시켜 영상 제어신호(AS1, AS2, AS3)로 출력하는 다수의 멀티플렉서(59, 60, 61)를 포함하는 것을 특징으로 하는 디지탈 평면영상 데이타를 가상 입체영상 데이타로 변환하기 위한 제어장치.3. The image control signal generating means (12) according to any one of claims 1 to 5, wherein the video control signal generating means (12) uses any one of the output pulses of the first counter (51) of the frequency counting means as a clock, and responds to the horizontal synchronization signal (SYNCBLK). A second counter (53) which synchronizes and sequentially counts the number of bits of the image digital data and outputs the data for each wear; Toggle means (53, 54, 55) for toggling the output (Q) in accordance with the output of the second counter (53) with the horizontal synchronization signal (SYNCBLK) as a clear signal; And selectively outputting an output value of the second counter 52 as an image control signal AS1, AS2, AS3 according to the output Q of the toggle means 53, 54, 55, or the second counter. Converting digital planar image data into virtual stereoscopic image data, comprising a plurality of multiplexers 59, 60, and 61 inverting the value of (52) and outputting the image control signals AS1, AS2, and AS3. Controls for 제3항에 있어서, 상기 토글 수단(53, 54, 55)은 상기 제2카운터(52)의 출력(A, B, C)을 모두 논리합 연산하는 논리합 게이트(53); 및 상기 논리합 게이트(53)의 출력을 클럭으로 하며, 상기 수평동기신호(SYNCBLK)를 클리어 신호로 하는 T 플립플롭(54, 55)을 포함하는 것을 특징으로 하는 디지탈 평면영상 데이타르 가상입체영상 데이타로 변환하기 위한 제어장치.4. The gate driving circuit according to claim 3, wherein the toggle means (53, 54, 55) comprises: an OR gate 53 for ORing all the outputs A, B and C of the second counter 52; And T flip-flops (54, 55) having the output of the OR gate 53 as a clock and the horizontal synchronizing signal SYNCBLK as a clear signal. Control for converting to. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950025318A 1995-08-17 1995-08-17 Controller for controlling device for converting digital two-dimensional video data into virtual stereo video data KR100345443B1 (en)

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KR1019950025318A KR100345443B1 (en) 1995-08-17 1995-08-17 Controller for controlling device for converting digital two-dimensional video data into virtual stereo video data

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Application Number Priority Date Filing Date Title
KR1019950025318A KR100345443B1 (en) 1995-08-17 1995-08-17 Controller for controlling device for converting digital two-dimensional video data into virtual stereo video data

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KR970014413A true KR970014413A (en) 1997-03-29
KR100345443B1 KR100345443B1 (en) 2002-11-21

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4855582A (en) * 1988-06-15 1989-08-08 Hewlett-Packard Company Mounting for a sapphire ball in a bar code reader wand tip
JPH03184495A (en) * 1989-12-14 1991-08-12 Nippon Hoso Kyokai <Nhk> Stereoscopic image display method
JPH05161166A (en) * 1991-12-04 1993-06-25 Sony Corp Stereoscopic video signal generator

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