KR970007802B1 - Focus balance automatic adjustment circuit - Google Patents
Focus balance automatic adjustment circuit Download PDFInfo
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- KR970007802B1 KR970007802B1 KR1019940009041A KR19940009041A KR970007802B1 KR 970007802 B1 KR970007802 B1 KR 970007802B1 KR 1019940009041 A KR1019940009041 A KR 1019940009041A KR 19940009041 A KR19940009041 A KR 19940009041A KR 970007802 B1 KR970007802 B1 KR 970007802B1
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
- G11B7/08—Disposition or mounting of heads or light sources relatively to record carriers
- G11B7/09—Disposition or mounting of heads or light sources relatively to record carriers with provision for moving the light beam or focus plane for the purpose of maintaining alignment of the light beam relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following
- G11B7/0908—Disposition or mounting of heads or light sources relatively to record carriers with provision for moving the light beam or focus plane for the purpose of maintaining alignment of the light beam relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for focusing only
- G11B7/0917—Focus-error methods other than those covered by G11B7/0909 - G11B7/0916
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
- G11B20/10046—Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
- G11B7/08—Disposition or mounting of heads or light sources relatively to record carriers
- G11B7/09—Disposition or mounting of heads or light sources relatively to record carriers with provision for moving the light beam or focus plane for the purpose of maintaining alignment of the light beam relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following
- G11B7/0941—Methods and circuits for servo gain or phase compensation during operation
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
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- Signal Processing (AREA)
- Optical Recording Or Reproduction (AREA)
Abstract
없음.none.
Description
제1도는 종래의 레이저를 이용한 디스크 플레이어의 포커스 밸런스 자동 조정회로의 블럭도이다.1 is a block diagram of a focus balance automatic adjustment circuit of a disc player using a conventional laser.
제2도는 제1도네 나타낸 신호 처리기의 회로도이다.2 is a circuit diagram of the signal processor shown in FIG.
제3도는 본 발명의 포커스 밸런스 조정회로의 블럭도이다.3 is a block diagram of a focus balance adjustment circuit of the present invention.
제4도는 제3도에 나타낸 디지탈 서보회로의 상세 블럭도이다.4 is a detailed block diagram of the digital servo circuit shown in FIG.
제5도는 RF신호의 포락선 레벨을 나타내는 그래프이다.5 is a graph showing the envelope level of the RF signal.
제6도는 제3도에 나타낸 신호 처리기의 블럭도이다.6 is a block diagram of the signal processor shown in FIG.
본 발명은 레이저를 이용한 디스크 플레이어에 관한 것으로, 특히 레이저를 이용한 디스크 플레이어의 포커스 밸런스 자동 조정회로에 관한 것이다.The present invention relates to a disc player using a laser, and more particularly to an automatic focus balance adjustment circuit of a disc player using a laser.
종래의 포커스 밸런스 자동 조정회로는 아날로그 방식으로서 포커스 에러신호를 오실로스코프상으로 보면서 가변저항으로 사용자가 수작업으로 조정을 했었다. 이러한 수작업 조정으로 인해서 조정의 정확도가 떨어지고 생산라인에서 작업시간이 많이 소요되고, 세트(SET)의 경시변화 및 신뢰성 등으로 인하여 변화되므로 세트 불량의 원인이 되었다.The conventional focus balance automatic adjustment circuit is an analog method, in which a user manually adjusts a variable resistor while viewing a focus error signal on an oscilloscope. Due to such manual adjustments, the accuracy of adjustments is reduced, a lot of work time is required in the production line, and the change is caused by the change of time and reliability of the SET, which causes a set failure.
제1도는 종래의 레이저를 이용한 디스크 플레이어의 포커스 밸런스 조정회로의 블럭도이다.1 is a block diagram of a focus balance adjustment circuit of a disc player using a conventional laser.
제1도에 있어서, 퍼커스 밸런스 조정회로는 디스크(1), 픽업장치(2), 신호 처리기(3), 아날로그 서보회로(4), 구동회로(5), 스핀들 모터(6) 및 마이크로 컴퓨터(7)로 구성되어 있다.In FIG. 1, the percussion balance adjusting circuit includes a disk 1, a pickup device 2, a signal processor 3, an analog servo circuit 4, a drive circuit 5, a spindle motor 6 and a microcomputer. It consists of (7).
제2도는 제1도에 나타낸 신호 처리기의 상세 회로도이다.FIG. 2 is a detailed circuit diagram of the signal processor shown in FIG.
제2도에 있어서, 신호 처리기는 픽업장치(2)장치의 4분할된 광 검출다이오두드(미도시)에 의해서 디스크에서 반사되는 레이저 빔을 검출하여 출력되는 합신호(-(A+C))와 합신호(-(B+D))를 감산하여 차신호 (-(A+C)+(B+D)를 출력하는 감산기의 구성을 하고 있다. 감산기는 합신호(-(B+D)를 입력하는 일측을 가진 저항(R1), 합신호(-(A+C))를 입력하는 일측을 가진 저항(R2), 상기 저항(R1)의 타측에 연결된 네거티브 입력단자와 상기 저항(R2)의 타측에 연결된 포지티브입력단자와 포커스 에러신호(FE)를 출력하는 출력단자를 가진 증폭기(10), 상기 증폭기(10)의 네거티브 입력단자와 출력단자사이에 연결된 캐패시터(C2)와 저항(R4), 상기 저항(R2)의 타측과 접지사이에 연결된 캐패시터(C1), 상기 저항(R2)의 타측에 연결된 일측을 가진 저항(R3), 상기 저항(R3)의 타측에 연결되고 전압(VCC)와 전압(VEE)사이에 연결된 가변저항(R)로 구성되어 있다.In Fig. 2, the signal processor detects and outputs a laser beam reflected from the disk by a quadrature photodetector diode (not shown) of the pickup device 2, and outputs the sum signal (-(A + C)). And a subtractor for subtracting the sum signal (-(B + D)) and outputting the difference signal (-(A + C) + (B + D). A resistor R1 having one side for inputting a resistor, a resistor R2 having one side for inputting a sum signal (-(A + C)), a negative input terminal connected to the other side of the resistor R1, and the resistor R2. An amplifier 10 having a positive input terminal connected to the other side of the output terminal and an output terminal for outputting a focus error signal FE, a capacitor C2 and a resistor R4 connected between the negative input terminal and the output terminal of the amplifier 10; A capacitor (C1) connected between the other side of the resistor (R2) and ground, a resistor (R3) having one side connected to the other side of the resistor (R2), and connected to the other side of the resistor (R3) It consists of a variable resistor (R) connected between the voltage (V CC ) and the voltage (V EE ).
따라서, 상기와 같은 구성을 가진 포커스 밸런스 조정회로는 포커스 에러신호(FE)의 변화를 오실로스코프상으로 보아가면서 사용자가 가변저항(R)의 저항값을 가변하여 포커스 밸런스를 조정하였다. 이와같이 조정을 할 경우에 사용자가 포커스 에러신호를 보면서 일일이 조정하여야 하므로 번거롭고 그 조정의 정확도가 떨어진다는 단점이 있었다. 또한, 포커스 에러신호를 입력하여 아날로그 서보회로(4)가 구동회로(5)를 구동하였다.Accordingly, the focus balance adjusting circuit having the above-described configuration adjusts the focus balance by changing the resistance value of the variable resistor R while viewing the change of the focus error signal FE on the oscilloscope. In this case, the user has to make adjustments while looking at the focus error signal, which is cumbersome and the accuracy of the adjustment is poor. In addition, the analog servo circuit 4 drives the drive circuit 5 by inputting a focus error signal.
따라서, 본 발명의 목적은 사용자가 일일이 포커스 에러신호를 보아가면서 포커스 밸런스를 조정할 필요가 없이 자동으로 포커스밸런스를 조정할 수 있는 포커스 밸런스 자동 조정회로를 제공하는데 있다.Accordingly, it is an object of the present invention to provide a focus balance automatic adjustment circuit capable of automatically adjusting the focus balance without the need for the user to adjust the focus balance while viewing the focus error signal.
이와같은 목적을 달성하기 위한 본 발명의 포커스 밸런스 자동조정회로는 데이타를 저장하고 있는 기록 매체, 상기 기록 매체로부터의 출력신호를 입력하여 포커스 에러신호를 출력하기 위한 신호 처리 수단, 상기 포커스 에러신호를 입력하여 디지탈 신호로 변환하고 RF(Radio Frequency)신호의 포락선레벨(envelope level)이 최대가 되는 점을 찾아 이 점으로 포커스 밸런스를 맞추기 위한 디지탈 서보수단, 상기 디지탈 서보수단으로부터의 데이타를 전송 받고 상기 디지탈 서보수단을 제어하기 위한 제어수단, 상기 디지탈 서보수단의 제어에 의해 기록매체를 구동하는 구동수단으로 구성되어 있다.In order to achieve the above object, the automatic focus balance adjustment circuit of the present invention provides a recording medium storing data, signal processing means for inputting an output signal from the recording medium to output a focus error signal, and outputting the focus error signal. A digital servo means for inputting and converting the digital signal into a digital signal and finding a point at which the envelope level of the RF (Radio Frequency) signal is maximized and focusing the data at this point; and receiving data from the digital servo means. And control means for controlling the digital servo means, and drive means for driving the recording medium by the control of the digital servo means.
첨부된 도면을 참고로 하여 본 발명의 포커스 밸런스 조정회로를 설명하면 다음과 같다.Referring to the accompanying drawings, a focus balance adjustment circuit of the present invention will be described.
우선, 본 발명은 RF(Radio Frequency)신호의 포락선 레벨(envelope level)이 최대가 되는 점을 찾으면 이 점이 바로 포커스 밸런스가 가장 잘 맞는 점이라는 것이다.First of all, the present invention finds the point where the envelope level of the RF (Radio Frequency) signal is maximized.
제3도는 본 발명의 포커스 밸런스 조정회로의 블럭도이다.3 is a block diagram of a focus balance adjustment circuit of the present invention.
제3도에 있어서, 포커스 밸런스 조정회로는 신호 처리기(3')의 구성은 종래의 신호 처리기의 구성과 동일하지만 포커스 밸런스 조정용 가변저항(R)이 제거되고 신호 처리기의 출력신호인 포커스 에러신호(FE)를 입력하여 디지탈적으로 신호를 처리하기 위한 디지탈 서보회로(4')가 아날로그 서보회로(4)의 위치에 구성되어 있다.3, the configuration of the signal balancer 3 'is the same as that of the conventional signal processor, but the focus error signal (the output signal of the signal processor) is removed and the variable resistor R for the focus balance is removed. The digital servo circuit 4 'for inputting FE and processing the signal digitally is configured at the position of the analog servo circuit 4.
제4도는 제3도에 나타낸 디지탈 서보회로의 상세 블럭도이다.4 is a detailed block diagram of the digital servo circuit shown in FIG.
제4도에 있어서, 디지탈 서보회로는 포커스 에러신호(FE)를 입력하여 디지탈 신호를 변환하기 위한 아날로그 디지탈 변환기(10), 상기 아날로그 디지탈 변환기(10)의 출력신호를 입력하여 마이크로 컴퓨터(7)로 부터의 이득신호에 따라 필터링하기 위한 루프 필터(20), 상기 루프 필터(20)의 출력신호를 입력하여 가변적으로 증폭하기 위한 가변이득 증폭기(30), 상기 증폭기(30)의 출력신호를 입력하여 펄스폭변조를 수행하기 위한 펄스폭 변조회로(40)으로 구성되어 있다.In FIG. 4, the digital servo circuit inputs the focus error signal FE to convert the digital signal into an analog digital converter 10 and an output signal of the analog digital converter 10 to input the microcomputer 7. A loop filter 20 for filtering in accordance with a gain signal from a loop, a variable gain amplifier 30 for amplifying and variably amplifying the output signal of the loop filter 20, and an output signal of the amplifier 30 And a pulse width modulation circuit 40 for performing pulse width modulation.
제5도는 RF신호의 포락선 레벨을 나타내는 그래프이다.5 is a graph showing the envelope level of the RF signal.
제5도에 있어서, X축은 RF최대 레벨, Y축은 렌즈 이동거리를 나타내는 것으로, 3점(-δx, Ep), (0, E0), (-δx, Ec)를 연결한 2차 곡선이 최대가 되는 x는In FIG. 5, the X-axis represents the maximum RF level and the Y-axis represents the lens moving distance, connecting three points (-δ x , E p ), (0, E 0 ), (-δ x , E c ). Where x is the quadratic curve
로 된다. It becomes
제6도는 제3도에 나타낸 신호 처리기의 블럭도이다.6 is a block diagram of the signal processor shown in FIG.
제6도에 있어서, 신호 처리기는 합신호(A+C)를 입력하여 전류를 전압으로 변환하는 전압/전류 변환 증폭기(100), 합신호(B+D)를 입력하여 전류를 전압으로 변환하는 전압/전류 변환 증폭기(200), 포커스 밸런스 제어신호에 의해서 제어되고 상기 전압/전류 변환 증폭기(100)의 출력신호를 입력하여 증폭하는 전압 제어 증폭기(300), 포커스 밸런스 제어신호에 의해서 제어되고 상기 전압/전류 변환 증폭기(200)의 출력신호를 입력하여 증폭하는 전압 제어 증폭기(400), 상기 전압 제어 증폭기(300, 400)의 출력단자에 연결된 일측을 가진 저항들(R1, R2), 상기 저항(R2)의 타측과 접지사이에 연결된 저항(R3), 상기 저항(R1)의 타측에 연결된 포지티브 입력단자와 상기 저항(R3)의 일측에 연결된 네거티브 입력단자와 포커스 에러신호를 출력하는 출력단자를 가진 증폭기(500), 상기 증폭기(500)의 포지티브 입력단자와 출력단자사이에 연결된 저항(R4)로 구성되어 있다.In FIG. 6, the signal processor inputs the sum signal A + C to convert the current into a voltage, and converts the current into a voltage by inputting the sum signal B + D. A voltage control amplifier 300 controlled by a voltage / current conversion amplifier 200 and a focus balance control signal and input and amplified by an output signal of the voltage / current conversion amplifier 100 and controlled by a focus balance control signal and A voltage control amplifier 400 for inputting and amplifying the output signal of the voltage / current conversion amplifier 200, resistors R1 and R2 having one side connected to output terminals of the voltage control amplifiers 300 and 400, and the resistance A resistor R3 connected between the other side of the R2 and ground, a positive input terminal connected to the other side of the resistor R1, a negative input terminal connected to one side of the resistor R3, and an output terminal for outputting a focus error signal. Excitation amplifier (500), phase The resistor 500 is composed of a resistor R4 connected between the positive input terminal and the output terminal of the amplifier 500.
제3도 내지 제6도를 이용하여 본 발명의 포커스 밸런스 자동조정회로의 동작을 설명하면 다음과 같다.The operation of the automatic focus balance adjustment circuit of the present invention will be described with reference to FIGS. 3 to 6 as follows.
마이크로 컴퓨터(7)로 부터 포커스 밸런스 자동 조정 명명(이득)을 받으면 RF포락선 레벨(Ec)의 값을 중점 레벨(E0)에 기억시키고 디지탈 서보회로(4')에서 포커스 밸런스 출력을 δx만큼 증가시켜서 출력하면 이 출력변화에 따라 포락선 레벨이 변화하고 이 때의 Ec를 읽고 앞의 레벨 E0에 비해서 감소했는지 안했는지를 판단한다. 만약, 증가하고 있다면0를 전번의 레빌 Ep로 이동하고 Ec를 E0에 기억시켜서 포커스 밸런스 출력을 δx만큼 더 증가시킨 후 RF포락선 레벨을 읽는다. 그래서 이 값을 바로 전의 값과 비교해서 감소할 때까지 이 동작을 반복하고 만약 감소한다면 이 사이에 최대치가 존재하므로 앞의 계산식으로 RF포락선이 최대치가 되는 x를 구한다. 만약 비교해서 처음부터 포락선 레벨이 감소하고 있으면 현재의 값 Ec를 전번의 값 Ep에 기억시키고 δx의 부호를 반전해서 RF포락선 레벨을 읽으면 레벨이 증가하는 방향이 되고 앞에서와 같이 포락선 레벨이 감소 할때까지 마이너스 방향으로 δx만큼 이동시켜서 감소하게 되면 이 사이에 최대값이 되는 위치가 존재한다는 것을 알 수 있으므로 이 상태에 앞의 계산식에 의해 위치 x를 구한 후 이 값을 디지탈 서보회로(4')의 펄스폭 변조회로(40)에서 포커스 밸런스 제어신호를 신호 처리기(3')로 포커스 밸런스 제어신호를 출력하면 신호처리기에서 입력을 받아 내부 증폭기를 조절하여 포커스 밸런스를 조절하게 된다.When the auto balance adjustment naming (gain) is received from the microcomputer 7, the value of the RF envelope level (Ec) is stored in the midpoint level (E 0 ), and the focus balance output is output by δ x in the digital servo circuit 4 '. increasing output by reading E c level of the envelope changes according to the output change, and this time it is determined whether or not that reduced compared to the previous level E 0. If it is increasing, move 0 to the previous level E p and store E c in E 0 to increase the focus balance output by δ x and read the RF envelope level. Thus, this operation is compared with the previous value, and the operation is repeated until it is decreased, and if it is decreased, the maximum value exists between these values, and thus, x is obtained by using the previous equation as the RF envelope is the maximum value. If the envelope level is decreasing from the beginning, the current value E c is stored in the previous value E p and the sign of δ x is read in order to read the RF envelope level. If it decreases by moving by δ x in the minus direction until it decreases, it can be seen that there is a maximum position between them. Therefore, after calculating the position x by the above formula, the value is converted into the digital servo circuit ( When the focus balance control signal is output from the pulse width modulation circuit 40 of 4 ') to the signal processor 3', the focus balance control signal is adjusted by receiving an input from the signal processor and controlling an internal amplifier.
따라서, 본 발명의 포커스 밸런스 자동 조정회로는 세트가 온 될때마다 반복되므로 주변환경에 의해서 세트의 특성이 변화되어 있어도 이 변화된 값만큼 항상 보상을 해주므로 기본의 아날로그 방식에 비해서 정밀도가 향상되고 자동 조정이 되므로 수작업 조정에 비해서 생산라인에서 작업이 단순화되고, 세트가 항상 최적의 상태로 조정된 후 동작을 하므로 세트의 전체 동작이 인정되고 양산 라인에서의 불량율이 감소하며 외부 부품도 감소되는 등의 효과가 있다.Therefore, since the focus balance automatic adjustment circuit of the present invention is repeated every time the set is turned on, even if the characteristic of the set is changed by the surrounding environment, it always compensates as much as the changed value, so that the accuracy is improved and the automatic adjustment is compared with the basic analog method. This simplifies the work on the production line compared to manual adjustment, and operates after the set is always adjusted to the optimal state, so the overall operation of the set is recognized, the defective rate on the production line is reduced, and external parts are reduced. There is.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940009041A KR970007802B1 (en) | 1994-04-27 | 1994-04-27 | Focus balance automatic adjustment circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940009041A KR970007802B1 (en) | 1994-04-27 | 1994-04-27 | Focus balance automatic adjustment circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR950030709A KR950030709A (en) | 1995-11-24 |
| KR970007802B1 true KR970007802B1 (en) | 1997-05-16 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019940009041A Expired - Fee Related KR970007802B1 (en) | 1994-04-27 | 1994-04-27 | Focus balance automatic adjustment circuit |
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| Country | Link |
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| KR (1) | KR970007802B1 (en) |
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- 1994-04-27 KR KR1019940009041A patent/KR970007802B1/en not_active Expired - Fee Related
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| KR950030709A (en) | 1995-11-24 |
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