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KR970006015B1 - Word deinterleave circuit - Google Patents

Word deinterleave circuit Download PDF

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Publication number
KR970006015B1
KR970006015B1 KR89018650A KR890018650A KR970006015B1 KR 970006015 B1 KR970006015 B1 KR 970006015B1 KR 89018650 A KR89018650 A KR 89018650A KR 890018650 A KR890018650 A KR 890018650A KR 970006015 B1 KR970006015 B1 KR 970006015B1
Authority
KR
South Korea
Prior art keywords
data
word
outputted
bits
memories
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
KR89018650A
Other languages
Korean (ko)
Other versions
KR910012917A (en
Inventor
Heung-Soon Lee
Original Assignee
Lg Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lg Electronics Inc filed Critical Lg Electronics Inc
Priority to KR89018650A priority Critical patent/KR970006015B1/en
Publication of KR910012917A publication Critical patent/KR910012917A/en
Application granted granted Critical
Publication of KR970006015B1 publication Critical patent/KR970006015B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

When an interleaved data is inputted in the shift register(1) under A mode, 8 bits is converted to a word to be outputted, but under B mode, 11 bits is converted to a word and the storage can be made in either one of the memories I(2,3) or(4,5). As the data is outputted from the shift register(1), one word is made of 11 bits at the maximum, four 255 bytes RAM in which 2 RAMs make a pair is used as the data memory(2,5), in case when data is inputted in the pair of data memory(2,3), the data stored in all the frames can be outputted from the other data memories(4,5), and when the data of all the frames are outputted from the data memories(2,3), the current data can be stored in the other data memory(4,5).
KR89018650A 1989-12-15 1989-12-15 Word deinterleave circuit Expired - Lifetime KR970006015B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR89018650A KR970006015B1 (en) 1989-12-15 1989-12-15 Word deinterleave circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR89018650A KR970006015B1 (en) 1989-12-15 1989-12-15 Word deinterleave circuit

Publications (2)

Publication Number Publication Date
KR910012917A KR910012917A (en) 1991-08-08
KR970006015B1 true KR970006015B1 (en) 1997-04-23

Family

ID=19292961

Family Applications (1)

Application Number Title Priority Date Filing Date
KR89018650A Expired - Lifetime KR970006015B1 (en) 1989-12-15 1989-12-15 Word deinterleave circuit

Country Status (1)

Country Link
KR (1) KR970006015B1 (en)

Also Published As

Publication number Publication date
KR910012917A (en) 1991-08-08

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A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee