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KR960042909A - Semiconductor device manufacturing method - Google Patents

Semiconductor device manufacturing method Download PDF

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Publication number
KR960042909A
KR960042909A KR1019950010733A KR19950010733A KR960042909A KR 960042909 A KR960042909 A KR 960042909A KR 1019950010733 A KR1019950010733 A KR 1019950010733A KR 19950010733 A KR19950010733 A KR 19950010733A KR 960042909 A KR960042909 A KR 960042909A
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KR
South Korea
Prior art keywords
semiconductor device
device manufacturing
forming
accuracy
job
Prior art date
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Ceased
Application number
KR1019950010733A
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Korean (ko)
Inventor
민영홍
문승찬
Original Assignee
김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950010733A priority Critical patent/KR960042909A/en
Publication of KR960042909A publication Critical patent/KR960042909A/en
Ceased legal-status Critical Current

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Abstract

본 발명은 반도체소자 제조방법에 관한 것으로, 반도체소자 제조공정중 리소그래피공정시 사용하는 잡-파일의 프로그램을 새롭게 고안한 것으로써, 종래의 비대칭적 프리얼라인 방식을 대칭적인 프리얼라인 방식으로 바꾸어 얼라인마크의 비대칭성을 보상하여 중첩정도를 개선함으로써 반도체소자의 신뢰성을 향상시킬 수 있는 기술이다.BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a method for manufacturing a semiconductor device, and by newly devising a program of a job file used in a lithography process in a semiconductor device manufacturing process, a conventional asymmetric prealign method is replaced with a symmetrical free alignment method. It is a technology that can improve the reliability of semiconductor devices by improving the degree of overlap by compensating the asymmetry of the alignment mark.

Description

반도체 소자 제조방법Semiconductor device manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명의 실시예에 따른 반도체소자 제조방법을 도시한 관계도.2 is a relationship diagram showing a method of manufacturing a semiconductor device according to an embodiment of the present invention.

Claims (3)

웨이퍼 상부에 형성된 다수의 다이에 고반사율을 갖는 금속층을 형성하고 중첩정확도를 정확하게 측정하기 위한 반도체소자 제조방법에 있어서, 노광장비에 잡-파일을 형성하되, 다수의 이.지.에이-셧이 형성하는 두개의 직선이 서로 직교하도록 형성함으로써 서로 대칭되게 형성하는 공정과, 상기 잡-파일을 이용하여 중첩정확도를 측정하는 공정을 포함하는 반도체소자 제조방법.In the semiconductor device manufacturing method for forming a metal layer having a high reflectance on a plurality of die formed on the wafer and to accurately measure the overlap accuracy, a job-pile is formed in the exposure equipment, but a plurality of E.S. And forming the two straight lines to be symmetric to each other by forming the two straight lines to form orthogonal to each other, and measuring the overlapping accuracy using the job-file. 제1항에 있어서, 상기 중첩정확도는 이.지.에이 센서로 측정하는 것을 특징으로 하는 반도체소자 제조방법.The method of claim 1, wherein the overlapping accuracy is measured by an E.G sensor. 제1항 또는 제2항에 있어서, 상기 중첩정확도는 에프.아이.에이 센서로 측정하는 것을 특징으로 하는 반도체소자 제조방법.The method of claim 1, wherein the overlapping accuracy is measured by an F.A sensor. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950010733A 1995-05-02 1995-05-02 Semiconductor device manufacturing method Ceased KR960042909A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950010733A KR960042909A (en) 1995-05-02 1995-05-02 Semiconductor device manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950010733A KR960042909A (en) 1995-05-02 1995-05-02 Semiconductor device manufacturing method

Publications (1)

Publication Number Publication Date
KR960042909A true KR960042909A (en) 1996-12-21

Family

ID=66523702

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950010733A Ceased KR960042909A (en) 1995-05-02 1995-05-02 Semiconductor device manufacturing method

Country Status (1)

Country Link
KR (1) KR960042909A (en)

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