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KR960032433A - Data processing method and apparatus of digital reproduction system - Google Patents

Data processing method and apparatus of digital reproduction system Download PDF

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Publication number
KR960032433A
KR960032433A KR1019950002951A KR19950002951A KR960032433A KR 960032433 A KR960032433 A KR 960032433A KR 1019950002951 A KR1019950002951 A KR 1019950002951A KR 19950002951 A KR19950002951 A KR 19950002951A KR 960032433 A KR960032433 A KR 960032433A
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South Korea
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signal
data
synchronization signal
synchronization
parallel data
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KR0148176B1 (en
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백세현
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김광호
삼성전자 주식회사
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals
    • G11B20/10222—Improvement or modification of read or write signals clock-related aspects, e.g. phase or frequency adjustment or bit synchronisation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
    • G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

본 발명은 디지털 영상신호 기록/재생시스템에 관한 것으로, 특히 신호를 재생할 때 데이터를 유실한 구간을 효과적으로 처리할 수 있도록 한 디지털재생시스템의 데이터처리방법 및 장치에 관한 것이다. 본 발명은 신호를 재생할 때 첫 번째로 검출한 동기신호가 실제 첫 번째 동기블럭의 동기신호인지를 판단하여 순서가 어긋난 동기신호와 데이터를 가변지dus기를 통해 일치시킨다. 따라서, 본 발명은 유실된 데이터에 의해 어긋난 동기신호와 데이터의 순서를 올바로 맞춰주어 후처리단의 에러정정복호기에 안정된 데이터를 공급하는 효과를 가져온다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital video signal recording / reproducing system, and more particularly, to a data processing method and apparatus for a digital reproducing system that can effectively process a section in which data is lost when reproducing a signal. In the present invention, when the signal is reproduced, it is determined whether the first detected synchronization signal is actually the synchronization signal of the first synchronization block, and the synchronization signal and data out of order are matched through a variable edge device. Therefore, the present invention brings the effect of supplying stable data to the error correction decoder of the post-processing stage by correctly aligning the order of the synchronization signal and the data shifted by the lost data.

Description

디지털재생시스템의 데이터처리방법 및 장치Data processing method and apparatus of digital playback system

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 일반적인 디지털-VCR에서 1트랙에 기록되는 데이터를 나타내는 구성도,2 is a block diagram showing data recorded on one track in a general digital VCR;

제4도는 제3도의 각부 입·출력 신호타이밍도.4 is an input / output signal timing diagram of each part of FIG.

Claims (4)

소정의 기록매체에 동기블럭단위로 기록되 있는 신호를 독출하여 재생하는 디지털재생장치에 있어서, 상기 독출하여 재생한 직렬데이타를 입력받아 첫 번째 동기신호를 검출하는 동기신호검출기; 상기 동기신호검출기로부터 인가받는 상기 직렬데이타를 역시 상기 동기신호검출기로부터 인가받는 변환제어신호에 따라 n비트의 병렬데이타로 변환하여 출력하는 직/병렬변환기; 상기 동기신호검출기 및 직/병렬변환기로부터 동기신호 및 병렬데이타를 인가받아 ID신호를 비교하여 상기 동기신호검출기에서 첫 번째로 검출한 동기신호가 실제 몇 번째 동기블럭의 신호인지를 나타내는 동기블럭번호를 발생하는 ID비교 및 동기블럭번호발생기; 상기 ID비교 및 동기블럭발생기에서 인가받는 동기블럭번호와 1동기블럭의 워드수를 곱하여 지연량을 발생하는 지연량 발생기; 및 상기 지연량 발생기로부터 인가받는 지연량만큼 상기 병렬데이터를 지연시켜 출력하는 프로그래머 블지연기를 포함하는 디지털재생시스템의 데이타처리장치.A digital reproducing apparatus for reading and reproducing a signal recorded on a predetermined recording medium in a synchronous block unit, the digital reproducing apparatus comprising: a synchronous signal detector configured to receive the read and reproduced serial data and detect a first synchronous signal; A serial / parallel converter for converting the serial data applied from the synchronization signal detector into n-bit parallel data according to a conversion control signal received from the synchronization signal detector and outputting the serial data; Synchronization signal and parallel data are applied from the synchronization signal detector and the serial / parallel converter to compare the ID signal to obtain a synchronization block number indicating the number of synchronization blocks that the first synchronization signal detected by the synchronization signal detector is actually the signal of the synchronization block. Generating ID comparison and sync block number generators; A delay amount generator for generating a delay amount by multiplying the sync block number applied by the ID comparison and the sync block generator with the number of words in one sync block; And a programmable delay unit configured to delay and output the parallel data by a delay amount applied from the delay amount generator. 제1항에 있어서, 상기 프로그래머블지연기는 상기 n비트의 병렬데이터를 지연시키는 동아 "0"을 공급하는 것을 특징으로 하는 디지털재생시스템의 데이타처리장치.The data processing apparatus of claim 1, wherein the programmable delay unit supplies a zero (0) for delaying the n-bit parallel data. 소정의 기록매체에 동기블럭단위로 기록되 있는 신호를 독출하여 재생하는 디지털재생장치에 있어서, 상기독출하여 재생한 직렬데이터를 입력받아 첫 번째 동기신호를 검출하는 단계; 상기 동기신호검출 이후에 발생하는 변환제어신호에 응답하여 상기 직렬데이타를 병렬데이타로 변환하는 단계; 상기 첫 번째 검출한 동기신호와 상기 병렬데이타를 인가받아 ID를 비교하는 단계; 상기 비교결과에 따라 상기 첫 번째 검출한 동기신호가 실제 몇 번째 동기블럭의 신호인지를 나타내는 동기블럭번호를 발생하는 단계; 상기 동기블럭번호와 1동기블럭의 워드수를 곱하여 지연량을 발생하는 단계; 및 상기 지연량만큼 상기 병렬데이타를 지연시켜 출력하는 단계로 이루어지는 디지털재생시스템의 데이타처리방법.A digital reproducing apparatus for reading and reproducing a signal recorded on a predetermined recording medium in synchronization block units, the digital reproducing apparatus comprising the steps of: detecting a first synchronization signal by receiving the read and reproduced serial data; Converting the serial data into parallel data in response to a conversion control signal generated after the synchronization signal detection; Comparing an ID by receiving the first detected synchronization signal and the parallel data; Generating a sync block number indicating a number of sync blocks of the first detected sync signal according to the comparison result; Generating a delay amount by multiplying the sync block number by the number of words in one sync block; And delaying and outputting the parallel data by the delay amount. 제3항에 있어서, 상기 지연단계는 상기 병렬데이터를 지연시키는 동안 "0"을 공급하는 것을 특징으로 하는 디지털재생시스템에 데이타처리방법.4. The data processing method according to claim 3, wherein said delaying step supplies "0" while delaying said parallel data. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950002951A 1995-02-16 1995-02-16 Data processing method and apparatus of digital reproduction system Expired - Fee Related KR0148176B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950002951A KR0148176B1 (en) 1995-02-16 1995-02-16 Data processing method and apparatus of digital reproduction system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950002951A KR0148176B1 (en) 1995-02-16 1995-02-16 Data processing method and apparatus of digital reproduction system

Publications (2)

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KR960032433A true KR960032433A (en) 1996-09-17
KR0148176B1 KR0148176B1 (en) 1998-10-15

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