KR950030484A - Feed Forward Controlled Phase-Sync Circuit - Google Patents
Feed Forward Controlled Phase-Sync Circuit Download PDFInfo
- Publication number
- KR950030484A KR950030484A KR1019950008805A KR19950008805A KR950030484A KR 950030484 A KR950030484 A KR 950030484A KR 1019950008805 A KR1019950008805 A KR 1019950008805A KR 19950008805 A KR19950008805 A KR 19950008805A KR 950030484 A KR950030484 A KR 950030484A
- Authority
- KR
- South Korea
- Prior art keywords
- phase
- signal
- voltage controlled
- multivibrator oscillator
- control
- Prior art date
Links
- 230000010355 oscillation Effects 0.000 claims abstract 12
- 230000001105 regulatory effect Effects 0.000 claims abstract 6
- 239000003990 capacitor Substances 0.000 claims 5
- 230000006641 stabilisation Effects 0.000 claims 2
- 238000011105 stabilization Methods 0.000 claims 2
- 238000007599 discharging Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/354—Astable circuits
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
본 발명의 목적은 간단한 회로 구성에서 외부로부터의 입력 신호에 고정도에 위상 동기 가능한 위상 동기 회로를 제공하는데 있다.SUMMARY OF THE INVENTION An object of the present invention is to provide a phase synchronization circuit capable of phase-locking with high accuracy to an input signal from the outside in a simple circuit configuration.
또한, 본 발명의 구성은 외부 입력 신호에 위상 동기된 발진 신호를 제공하는 피드 포워드 제어형 위상 동기회로에 있어서, 그 위상 동기 회로와 전압 제어에 따라 발진 주파수가 변화하는 전압 제어 멀티바이브레이터발진기(VCM, 31), 이 VCM의 출력신호 또는 이 출력신호를 분주한 신호와 입력신호간의 주파수차에 따라 신호를 발생하는 주파수 비교기(27), 이 주파수 비교기로부터 입력된 신호에 근거하여 상기 VCM에 공급하기 위한 제어전압을 생성하는 루트필터(29) 및 상기 VCM의 발진 출력신호의 위상을 상기 입력신호에 의해 규제하는 위상 제어하는 회로를 구비한다.In addition, the configuration of the present invention is a feed-forward-controlled phase-lock circuit for providing an oscillation signal that is phase-locked to an external input signal, the voltage-controlled multivibrator oscillator (VCM) whose oscillation frequency changes according to the phase-lock circuit and voltage control. 31) a frequency comparator 27 for generating a signal in accordance with an output signal of this VCM or a frequency difference between a signal obtained by dividing this output signal and an input signal, for supplying to the VCM based on a signal input from the frequency comparator; A root filter 29 for generating a control voltage and a phase control circuit for regulating the phase of the oscillation output signal of the VCM by the input signal.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 본 발명의 일 실시예에 관한 위상 동기 회로의 개략구성을 도시하는 블럭도이다. 제2도는 일반적인 이미터 결합형 멀티바이브레이터의 기본 구성을 도시한 전기 회로도(a) 및 제1도의 위상 동기 회로에 사용가능한 전압 제어 멀티바이브레이터 발진기의 구성을 도시한 전기 회로도(b)이다, 제3도는 제1도의 위상 동기회로에 사용 가능한 전압 제어 멀티바이브레이터 발진기를 집적 회로에서 실시한 경우의 구성을 도시한 전기 회로도이다.1 is a block diagram showing a schematic configuration of a phase locked circuit according to an embodiment of the present invention. 2 is an electrical circuit diagram (a) showing the basic configuration of a general emitter coupled multivibrator and an electrical circuit diagram (b) showing the configuration of a voltage controlled multivibrator oscillator usable for the phase-lock circuit of FIG. Fig. 1 is an electrical circuit diagram showing the configuration when the voltage controlled multivibrator oscillator usable in the phase synchronization circuit of Fig. 1 is implemented in an integrated circuit.
Claims (7)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6101963A JPH07288468A (en) | 1994-04-14 | 1994-04-14 | Feedforward control type phase locked loop circuit |
JP94-101963 | 1994-04-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR950030484A true KR950030484A (en) | 1995-11-24 |
Family
ID=14314529
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950008805A KR950030484A (en) | 1994-04-14 | 1995-04-14 | Feed Forward Controlled Phase-Sync Circuit |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPH07288468A (en) |
KR (1) | KR950030484A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4945856B2 (en) * | 2001-05-28 | 2012-06-06 | ソニー株式会社 | Oscillator circuit |
JP4727538B2 (en) * | 2006-09-13 | 2011-07-20 | 富士通テレコムネットワークス株式会社 | Phase synchronization circuit |
JP2008103888A (en) * | 2006-10-18 | 2008-05-01 | Niigata Seimitsu Kk | Voltage controlled oscillator circuit |
-
1994
- 1994-04-14 JP JP6101963A patent/JPH07288468A/en active Pending
-
1995
- 1995-04-14 KR KR1019950008805A patent/KR950030484A/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
JPH07288468A (en) | 1995-10-31 |
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PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19950414 |
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Comment text: Notification of reason for refusal Patent event date: 19980130 Patent event code: PE09021S01D |
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Comment text: Notification of reason for refusal Patent event date: 19980428 Patent event code: PE09021S01D |
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PE0601 | Decision on rejection of patent |
Patent event date: 19981024 Comment text: Decision to Refuse Application Patent event code: PE06012S01D Patent event date: 19980428 Comment text: Notification of reason for refusal Patent event code: PE06011S01I Patent event date: 19980130 Comment text: Notification of reason for refusal Patent event code: PE06011S01I |