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KR950021526A - 반도체 장치 및 그의 제조방법 - Google Patents

반도체 장치 및 그의 제조방법 Download PDF

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Publication number
KR950021526A
KR950021526A KR1019930028223A KR930028223A KR950021526A KR 950021526 A KR950021526 A KR 950021526A KR 1019930028223 A KR1019930028223 A KR 1019930028223A KR 930028223 A KR930028223 A KR 930028223A KR 950021526 A KR950021526 A KR 950021526A
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KR
South Korea
Prior art keywords
diffusion barrier
barrier material
layer
material layer
metal
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KR1019930028223A
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English (en)
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KR0129985B1 (ko
Inventor
신현국
박규찬
문종
심태언
Original Assignee
김광호
삼성전자 주식회사
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019930028223A priority Critical patent/KR0129985B1/ko
Priority to JP31205394A priority patent/JP3485656B2/ja
Priority to US08/358,904 priority patent/US5501995A/en
Publication of KR950021526A publication Critical patent/KR950021526A/ko
Application granted granted Critical
Publication of KR0129985B1 publication Critical patent/KR0129985B1/ko

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/665—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum
    • H10D64/666—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum the conductor further comprising additional layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28079—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28088—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Composite Materials (AREA)
  • Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 반도체 트랜지스터 장치의 새로운 게이트 전극 구조를 개시하는 것으로서, 게이트 전극은 티타늄 나이트라이드 (Tin)와 같은 확산 방지 물질층에 의하여 에워싸인 금속층으로 이루어진다. 금속층으로는 저항이 매우 낮은 구리를 사용할 수 있으며, 확산 방지 물질층에 의하여 하부구조로 금속이 확산되거나 침전되는 것을 방지하게 된다. 이와 같이, 본 발명은 고집적화되는 차세대 디바이스의 고속화 및 기능화를 추구하기 위한 것으로서, 저항이 낮은 내열성 금속 및 이를 둘러싸고 있는 확산 방지 물질층으로 전극을 구성함으로써, 고정항에 의한 시간 지연을 단축하여 전력 소모를 감소시키는 잇짐을 있다.

Description

반도체 장치 및 그의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 따른 반도체 장치의 일실예에 따른 단면도이다.

Claims (7)

  1. 반도체 기판 ;상기 반도체 기판상에 형성되어 있는 절연막 ; 상기 절연막의 상부에 형성되어 있으며, 확산 방지 물질에 의하여 애워싸인 금속으로 이루어진 전극을 구비하는 것을 특징으로 하는 반도체 장치.
  2. 제1항에 있어서, 상기 확산 방지 물질을 티타늄 나이트라이드(TiN)인 것을 특징으로 하는 반도체 장치.
  3. 제1항에 있어서, 상기 전극에 포함되는 금속은 구리인 것을 특징으로 하는 반도체 장치.
  4. 제1항에 있어서, 상기 기판내에 상호 일정한 거리를 두고 형성되고 있는 소오스 영역 및 드레인 영역을 더 구비하여, 상기 전극은 게이트 전극인 것을 특징으로 하는 반도체 장치.
  5. 반도체 기판상에 절연막을 형성하는 공정 ; 상기 절연막상에 제1확산 방지 물질층을 형성하는 공정 ; 상기 제1 확산 방지 물질층의 상부에 개구부를 갖는 마스크 패턴을 형성하는 공정, 상기 개구부의 일부를 매립시키도록 금속층을 형성하는 공정 ; 상기 마스크 패턴 및 상기 금속층으로 이루어진 표면상에 제2 확산방지 물질층을 형성하는 공정 ; 상기 마스크 패턴이 노출되도록 상기 제2확산 방지 물질층을 엣치백으로 공정 : 상기 마스크 패턴을 제거하는 공정 ; 상기 제2확산 방지 물질층의 윗면, 상기 제2확산 방지 물질층 및 상기 금속층의 측면 및 상기 제1확산 방지 물질층의 윗면에, 제3확산방지 물질층을 형성하는 공정 ; 및 확산 방지 물질층에 의하여 에워싸인 금속층으로 이루어진 전극을 형성하기 위하여, 상기 확산 방지 물질층들을 선택적으로 식각하는 공정을 포함하는 것을 특징으로 하는 반도체 장치의 제조 방법.
  6. 제5항에 있어서, 상기 제1, 제2및 제3확산 방지 물질층을 형성하는 공정들은 TiN을 증착시키는 공정인 것을 특징으로 하는 반도체 장치의 제조 방법.
  7. 제5항에 있어서, 상기 급속층을 선택적으로 증착시키는 공정은 구리를 유기 금속 기상 성장법(MOCVD :metal organic vapor deposition)을 사용하여 증착시키는 것을 특징으로 하는 반도체 장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930028223A 1993-12-17 1993-12-17 반도체장치 및 그의 제조방법 KR0129985B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019930028223A KR0129985B1 (ko) 1993-12-17 1993-12-17 반도체장치 및 그의 제조방법
JP31205394A JP3485656B2 (ja) 1993-12-17 1994-12-15 半導体装置の製造方法
US08/358,904 US5501995A (en) 1993-12-17 1994-12-19 Method for manufacturing a gate electrode of a MOS transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930028223A KR0129985B1 (ko) 1993-12-17 1993-12-17 반도체장치 및 그의 제조방법

Publications (2)

Publication Number Publication Date
KR950021526A true KR950021526A (ko) 1995-07-26
KR0129985B1 KR0129985B1 (ko) 1998-04-07

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US (1) US5501995A (ko)
JP (1) JP3485656B2 (ko)
KR (1) KR0129985B1 (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100911683B1 (ko) * 2006-07-03 2009-08-10 주식회사 엘지화학 노트북 컴퓨터에 전지팩을 장착하기 위한 장치 및 이를포함하고 있는 노트북 컴퓨터
KR100913695B1 (ko) * 2007-07-28 2009-08-24 주식회사 이랜텍 배터리 팩

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Publication number Priority date Publication date Assignee Title
US5851889A (en) * 1997-01-30 1998-12-22 Advanced Micro Devices, Inc. Semiconductor gate conductor with a substantially uniform doping profile having minimal susceptibility to dopant penetration into the underlying gate dielectric
US5940698A (en) * 1997-12-01 1999-08-17 Advanced Micro Devices Method of making a semiconductor device having high performance gate electrode structure
KR100319681B1 (ko) * 1998-12-02 2002-01-09 가네꼬 히사시 전계 효과 트랜지스터 및 그 제조 방법
US6248638B1 (en) * 1998-12-18 2001-06-19 Texas Instruments Incorporated Enhancements to polysilicon gate
US6137145A (en) * 1999-01-26 2000-10-24 Advanced Micro Devices, Inc. Semiconductor topography including integrated circuit gate conductors incorporating dual layers of polysilicon
US6265297B1 (en) 1999-09-01 2001-07-24 Micron Technology, Inc. Ammonia passivation of metal gate electrodes to inhibit oxidation of metal
US6458714B1 (en) 2000-11-22 2002-10-01 Micron Technology, Inc. Method of selective oxidation in semiconductor manufacture
JP2011154380A (ja) * 2003-03-20 2011-08-11 Toshiba Mobile Display Co Ltd 表示装置の形成方法
KR101335714B1 (ko) * 2012-06-15 2013-12-05 연세대학교 산학협력단 그래핀 확산 방지막 및 이를 이용한 전자소자

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NL190388C (nl) * 1986-02-07 1994-02-01 Nippon Telegraph & Telephone Werkwijze voor het vervaardigen van een halfgeleiderinrichting en halfgeleiderinrichting.
US5212105A (en) * 1989-05-24 1993-05-18 Kabushiki Kaisha Toshiba Semiconductor device manufacturing method and semiconductor device manufactured thereby
US5298446A (en) * 1990-02-20 1994-03-29 Sharp Kabushiki Kaisha Process for producing semiconductor device
DE4037774C1 (ko) * 1990-11-28 1992-04-02 J.M. Voith Gmbh, 7920 Heidenheim, De
JP2994128B2 (ja) * 1991-03-04 1999-12-27 シャープ株式会社 半導体装置の製造方法
JPH04298030A (ja) * 1991-03-27 1992-10-21 Sony Corp メタルプラグの形成方法
US5314834A (en) * 1991-08-26 1994-05-24 Motorola, Inc. Field effect transistor having a gate dielectric with variable thickness
US5429589A (en) * 1992-04-02 1995-07-04 New Dimensions In Medicine, Inc. Hydrogel gauze wound dressing
KR950002202B1 (ko) * 1992-07-01 1995-03-14 현대전자산업주식회사 적층 박막 트랜지스터 제조방법

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100911683B1 (ko) * 2006-07-03 2009-08-10 주식회사 엘지화학 노트북 컴퓨터에 전지팩을 장착하기 위한 장치 및 이를포함하고 있는 노트북 컴퓨터
KR100913695B1 (ko) * 2007-07-28 2009-08-24 주식회사 이랜텍 배터리 팩

Also Published As

Publication number Publication date
US5501995A (en) 1996-03-26
KR0129985B1 (ko) 1998-04-07
JPH07211904A (ja) 1995-08-11
JP3485656B2 (ja) 2004-01-13

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