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KR950016004A - 이산 코사인 변환장치 - Google Patents

이산 코사인 변환장치 Download PDF

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Publication number
KR950016004A
KR950016004A KR1019940032077A KR19940032077A KR950016004A KR 950016004 A KR950016004 A KR 950016004A KR 1019940032077 A KR1019940032077 A KR 1019940032077A KR 19940032077 A KR19940032077 A KR 19940032077A KR 950016004 A KR950016004 A KR 950016004A
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KR
South Korea
Prior art keywords
storage
address
data
group
memory
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Application number
KR1019940032077A
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English (en)
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KR0139699B1 (ko
Inventor
김이섭
데츠 나가미츠
다카야스 사쿠라이
Original Assignee
사토 후미오
가부시키가이샤 도시바
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Application filed by 사토 후미오, 가부시키가이샤 도시바 filed Critical 사토 후미오
Publication of KR950016004A publication Critical patent/KR950016004A/ko
Application granted granted Critical
Publication of KR0139699B1 publication Critical patent/KR0139699B1/ko

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/147—Discrete orthonormal transforms, e.g. discrete cosine transform, discrete sine transform, and variations therefrom, e.g. modified discrete cosine transform, integer transforms approximating the discrete cosine transform
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T9/00—Image coding
    • G06T9/007—Transform coding, e.g. discrete cosine transform
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Computational Mathematics (AREA)
  • Discrete Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • Multimedia (AREA)
  • Complex Calculations (AREA)
  • Image Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Compression Of Band Width Or Redundancy In Fax (AREA)

Abstract

본 발명은 분산연산방식에 의해 분산코사인변환의 연산을 행하는 LSI의 메모리의 면적을 감소시킬 수 있다.
N개의 입력데이터의 동일자리수의 N개의 비트값을 어드레스로하고 이 어드레스에 상기 동일자리수의 N개의 비트값과 변환행렬 성분과의 적화데이터가 격납되어 있는수단과, 이 기억수단으로부터 독출되는 데이터를 누적가산하는 누적가산수단을 갖춘 이산코사인 변환장치에 있어서 상기 기억수단을 동일한 값의 적화데이터를 액세스하는 적어도 2개의 어드레스로 이루어지는 1개의 어드레스 그룹에 대해 1개의 적화데이터의 격납장소가 할당되는 기억부와, 상기 어드레스그룹에 속하는 어드레스의 공급에 따라 상기 어드레스그룹에 할당된 격납장소를 액세스하는 디코더를 구비하고 있다.
메모리에 유지되는 연산결과를 공용하기 때문에 적은 기억용량이 되어 메모리칩의 면적을 가급적으로 줄일 수 있게 된다.

Description

이산 코사인 변환장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 이산코사인 변환장치의 실시예를 나타낸 브록도,

Claims (1)

  1. N개의 입력데이터의 동일자리수의 N개의 비트값을 어드레스로하고, 이 어드레스에 상기 동일자리수의 N개의 비트값과 변환행열 성분과의 적화데이터가 격납되어 잇는 기억수단(21~24)과, 이 기억수단(21~24)으로부터 독출되는 데이터를 누적가산하는 누적가산수단(15)을 갖추고, 상기 기억수단(21~24)은 동일한 값의 적화(積和)데이터를 액세스하는 적어도 2개의 어드레스로 이루어진 1개의 어드레스 그룹에 대한 1개의 적화데이터의 격납장소가 할당되는 기억부(23, 24) 및 상기 어드레스 그룹에 속하는 어드레스의 공급에 따라 상기 어드레스 그룹에 할당된 격납장소를 액스세하는 디코더(21, 22)를 구비하여 구성된 것을 특징으로 하는 이산 코사인 변환장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940032077A 1993-11-30 1994-11-30 이산 코사인 변환장치 KR0139699B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP30037593A JPH07152730A (ja) 1993-11-30 1993-11-30 離散コサイン変換装置
JP93-300375 1993-11-30

Publications (2)

Publication Number Publication Date
KR950016004A true KR950016004A (ko) 1995-06-17
KR0139699B1 KR0139699B1 (ko) 1998-07-01

Family

ID=17884030

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940032077A KR0139699B1 (ko) 1993-11-30 1994-11-30 이산 코사인 변환장치

Country Status (5)

Country Link
US (1) US5673214A (ko)
EP (1) EP0655694B1 (ko)
JP (1) JPH07152730A (ko)
KR (1) KR0139699B1 (ko)
DE (1) DE69424377T2 (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100230251B1 (ko) * 1995-12-13 1999-11-15 윤종용 동영상 부호화장치에 있어서 신호처리방법 및 회로
JPH1064078A (ja) * 1996-08-20 1998-03-06 Mitsubishi Electric Corp 光ヘッド
JP3916277B2 (ja) * 1996-12-26 2007-05-16 シャープ株式会社 読み出し専用メモリ及び演算装置
TW364269B (en) * 1998-01-02 1999-07-11 Winbond Electronic Corp Discreet cosine transform/inverse discreet cosine transform circuit
JP2001318910A (ja) * 2000-02-29 2001-11-16 Sony Corp 逆離散コサイン変換装置
JP3860545B2 (ja) * 2003-02-07 2006-12-20 誠 小川 画像処理装置及び画像処理方法
NO327346B1 (no) * 2004-08-16 2009-06-15 Norsk Hydro As Fremgangsmate og anordning for bearbeiding av karbonlegemer
KR101601864B1 (ko) * 2014-02-25 2016-03-10 숭실대학교산학협력단 동영상 코덱의 역변환 방법 및 그 장치

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4791598A (en) * 1987-03-24 1988-12-13 Bell Communications Research, Inc. Two-dimensional discrete cosine transform processor
JP2646778B2 (ja) * 1990-01-17 1997-08-27 日本電気株式会社 ディジタル信号処理装置
US5319724A (en) * 1990-04-19 1994-06-07 Ricoh Corporation Apparatus and method for compressing still images
JP2866754B2 (ja) * 1991-03-27 1999-03-08 三菱電機株式会社 演算処理装置
FR2681962B1 (fr) * 1991-09-30 1993-12-24 Sgs Thomson Microelectronics Sa Procede et circuit de traitement de donnees par transformee cosinus.
US5361220A (en) * 1991-11-29 1994-11-01 Fuji Photo Film Co., Ltd. Discrete cosine transformation with reduced components

Also Published As

Publication number Publication date
DE69424377T2 (de) 2000-10-12
EP0655694A2 (en) 1995-05-31
JPH07152730A (ja) 1995-06-16
KR0139699B1 (ko) 1998-07-01
DE69424377D1 (de) 2000-06-15
US5673214A (en) 1997-09-30
EP0655694A3 (en) 1995-11-02
EP0655694B1 (en) 2000-05-10

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