KR950000438B1 - Automatic editing apparatus in camcoder - Google Patents

Abstract

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Description

Camcorder Auto Editing Device

1 is a circuit diagram of an automatic editing apparatus of a camcorder according to the present invention.

2 is a flow chart of FIG. 1 showing an automatic editing method according to the present invention.

3 is an explanatory diagram showing a process edited by this invention.

* Explanation of symbols for main parts of the drawings

10: Mycom 20: Tablet

30: A / D changer 40: memory

50: data reduction circuit 60: D / A converter

70: synchronous separation circuit 100: line moving block

110: counter 1, 120, 220: up / down counter

200: pixel shift block 210: counter

2, 300: Output control block MUX1, MUX2: Multiplexer

G1, G2, G4: Andgate G3: Oagate

S1: Switch S2: Selector Switch

The present invention relates to a camcorder, and more particularly, to an auto-editing apparatus of a camcorder, which instantly draws a scene to be edited by a tablet and matches it with another screen.

In the conventional camcorder technology, in order to edit a plurality of screens using a camcorder, a method of capturing a plurality of editing objects and then overlapping the screen is used. That is, the base screen to be edited is photographed and recorded on the tape, and the image currently recorded by the camcorder is recorded in the necessary portion while reproducing the image of the tape using a separate VTR. Therefore, it is impossible to edit the screen only by the camcorder because it is necessary to overlap the screen in order to mix the other picture with the base picture in the part where the new picture is recorded, and it has become extremely limited technology even when editing using other related equipment.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and an object of the present invention is to provide an automatic editing apparatus of a camcorder to match a plurality of images required by a single camcorder on one screen using the EVF of the camcorder. have.

In order to achieve the above object, the present invention provides a microcomputer that receives a key input and controls the camcorder and the entire system, and an A / D converter for digitally changing and outputting a still image signal drawn by a tablet. A switch for connecting a still image signal of the camcorder to the A / D converter by the Edit In command of the microcomputer, a memory for storing the digital signal of the A / D converter, and sampling the data of the memory. A data reduction circuit that performs data compression at 1 / n, a D / A converter that converts the output of the data reduction circuit into an analog signal, and receives horizontal and vertical synchronization from the synchronization separation circuit of the camcorder to count horizontal synchronization. To move the display position of the image to be edited up and down according to the control of the microcomputer, and to receive the output of the line mobile block. A pixel shift block for shifting the display position of the image to be edited by the control left and right, an output control block for controlling the data reduction circuit by receiving the output of the line shift block and the pixel shift block, and an output of the output control block The automatic editing apparatus of a camcorder has a feature that selects only one axis among a reduced image signal which is switched by the D / A converter and a video signal currently being captured by the camcorder and is output to the EVF.

1 shows a block diagram of an automatic editing apparatus of a camcorder according to the present invention. First, the microcomputer 10 built in the camcorder controls the entire system. The microcomputer 10 controls the system in a zoom still state to edit the video signal captured by the camera of the camcorder. A tablet (TABLET) 20 for drawing a still image in a zoom still state and an A / D converter that receives a video signal of the drawn image by an edit in signal of the microcomputer 10 and converts it into a digital signal. And a switch S1 for connecting the image signal drawn by the tablet 20 to the A / D converter 30 by the edit-in signal, and the digital of the A / D converter 30. A memory 40 for storing signals, a data reduction circuit 50 for sampling data of the memory 40 and performing data compression at 1 / n, and a digital signal output from the data reduction circuit 50; The D / A converter 60 for converting the signal and the horizontal synchronization and vertical synchronization from the synchronous separation circuit 70 of the camcorder are counted and the horizontal synchronization is counted according to the control of the microcomputer 10 according to the control of the microcomputer 10. Line moving block 100 for moving up and down, and A pixel shift block 200 which receives the output of the line shift block 100 and shifts the display position of the image to be edited by the command of the microcomputer 10, the line shift block 100 and the pixel shift block An output control block 300 that receives the output of 200 and controls the data reduction circuit 50, and is switched by an output of the output control block 300 to output the analog signal of the D / A converter 60 and a camcorder. A selector switch (S2) for selecting one side of the video signal photographed at and outputting to the EVF is provided.

On the other hand, the line movement block 100 is reset by the vertical synchronization separated in the synchronous separation circuit 70, the counter 1 (110) receiving the horizontal synchronization as the clock (CLK) and the up of the microcomputer (100) The output of the counter 1 110 is multiplexed by an up / down counter 120 that generates select data by a / down command and select signals S0, S1, and S2 of the up / down counter 120. A multiplexer MUX1 to output and an inverter I1 for inverting the output of the multiplexer MUX1 and applying it to the enable terminal of the counter 1 110 are included.

In addition, the pixel shift block 200 receives the output of the multiplexer MUX1 of the line shift block 100 as an enable signal and receives a horizontal synchronization signal as a reset signal, and the micom ( The output of the counter 1 110 is multiplexed by an up / down counter 220 for generating select data according to the left / right moving command of 10) and a select signal of the up / down counter 220. The multiplexer MUX2 and the output of the multiplexer MUX2 are inverted by the inverter I2 and the output of the multiplexer MUX1 of the line moving block 100 is logicized so that the counter 2210 is checked. It consists of an AND gate G1 which provides an enable signal. The output control block 300 includes an AND gate G2 for logically outputting the output of the multiplexer MUX1 of the line shift block 100 and the output of the multiplexer MUX2 of the pixel shift block 200, and the AND gate. An output control circuit 310 which receives the output of the gate G2 and enables the data reduction circuit 50 to read in and specifies an address, and an oragate for logically sampling the multiple outputs of the data reduction circuit 50; G3) and an AND gate G4 for switching the select switch S2 by logically outputting the output of the OA gate G3 and the enable output of the output control circuit 310.

Thus, the effect of this invention is demonstrated with the flowchart of FIG.

First, after bringing the camcorder into the zoom still state under the control of the microcomputer 10 (Stem 110), the microcomputer 10 determines whether an edit-in signal is input by the key (step 120). 20) to draw the screen to be edited (step 130).

For example, in the case of an apple as shown in FIG. 3A of the zoom still screen, the apple is drawn using a cursor to a portion to be edited among apples displayed on the EVF. The video signal of the drawn screen is converted into a digital signal through the A / D converter 30 (step 140) and is detected and stored in one-to-one detection mapping in the memory 40 (step 150), and the data reduction circuit 50 Is sampled at 1 / n and reduced (step 160).

After moving the camcorder to the editing target and turning on the start key, the microcomputer 10 receives the start key signal (step 180) and scans the screen displayed on the EVF, and the select switch (SW) is connected to the video stage. The base image is displayed on the EVF.

In addition, the counter 1 110 of the line moving block 100 is operated at the end of the vertical " L " section of the vertical synchronization to output the setting value of the position of the initial editing target screen. That is, any one of the output terminals a0... A7 of the counter 1 110 is selected and output by the multiplexer MUX1.

Since the multiplexer MUX2 of the pixel shift block 200 is initially a logic “L”, the AND gate G1 receives a signal having a logic “H” through the inverter I2, thereby enabling the enable signal to the counter 2 210. Is applied. Accordingly, the output of the counter 2 210 is generated, and one side of the output terminals b0 ... b7 is selected and output by the multiplexer MUX2. In addition, the AND gate G2 provides an input of logic "H" to the output control circuit 310 because the multiplexers 1, 2 (MUX1) and (MUX2) providing both inputs are logic "H". Accordingly, the output control circuit 310 controls the data reduction circuit 50 so that the initial data reduced video signal is output as an analog signal through the D / A converter 60. In addition, since the oragate G3 is in a state where data is reduced and output, the logic gate is "H", and the AND gate G4 is also logic "H" so that the select switch SW is connected to the output side of the D / A converter 60. Connected. Therefore, the EVF displays the apple picture as the editing target screen at the set initial position in the base screen as shown in FIG. (B) of FIG. 3 shows a case where the base screen is a tree. On the other hand, the output terminals a0... A7 of the counter 1 110 output a horizontal scan line.

That is, a0 = 30H, a1 = 60H... a7 = 210H and the like, and the output terminal of the counter 2 210 divides the section 52Hz which is identified by the eye out of 1H using the crystal oscillator (X-tal). That is, the output stages b0… b7 are divided by eight divisions of 52 ms, b0 = 6.5 ms, b1 = 13 ms, and so on. b7 = 45.5㎲ and so on. On the other hand, when the counter 2 210 is in an enabled state, the output of the multiplexer MUX1 disables the counter 1 110 through the inverter I1 so that the counter 1 110 is not operated.

In addition, the up / down keys of the camcorder are used to move the position of the apple displayed on the base screen. Here, the up / down keys can use the keys of the existing camcorder, and a separate key can be installed.

Therefore, when the up / down key of the line movement block 100 is pressed, the microcomputer 10 checks the key input (step 190) and controls the up / down counter 120. Therefore, the logic of the output terminals S0 ... S2 of the up / down counter 120 is changed, and one side of the output terminals a0 ... a7 of the counter 1110 is selected and output to the multiplexer MUX1 (step 120). By the output of the multiplexer MUX1, the counter 1 110 is disabled and the up and down positions of the apples are determined. When the counter 2 210 is enabled and the left / right key is pressed, the left / right key input of the microcomputer 10 is checked (step 210) and the up / down counter 220 of the pixel shift block 200 is checked. Send control command to. As a result, the logic of the output terminals S3... S5 of the up / down counter 220 is changed, and the output terminals b0... B7 of the counter 2 210 are selected and output to the multiplexer MUX2. That is, the count is ± 1 by the left or right key input (step 220), and the output is input to the AND gate G2.

Thus, the output of the AND gate G2 becomes a logic " H " so that the output control circuit 310 enables the data reduction circuit 50, and the counter 2 220 is disabled by the inverter I2. In addition, the data reduction circuit 50 reads the reduced image data of the apple, and at this time, the address increase of the apple is synchronized with the horizontal synchronization, and the counter 2 210 is displayed so that the apple picture is displayed at the same vertical line in the next scan line. It is synchronized with horizontal synchronization. That is, it is reset by horizontal synchronization. After that, the next scan line is reset in the logic " L " section of horizontal synchronization and count 2 210 is operated again. In this way, the position of the screen on which the apple is moved is determined by the counts of the up / down counters 120 and 220 to complete the edit screen as shown in FIG. 3C, and the edit screen is displayed on the EVF ( Step 230).

In this way, the screen editing is currently performed without any other equipment immediately.

As described above, according to the automatic editing apparatus of the camcorder according to the present invention, only the portion of the editing target screen necessary for editing is drawn by using the tablet to be reduced to 1 / n to be matched to the base screen, and to be edited by key operation. The location will be changed arbitrarily. In addition, this effect can be obtained only by the camcorder itself without the need for a separate editing equipment or VTR, such as screen editing using a camcorder is very convenient.

Claims (3)

The microcomputer 10 receives key input and controls the camcorder and the entire system, an A / D converter 30 for digitally converting and outputting a still image signal drawn by the tablet 20, and the microcomputer 10 of the microcomputer 10. A switch S1 for connecting the still image signal of the camcorder to the A / D converter 30 by an edit command, a memory 40 for storing the digital signal of the A / D converter 30, A data reduction circuit 50 for sampling the data of the memory 40 and performing data compression at 1 / n, a D / A converter 60 for converting the output of the data reduction circuit 50 into an analog signal, A line shift block 100 which receives horizontal sync and vertical sync from the sync separation circuit 70 of the camcorder and counts the horizontal sync to move the display position of the image to be edited according to the control of the microcomputer, and the line shift block ( With the output of 100) A pixel shift block 200 for shifting the display position of the image to be edited under control of 0), an output control block 300 for controlling the line shift block 100 and the pixel shift block 50, and A selection switch which is switched by the output of the output control block 300 to select only one of the reduced image signal output from the D / A converter 60 and the video signal currently being captured by the camcorder to be output to the EVF ( S2) and the automatic editing device of the camcorder. The counter 1 (110) and the microcomputer (10) of claim 1, wherein the line movement block (100) is reset by vertical synchronization separated from the synchronization separation circuit (70) and receives horizontal synchronization as a clock. A multiplexer for multiplexing the output of the counter 1 110 by the up / down counter 120 for generating select data by the up / down command of the up / down counter and the select signal of the up / down counter 120; (MUX1) and an inverter (I1) which inverts the output of the multiplexer (MUX1) and applies it to the enable end of the counter 1 (110), and the pixel shift block (200) is the line shift block (100). Counter 2 (210) receiving the output of the multiplexer (MUX1) as an enable signal and a horizontal synchronous signal as a reset signal, and generating the select data according to the left / right moving command of the microcomputer (10). / Down counter 220 and the select signal of this up / down counter 220 A multiplexer (MUX2) for multiplexing and outputting the output of the counter 1 (110), the signal of which the output of the multiplexer (MUX2) is inverted by the inverter (I2) and the multiplexer (MUX1) of the line moving block (100). And an AND gate (G1) for providing the enable signal of the counter 2 (210) by logically outputting the output of the camcorder. The AND gate of claim 1, wherein the output control circuit 300 synchronizes the output of the line shift block 100 and the output of the pixel shift block 200 to synchronize the readout of the memory 40. G2), an output control circuit 310 which receives the output of this AND gate G2, enables the data reduction circuit 50 to read in and specifies an address, and an output and an output control circuit of the oragate G3. And an AND gate (G4) for switching the select switch (S2) by logicalizing the enable output of (310).