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KR940020594A - 에스오아이(SOI : silicon on insulator) 구조의 반도체 장치 제조방법 - Google Patents

에스오아이(SOI : silicon on insulator) 구조의 반도체 장치 제조방법 Download PDF

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Publication number
KR940020594A
KR940020594A KR1019930002208A KR930002208A KR940020594A KR 940020594 A KR940020594 A KR 940020594A KR 1019930002208 A KR1019930002208 A KR 1019930002208A KR 930002208 A KR930002208 A KR 930002208A KR 940020594 A KR940020594 A KR 940020594A
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South Korea
Prior art keywords
silicon layer
forming
layer
active silicon
region
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KR1019930002208A
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English (en)
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KR960002088B1 (ko
Inventor
이태복
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019930002208A priority Critical patent/KR960002088B1/ko
Priority to EP94301086A priority patent/EP0612103B1/en
Priority to JP6018099A priority patent/JP2687091B2/ja
Priority to DE69431770T priority patent/DE69431770T2/de
Priority to US08/197,480 priority patent/US5482877A/en
Priority to CN94102697A priority patent/CN1042578C/zh
Priority to TW083101676A priority patent/TW228609B/zh
Publication of KR940020594A publication Critical patent/KR940020594A/ko
Application granted granted Critical
Publication of KR960002088B1 publication Critical patent/KR960002088B1/ko

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6735—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes having gates fully surrounding the channels, e.g. gate-all-around

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

하부실리콘 기판과 매립 산화층 및 상부실리콘층으로 된 웨이퍼 상에 패드 산화막을 형성하고 상기 매립 산화층에 소정부위에 옥시나이트라이드 영역을 형성하는 단계; 상기 상부 실리콘층을 패터닝하여 상기 옥시나이트라이드 영역과 교차되게 활성 실리콘층을 형성하고, 상기 드러난 옥시나이트라이드 영역에 대해 습식 에칭하여 공동부를 형성하는 단계; 상기 노출된 활성 실리콘층의 표면에 게이트 절연층을 형성하는 단계; 상기 활성실리콘층을 둘러싸고 상기 공동부가 매립되게 도핑된 폴리실리콘을 형성하고, 상기 도핑된 폴리실리콘의 소정 부위만을 에칭하여 제거하여 게이트 전극을 형성하는 단계; 상기 게이트 전극에 의해 이격된 상기 활성 실리콘층에 소오스, 드레인 영역을 형성하는 단계로 이루어짐을 특징으로 하는 SOI 구조의 반도체 장치 제조방법.

Description

에스오아이(SOI : silicon on insulator)구조의 반도체 장치 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제6도 내지 제9도는 본 발명에 따른 SOI MOSFET 장치 제조방법을 설명하는 공정도.

Claims (2)

  1. 하부실리콘 기판과 매립 산화층 및 상부실리콘층으로 된 웨이퍼 상에 패드 산화막을 형성하고 상기 매립 산화층에 소정부위에 옥시나이트라이드 영역을 형성하는 단계; 상기 상부 실리콘층을 패터닝하여 상기 옥시나이트라이드 영역과 교차되게 활성 실리콘층을 형성하고, 상기 드러난 옥시나이트라이드 영역에 대해 습식 에칭하여 공동부를 형성하는 단계; 상기 노출된 활성 실리콘층의 표면에 게이트 절연층을 형성하는 단계; 상기 활성실리콘층을 둘러싸고 상기 공동부가 매립되게 도핑된 폴리실리콘을 형성하고, 상기 도핑된 폴리실리콘의 소정 부위만을 에칭하에 제거하 게이트 전극을 형성하는 단계; 상기 게이트 전극에 의해 이격된 상기 활성 실리콘층에 소오스, 드레인 영역을 형성하는 단계로 이루어진을 특징으로 하는 SOI 구조의 반도체 장치 제조방법.
  2. 제1항에 있어서, 상기 옥시나이트라이드 영역은 질소를 이온 주입하여 형성하는 것을 특징으로 하는 반도체 장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930002208A 1993-02-17 1993-02-17 에스오아이(SOI : silicon on insulator) 구조의 반도체 장치 제조방법 KR960002088B1 (ko)

Priority Applications (7)

Application Number Priority Date Filing Date Title
KR1019930002208A KR960002088B1 (ko) 1993-02-17 1993-02-17 에스오아이(SOI : silicon on insulator) 구조의 반도체 장치 제조방법
EP94301086A EP0612103B1 (en) 1993-02-17 1994-02-15 Method of manufacturing a silicon-on-insulator semiconductor device
JP6018099A JP2687091B2 (ja) 1993-02-17 1994-02-15 シリコンオンインシュレータ構造の半導体装置の製造方法
DE69431770T DE69431770T2 (de) 1993-02-17 1994-02-15 Verfahren zur Herstellung von einem Silizium auf Isolator Halbleiterbauelement
US08/197,480 US5482877A (en) 1993-02-17 1994-02-16 Method for making a semiconductor device having a silicon-on-insulator structure
CN94102697A CN1042578C (zh) 1993-02-17 1994-02-17 制造绝缘体上的硅结构的半导体器件的方法
TW083101676A TW228609B (ko) 1993-02-17 1994-02-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930002208A KR960002088B1 (ko) 1993-02-17 1993-02-17 에스오아이(SOI : silicon on insulator) 구조의 반도체 장치 제조방법

Publications (2)

Publication Number Publication Date
KR940020594A true KR940020594A (ko) 1994-09-16
KR960002088B1 KR960002088B1 (ko) 1996-02-10

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Country Status (7)

Country Link
US (1) US5482877A (ko)
EP (1) EP0612103B1 (ko)
JP (1) JP2687091B2 (ko)
KR (1) KR960002088B1 (ko)
CN (1) CN1042578C (ko)
DE (1) DE69431770T2 (ko)
TW (1) TW228609B (ko)

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Also Published As

Publication number Publication date
TW228609B (ko) 1994-08-21
JP2687091B2 (ja) 1997-12-08
DE69431770D1 (de) 2003-01-09
KR960002088B1 (ko) 1996-02-10
DE69431770T2 (de) 2003-09-18
EP0612103A2 (en) 1994-08-24
EP0612103A3 (en) 1996-08-28
US5482877A (en) 1996-01-09
JPH06252403A (ja) 1994-09-09
EP0612103B1 (en) 2002-11-27
CN1095860A (zh) 1994-11-30
CN1042578C (zh) 1999-03-17

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