KR940004196B1 - Gmsk digital modulate apparatus and method - Google Patents

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Description

GMSK digital modulator and method

1 is a block diagram of a GMSK digital modulation device according to the prior art.

2 is a block diagram of a GMSK digital modulation device according to the present invention.

3 is a single square wave response of a Gaussian filter.

4 is a program flow diagram of a GMSK digital modulation device according to the present invention.

5 is a waveform diagram for explaining a GMSK digital modulation method according to FIG.

* Explanation of symbols for main parts of the drawings

10: digital signal processing unit 20,30: first and second digital / analog signal conversion unit

40,50: first and second low pass filter 60: phase shifter

70,80: 1st, 2nd mixing part 90: synthesis part

100: band pass filter unit

The present invention relates to a Gaussian-filtered Minimum Shift Keying (GMSK) digital modulation device and method, and in particular, a Gaussian low pass filter output by an input Non-Return to Zero (NRZ) data signal using a digital signal processor (DSP). The present invention relates to a GMSK digital modulation device and method for generating a GMSK modulated signal by calculating a sine function and a cosine function value corresponding to an instantaneous phase change of a signal, converting the value into an analog signal, and applying the result to an orthogonal modulator.

The GMSK modulation method uses an FM modulator with a modulation degree of 0.5 after passing an input NRZ data signal through a Gaussian lowpass filter to prevent the discontinuity of phase and spread spectrum of the modulation signal generated during modulation of the digital signal. As a method, the conventional general GMSK digital modulator adopts a method of directly driving a VCO (Voltage Controlled Oscillator) of the FM modulator 2 as an output signal of the Gaussian low pass filter 1, as shown in FIG. have.

However, the FM modulator 2 according to the above method cannot accurately adjust the modulation degree and linearity, and it is impossible to fundamentally solve the occurrence of frequency drift due to the characteristics of the VCO employed in the FM modulator 2. There was a problem.

Therefore, in order to solve the above problems, the present invention calculates the sine function and the cosine function of the instantaneous phase change amount by the output signal of the Gaussian filter by using a DSP and converts it into an analog signal using a digital / analog signal converter. It is an object of the present invention to provide a GMSK digital modulation device and method for converting and applying a GMSK modulation signal to a quadrature modulator.

In order to achieve the above object, the present invention is a digital signal processing unit for calculating the sine function and the cosine function value of the instantaneous phase change amount by the output signal of the Gaussian filter which is applied to the input data, and each of the output from the digital signal processor First and second digital / analog signal converters for converting the data into analog signals, first and second low pass filter units for removing quantization noise generated by the first and second digital / analog signal converters; A phase shifter for inputting a carrier wave to perform a predetermined phase shift, a first and second mixer for mixing the output signal of the phase shifter with an output signal of the first and second low pass filter, and the first and second mixer A GMSK digital modulation device comprising: a synthesizer for synthesizing output signals and a band pass filter for filtering an output signal of the synthesizer; The method for operating the GMSK digital modulation device configured as described above includes the process of setting the initialization and initial phase values of the shift register employed in the digital signal processor, calculating the phase values due to inter-symbol interference by receiving input data, and initial phase values. Modulates the phase values due to the interference between the symbol and the symbol, modulo operation to a predetermined value, initializes the bit length sample number of the input data, calculates the quantized phase value at the moment of sampling in the input data input section, The process of calculating and outputting the cosine function value and the sine function value of the phase value and judging whether the number of bit length samples of the input data has reached a constant value, and if it is a constant value, shifts the input data temporarily stored in the shift register. After inputting the next input data to the digital signal processor, the above steps are repeated. It characterized by comprising.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 is a configuration diagram of a GMSK digital modulator according to the present invention.

According to FIG. 2, the GMSK digital modulator according to the present invention receives an input data a _n and calculates a sine function value and a cosine function value of an instantaneous phase change amount by an output signal of a built-in Gaussian filter. 10; First and second digital / analog signal converters 20 and 30 for converting data output from the digital signal processor 10 into analog signals; First and second low pass filter units 40 and 50 for removing quantization noise generated by the first and second digital / analog signal converters 20 and 30; A phase shifter 60 inputting a carrier fc to shift the phase 90 °; First and second mixing units 70 and 80 for mixing the output signals of the phase shifter 60 with the output signals of the first and second low pass filter units 40 and 50; A synthesis unit (90) for synthesizing signals output from the first and second mixing units (70, 80); The band pass filter 100 filters the output signal of the synthesis unit 90.

4 is a program flow diagram of a GMSK digital modulation method according to the present invention.

₁)을 합하여 2π로 모듈로 연산을 행하고 입력데이타(a_n)의 비트길이 샘플갯수(k)를 초기화하는 과정과; 입력데이타 (a_n)가 입력되는 구간내에서 샘플하는 순간의 양자화된 위상값(φ₂)을 계산하고 이 위상값(φ₂)의 여현함수

및 정현함수

를 계산해서 출력하는 과정과, 입력데이타(a_n)의 비트길이 샘플갯수가 8에 도달했는가를 판단하여 8이면 시프트레지스터에 일시 저장되어 있는 입력데이타를 시프트시키고 다음 입력데이타 (a_n+1)를 디지틀신호처리부(10)에 입력하여 상기 과정들을 반복하는 과정으로 이루어진다.According to FIG. 4, the GMSK digital modulation method according to the present invention sets the initializing and initial phase values φ ₀ of the shift register built in the digital signal processing unit 10, receives an input (a _n ), and receives an intersymbol between symbols. Phase value due to interference

Performing a modulo operation by adding ₁ ) and initializing the bit length samples (k) of the input data (a _n ); Calculate the quantized phase value (φ ₂ ) at the moment of sampling in the interval _where input data (a _n ) is input and cosine function of this phase value (φ ₂ )

And sine functions

Calculates and outputs the data, and judges whether the number of samples of the bit length of the input data (a _n ) reaches 8, and if it is 8, shifts the input data temporarily stored in the shift register to the next input data (a _n +1). Is input to the digital signal processing unit 10 to repeat the above processes.

3 is a single square wave response diagram of a Gaussian filter.

Referring to the operation of the present invention having the configuration as described above are as follows.

If the GMSK modulated signal is represented by a mathematical equation, it is as follows.

If we expand and rewrite Equation 1 above,

Become Where fc is the frequency of the carrier and φ (t) is the amount of instantaneous phase change by the output of the Gaussian filter.

The DSP 10 shown in FIG. 2, which is a block diagram of the present invention, calculates an instantaneous phase change amount φ (t) according to a non-return to zero (NRZ) data input signal a _n and then The sine function value sinφ (t) and the cosine function value cosφ (t) are obtained and output.

The process for calculating the instantaneous phase change amount φ (t) is as follows.

If the impulse response of the Gaussian filter is h (t)

Where B is the 3dB bandwidth of the Gaussian filter.

Therefore, the Gaussian filter response g (t) of the single square wave signal is

Ⅱ (t / T) represents a single square wave signal.

In this case, Equation 4 may be written as follows.

Where T is the bit length of the square wave signal, BT is the constant multiplied by the 3 dB bandwidth and the bit length of the Gaussian filter, and erf (X) is the error function.

3 is a waveform diagram of a single square wave response g (t) of a Gaussian filter according to the BT value.

On the other hand, when the NRZ data a _n is continuously input to the DSP 10, the output of the Gaussian filter is

And the phase change φ (t) by b (t) is

이다. 따라서 φ(t)는 다시 <식6>,<식7>에서Where fd is the frequency shift and if GMSK the modulation should be 0.5

to be. Therefore, φ (t) is again expressed in <Equation 6> and <Equation 7>.

Becomes Here, the phase change amount φs due to the single square wave is

Therefore, the total amount of phase change by one bit of data among consecutive NRZ data is? / 2.

가 된다.Also, in FIG. 3 showing the single square wave response g (t) of the Gaussian filter, the distribution section of g (t) according to the BT value is [-T, 2T] and BT = 0.3 when BT = 0.5. It is enough to hold [-2T, 3T]. As an example of calculating the instantaneous phase change φ (t), if BT = 0.5, the distribution interval of g (t) is cut into [-T, 2T], and the number of samples for quantization in one bit section T is 8

Becomes

In this case, the equation for calculating the instantaneous phase change amount φ (n, k) can be written as follows from Equation 8.

In Equation 10, the first term ø ₀ is a past data bit and is a phase value based on data that does not give ISI (Inter Symbol Interference) to the current data (a _n ), and ø ₁ is current data (a _n ) represents the ISI value that affects _n ), and ø ₂ is the phase value at the instant of sampling within one bit period T.

4 is a program flow diagram of a GMSK digital modulation method according to the present invention.

FIG. 5 is a waveform diagram illustrating a GMSK digital modulation method according to FIG. 4.

By using the above Equation 10 and 4 and 5, the GMSK digital modulation method according to the present invention is sampled within a distribution section [-T, 2T] and one bit section T of BT = 0.3, g (t). For example, the number k = 8 is as follows.

As shown in FIG. 5, the initial phase value ø ₀ at the instant of nT is a data bit that has already passed, and is a phase due to data corresponding to -∞ to n-2 which does not give ISI to the current data a _n . Initialize to "0" or an arbitrary value at the time of initialization to the accumulated value of (step 1).

After performing step 1, if data a _n is input to the DSP 10 at the time of nT (step 2), the phase value ø ₁ by ISI affecting the current data a _n is calculated. (Step 3), this phase value (ø ₁ ) is the data obtained by integrating the single square wave Gaussian filter response g (t) of the data (a _n -1) in the interval [(n-2) T, nT]. is a value integrating the square-wave single Gaussian filter response g (t) in the interval [(n-1) t, nT] of (a _n).

Therefore, the instantaneous phase value at nT when the data a _n is input to the DSP 10 is ø ₀ + ø ₁ and is calculated by modulo 2π (step 4).

만큼 증가한 구간사이의 위상값 (ø₂)을 계산하기 위해서는 현재의 데이타(a_n)의 단일구형파 가우시안필터 응답 g(t)의 구간[nT, nT+

]에서 적분값과 ISI를 주는 a_n-1 및 a_n+1의 단일구형파 가우시안필터 응답 g(t)의구간[nT, nT+

]에서 적분값을 계산해서 모두 합한다(6단계). 따라서 (nT+

)인 순간의 총위상 값은 앞에서 계산한(ø₀+ø₁+ø₂)가 되고 이 값을 ø(n,k)이다(7단계). 상기 위상값ø(n,k)의, 여현함수값 cosø(n,k) 및 정현함수 sinø(n,k)를 계산해서 제1,2디지틀/아날로그신호변환부(20,30)로 각각 출력한다(8단계). 상기 8단계를 수행하고 나서 k값을 "1"씩 증가시키고 (9단계) 이 k값이 "8"인가를 판단하여 (10단계) k값이 "8"이 아니면 6단계로 복귀한다.After performing step 4, the quantized phase value ø ₂ at the moment of sampling is calculated and sampled in the interval [nT, (n + 1) T] where the current data a _n is input. Display the variable k as high as 0 (5 steps), starting from nT

In order to calculate the phase value (ø ₂ ) between the intervals increased by, the interval of the single square wave Gaussian filter response g (t) of the current data (a _n ) [nT, nT +

] Is the interval of the single square wave Gaussian filter response g (t) of a _n -1 and a _n +1 giving the integral and ISI [nT, nT +

], Calculate the integral values and add them all together (step 6). So (nT +

The total phase value at the moment of) becomes (ø ₀ + ø ₁ + ø ₂ ) calculated earlier, and this value is ø (n, k) (step 7). The cosine function cosø (n, k) and the sinusoidal function sinø (n, k) of the phase value ø (n, k) are calculated and output to the first and second digital / analog signal converters 20 and 30, respectively. (Step 8) After performing step 8, the k value is increased by &quot; 1 " (step 9), and it is determined whether the k value is " 8 " (step 10). If the k value is not " 8 "

In the same manner as above, when k = 1, phase values are calculated, and cosø (n, k) and sinø (n, k) values are calculated, respectively, to the first and second digital / analog signal converters 20 and 30, respectively. Repeat the output until k = 8.

If k = 8 in the step 10, the current data a _n passes and the next data a _n +1 is input. Therefore, the shift register built in the DSP 10 is shifted one bit (step 11). Increment to n + 1 (step 12), then return to step 2 and repeat the same method as for a _n .

In this way, the phases of the BT values of all other cases can be calculated, and the sine function value sin ø (t) and the cosine function value cos ø (t) of the calculated instantaneous phase change are calculated and output.

Since the sine function value and the cosine function value output from the DSP 10 are digital signals, the first and second low pass filter units (1, 2 digital / analog signal converters 20 and 30) convert the analog signals into analog signals. 40,50). The first and second low pass filter units 40 and 50 may use an active filter or a switch capacitor filter using a differential amplifier as a filter for removing quantization noise.

On the other hand, the phase shifter 60 phase-shifts the input carrier fc by 90 ° and transmits it to the first and second mixing units 70 and 80.

The first and second mixing units 70 and 80 mix the output signals of the phase shifter 60 with the respective output signals of the first and second low pass filter units 40 and 50.

The signals output from the first and second mixing units 70 and 80 are synthesized by the combining unit 90 and send the GMSK-modulated signals to the output terminal OUT through the band pass filter unit 100.

As described above, the present invention calculates the amount of phase change by the Gaussian filter employed in the DSP to generate the GMSK modulated signal using software built into the DSP, and converts the result into an analog signal, thereby minimizing the hardware required to generate the Gaussian waveform. There is an advantage to be reduced.

Claims (4)

A digital signal processor 10 for calculating the sine function and the cosine function value of the instantaneous phase change amount based on the output signal of the Gaussian filter that is used to receive the input data, and the data output from the digital signal processor 10 are analogized. First and second digital / analog signal converters 20 and 30 for converting signals into first and second digital / analog signal converters 20 and 30 to remove quantization noise generated by the first and second digital / analog signal converters 20 and 30. The low pass filter unit 40, 50, a phase shifter 60 for inputting a carrier wave, and a predetermined phase shift, and the phase shifter (i) for the output signals of the first and second low pass filter units 40, 50. A synthesizing unit 90 for synthesizing the signals output from the first and second mixing units 70 and 80 for mixing the output signal of the phase shifter 60 with the output signal of the 60 and the synthesizing unit 90. GMSK digital side, characterized in that it comprises a band pass filter 100 for filtering the output signal Device. 2. The GMSK digital modulation device according to claim 1, wherein the first and second low pass filter units (40, 50) comprise an active filter or a switch capacitor filter using a differential amplifier to remove quantization noise. The GMSK digital modulation device of claim 1, wherein the phase shifter (60) is configured to shift the input carrier by 90 °. A process of setting the initialization and initial phase values of the shift register employed in the digital signal processor 10, receiving input data, calculating phase values due to Inter Symbol Interference (ISI), and initial phase values and Modulates the phase value due to the intersymbol interference, modulates the modulated phase with a predetermined value, calculates the number of bit length samples of the input data, calculates the quantized phase value at the moment of sampling in the input data input section, The phase value calculates and outputs the cosine function value and the sine function value, and determines whether the bit length sample number of the input data has reached a constant value. If it is a constant value, the input data temporarily stored in the shift register is shifted. After inputting the next input data to the digital signal processing unit 10 characterized in that it consists of a process of repeating the above process GMSK digital modulation methods.

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