[go: up one dir, main page]

KR930024106A - Contact Forming Method of Semiconductor Device - Google Patents

Contact Forming Method of Semiconductor Device Download PDF

Info

Publication number
KR930024106A
KR930024106A KR1019920009375A KR920009375A KR930024106A KR 930024106 A KR930024106 A KR 930024106A KR 1019920009375 A KR1019920009375 A KR 1019920009375A KR 920009375 A KR920009375 A KR 920009375A KR 930024106 A KR930024106 A KR 930024106A
Authority
KR
South Korea
Prior art keywords
contact
forming
contact hole
insulating film
semiconductor device
Prior art date
Application number
KR1019920009375A
Other languages
Korean (ko)
Inventor
김명선
김진웅
설여송
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019920009375A priority Critical patent/KR930024106A/en
Publication of KR930024106A publication Critical patent/KR930024106A/en

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

본 발명은 반도체 소자의 콘택형성방법에 관한 것으로 높은 종횡비(High Aspect Ratio)를 갖는 콘택형성시 금속의 스텝-커버리지를 향상시키기 위하여, 절연막의 일정부분을 건식식각하여 콘택홀을 형성하고, 상기 콘택홀 저면에 노출된 기판에 선택적인 증착방법으로 텅스텐을 증착하고, 예정된 개스를 사용한 플라즈마 식각으로 콘택홀 상부 모서리의 단면형상(Profile)이 완만한 경사가 이루어지도록 식각하고, 전반적으로 금속층을 증착하여 기판에 콘택시키는 금속콘택형성방법에 관한 기술이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a contact in a semiconductor device. In order to improve step-coverage of a metal when forming a contact having a high aspect ratio, a portion of an insulating layer is dry-etched to form contact holes, and Tungsten is deposited by a selective deposition method on the substrate exposed to the bottom of the hole, and the etching is performed so that the profile of the upper edge of the contact hole is gradually inclined by plasma etching using a predetermined gas, and the overall metal layer is deposited. The present invention relates to a metal contact forming method for contacting a substrate.

Description

반도체 소자의 콘택형성방법Contact Forming Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

도 2a도 내지 제2e도는 본 발명에 의한 반도체 소자의 콘택 형성 단계를 나타낸 단면도.2A to 2E are cross-sectional views illustrating a step of forming a contact of a semiconductor device according to the present invention.

Claims (3)

반도체 소자의 콘택형성방법에 있어서, 반도체 기판상에 절연막을 형성한 다음, 포토레지스트를 도포하고 예정된 콘택홀이 형성될 부분의 포토레지스트를 제거하여 절연막의 예정부분을 노출하는 단계와, 상기 노출된 절연막을 건식식각 공정으로 기판상부가 노출될때까지 식각하여 콘택홀을 형성하는 단계와, 상기 포토레지스트를 제거한 다음, 선택적인 증착방법으로 텅스텐을 상기 콘택홀의 저면부에 예정두께 증착하는 단계와, 예정된 개스로 플라즈마 식각공정을 행하여 절연막 상부면과 콘택홀의 상부모서리의 절연막을 식각하여 콘택홀 상부의 모서리를 완만하게 라운드되게하는 단계와, 상기 절연막 상부면과 상기 콘택홀 저면부에 증착된 텅스텐 상부면의 전반에 걸쳐 금속층을 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 콘택형성방법.A method of forming a contact for a semiconductor device, the method comprising: forming an insulating film on a semiconductor substrate, applying a photoresist, and removing a photoresist of a portion where a predetermined contact hole is to be formed to expose a predetermined portion of the insulating film; Forming a contact hole by etching the insulating layer until the upper portion of the substrate is exposed by a dry etching process, removing the photoresist, and depositing a predetermined thickness of tungsten on the bottom of the contact hole by a selective deposition method; Performing a plasma etching process with gas to etch the insulating film of the upper surface of the insulating film and the upper edge of the contact hole to smoothly round the corners of the upper portion of the contact hole, and the tungsten upper surface deposited on the upper surface of the insulating film and the bottom of the contact hole. Forming a metal layer over the entirety of the semiconductor device Contact formation method. 제1항에 있어서, 상기 플라즈마 식각공정시 사용하는 개스는 O2, N2또는 He를 사용하는 것을 특징으로 하는 반도체 소자의 콘택형성방법.The method of claim 1, wherein the gas used in the plasma etching process uses O 2 , N 2, or He. 제1항에 있어서, 상기 금속층은 Al, Ti, 또는 TiN으로 증착하는 것을 특징으로 하는 반도체 소자의 콘택형성방법.The method of claim 1, wherein the metal layer is formed of Al, Ti, or TiN. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920009375A 1992-05-30 1992-05-30 Contact Forming Method of Semiconductor Device KR930024106A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920009375A KR930024106A (en) 1992-05-30 1992-05-30 Contact Forming Method of Semiconductor Device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920009375A KR930024106A (en) 1992-05-30 1992-05-30 Contact Forming Method of Semiconductor Device

Publications (1)

Publication Number Publication Date
KR930024106A true KR930024106A (en) 1993-12-21

Family

ID=67296589

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920009375A KR930024106A (en) 1992-05-30 1992-05-30 Contact Forming Method of Semiconductor Device

Country Status (1)

Country Link
KR (1) KR930024106A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100399935B1 (en) * 1996-06-27 2003-12-24 주식회사 하이닉스반도체 Semiconductor device manufacturing method
KR100900680B1 (en) * 2002-12-02 2009-06-01 매그나칩 반도체 유한회사 Manufacturing Method of Semiconductor Device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100399935B1 (en) * 1996-06-27 2003-12-24 주식회사 하이닉스반도체 Semiconductor device manufacturing method
KR100900680B1 (en) * 2002-12-02 2009-06-01 매그나칩 반도체 유한회사 Manufacturing Method of Semiconductor Device

Similar Documents

Publication Publication Date Title
KR940020531A (en) Manufacturing method of metal plug in contact hole
KR950021710A (en) Capacitor Manufacturing Method of Semiconductor Device
KR930024106A (en) Contact Forming Method of Semiconductor Device
KR940005625B1 (en) Method of processing tungsten
JPH02199825A (en) Manufacture of electrode
KR970072147A (en) Cleaning method of semiconductor device
KR940002955A (en) Plug formation method in semiconductor wiring process
KR950021090A (en) Contact hole formation method of semiconductor device
KR950015592A (en) Tungsten Plug Formation Method
KR960026234A (en) Tungsten-Plug Formation Method of Semiconductor Device
KR950007100A (en) How to form self-aligned contacts
KR940015698A (en) Fine photoresist pattern formation method
KR960042958A (en) Contact hole formation method of semiconductor device
KR940001268A (en) Self-aligned contact formation method of semiconductor device
KR940016497A (en) Method of manufacturing semiconductor connection device
KR940016878A (en) Method for forming self-aligned contact of semiconductor device
KR950001899A (en) Contact formation method during PLUG process
KR940016505A (en) Contact formation method of semiconductor device
KR940016508A (en) Method for manufacturing a contact of a semiconductor device having an inclined surface
KR950006991A (en) Contact hole formation method of semiconductor device
KR930006837A (en) Tungsten Selective Deposition Using Metal Bonding Layer
KR930009105A (en) Contact formation method of semiconductor device
KR950021285A (en) Metal wiring layer formation method
KR970052188A (en) Metal wiring formation method of semiconductor device
KR970077349A (en) Structure of Metal Wiring in Semiconductor Device and Manufacturing Method Thereof

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19920530

PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 19920530

Comment text: Request for Examination of Application

PG1501 Laying open of application
E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 19950522

Patent event code: PE09021S01D

E601 Decision to refuse application
PE0601 Decision on rejection of patent

Patent event date: 19950807

Comment text: Decision to Refuse Application

Patent event code: PE06012S01D

Patent event date: 19950522

Comment text: Notification of reason for refusal

Patent event code: PE06011S01I