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KR930015358A - PLL circuit - Google Patents

PLL circuit Download PDF

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Publication number
KR930015358A
KR930015358A KR1019910022846A KR910022846A KR930015358A KR 930015358 A KR930015358 A KR 930015358A KR 1019910022846 A KR1019910022846 A KR 1019910022846A KR 910022846 A KR910022846 A KR 910022846A KR 930015358 A KR930015358 A KR 930015358A
Authority
KR
South Korea
Prior art keywords
output
voltage controlled
controlled oscillator
signal
level
Prior art date
Application number
KR1019910022846A
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Korean (ko)
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KR960009972B1 (en
Inventor
유경걸
Original Assignee
강진구
삼성전자 주식회사
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Application filed by 강진구, 삼성전자 주식회사 filed Critical 강진구
Priority to KR1019910022846A priority Critical patent/KR960009972B1/en
Publication of KR930015358A publication Critical patent/KR930015358A/en
Application granted granted Critical
Publication of KR960009972B1 publication Critical patent/KR960009972B1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

광대역의 입력주파수에 대하여 록킹 가능하도록한 PLL회로에 관한 것으로, 인가되는 입력주파수를 록킹시키기 위한 PLL회로에 있어서, 상기 입력주파수를 포함한 인가신호들을 비교하기 위한 위상 비교부, 상기 위상비교된 신호를 DC레벨로 만들기 위한 로우패스필터부, 상기 DC레벨에 따라 발진주파수를 발생하도록 다수의 전압제어발진기로된 전압제어발진기군, 상기 DC레벨을 감지해서 상기 전압 제어발진기군중 정상동작중인 전압제어발진기의 출력신호를 출력단으로 내보내고 상기 출력이 상기 위상비교기의 인가신호중 하나로 귀환되도록 하는 선택제어부로 구성된다. 기존의 PLL방식과는 달리 의도된 입력기준주파수에 관계없이 광대역의 록킹범위를 갖게되며, 특히 비디오신호의 디지탈신호 처리시 넓은 범위의 멀티싱크 수평주파수에 대하여 라인록킹된 출력주파수를 안정되게 얻을 수 있는 효과가 있다.A PLL circuit for locking to an input frequency of a wide band, comprising: a phase comparator for comparing applied signals including the input frequency; A low pass filter unit for making a DC level, a voltage controlled oscillator group having a plurality of voltage controlled oscillators to generate an oscillation frequency according to the DC level, and a voltage controlled oscillator of the voltage controlled oscillator which is normally operating And a selection control unit which outputs an output signal to an output terminal and returns the output to one of the application signals of the phase comparator. Unlike the conventional PLL method, it has a wide range of locking range regardless of the intended input reference frequency, and especially when processing digital signals of video signals, the line-locked output frequency can be stably obtained for a wide range of multi-sync horizontal frequencies. It has an effect.

Description

PLL회로PLL circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명의 1실시예에 따른 광대역의 입력주파수에 대하여 록킹(Locking) 가능한 PLL회로도.2 is a PLL circuit diagram capable of locking a wideband input frequency according to an embodiment of the present invention.

Claims (4)

인가되는 입력주파수를 록킹시키기 위한 PLL회로에 있어서, 상기 입력주파수를 포함한 인가신호들을 비교하기 위한 위상 비교부, 상기 위상비교된 신호를 DC레벨로 만들기 위한 로우패스필터부, 상기 DC레벨에 따라 발진주파수를 발생하도록 다수의 전압제어발진기로된 전압발진기군, 상기 DC레벨을 감지해서 상기 전압제어발진기군중 정상동작중인 전압제어발진기의 출력신호를 출력단으로 내보냄과 동시에 상기 출력이 상기 위상비교기의 인간신호를 출력단으로 내보냄과 동시에 상기 출력이 상기 위상비교기의 인가신호중 하나로 귀환되도록 하는 선택 제어수단을 포함하는 것을 특징으로 하는 PLL회로.A PLL circuit for locking an applied input frequency, comprising: a phase comparator for comparing applied signals including the input frequency, a low pass filter for making the phase compared signal to a DC level, oscillation according to the DC level A voltage oscillator group comprising a plurality of voltage controlled oscillators to generate a frequency, the DC level is sensed, and outputs an output signal of a voltage controlled oscillator in a normal operation among the voltage controlled oscillator groups to an output stage and at the same time the output is a human signal of the phase comparator And selection control means for sending the output to an output stage and causing the output to be returned to one of the application signals of the phase comparator. 제1항에 있어서, 상기 선택제어수단의 출력단과 상기 위상비교기의 입력측 사이에는 분주기가 더 포함되어 연결되어 있는 것을 특징으로 하는 PLL회로.The PLL circuit according to claim 1, further comprising a divider connected between an output terminal of said selection control means and an input side of said phase comparator. 제1항에 있어서, 상기 전압제어발진기군은 각각 중심주파수가 다른 다수의 전압제어발진기가 병렬로 연결되어 있는 것을 특징으로 하는 PLL회로.The PLL circuit according to claim 1, wherein the voltage controlled oscillator group has a plurality of voltage controlled oscillators connected in parallel with different center frequencies. 제1항 또는 제2항에 있어서, 상기 선택제어수단은 상기 로우패스필터의 DC레벨을 디지탈신호로 변환시키기위한 A/D변환기, 상기 디지탈신호를 감지하여 상기 전압제어발진기군중 정상동작중인 하나의 전압제어발진기출력을 선택하기 위한 신호를 발생하기 위한 제어기, 상기 선택신호에 의해 출력신호를 제어하는 멀티플렉서로 구성되는 것을 특징으로 하는 PLL회로.3. The A / D converter according to claim 1 or 2, wherein the selection control means detects the digital signal and converts the DC level of the low pass filter into a digital signal. And a controller for generating a signal for selecting a voltage controlled oscillator output, and a multiplexer for controlling the output signal by the selection signal. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910022846A 1991-12-13 1991-12-13 PLL circuit KR960009972B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910022846A KR960009972B1 (en) 1991-12-13 1991-12-13 PLL circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910022846A KR960009972B1 (en) 1991-12-13 1991-12-13 PLL circuit

Publications (2)

Publication Number Publication Date
KR930015358A true KR930015358A (en) 1993-07-24
KR960009972B1 KR960009972B1 (en) 1996-07-25

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910022846A KR960009972B1 (en) 1991-12-13 1991-12-13 PLL circuit

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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100810501B1 (en) 2005-12-08 2008-03-07 한국전자통신연구원 Wide-Band Multi-Mode Frequency Composer and Variable Frequency Divider
EP2108539B1 (en) 2008-04-09 2011-01-12 Hyundai Motor Europe Technical Center GmbH Passenger seat device for motor vehicles

Also Published As

Publication number Publication date
KR960009972B1 (en) 1996-07-25

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