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KR920005390A - 고집적 모스소자의 커패시터 제조방법 - Google Patents

고집적 모스소자의 커패시터 제조방법 Download PDF

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Publication number
KR920005390A
KR920005390A KR1019900012463A KR900012463A KR920005390A KR 920005390 A KR920005390 A KR 920005390A KR 1019900012463 A KR1019900012463 A KR 1019900012463A KR 900012463 A KR900012463 A KR 900012463A KR 920005390 A KR920005390 A KR 920005390A
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South Korea
Prior art keywords
film
etching
oxide film
masking
polycrystalline silicon
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KR1019900012463A
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KR930009578B1 (ko
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이상래
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문정환
금성일렉트론 주식회사
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02551—Group 12/16 materials
    • H01L21/02554—Oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

내용 없음

Description

고집적 모스소자의 커패시터 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명의 공정 단면도.

Claims (6)

  1. 기판위에 필드영역과 액티브영역을 구분하고 게이트산화막, 다결정 규소막, 산화막(5)을 형성하며 마스킹 및 식각작업으로 상기 다결정 규소막, 산화막을 식각한 후 측벽 스페이서를 형성하는 공정에 있어서, 상기 위에 LTo, 산화막 식각시 보호막용 질화막(10), 종각형 형상을 제조하기위한 산화막을 증착하는 공정; 마스킹 및 식각 작업에 의해 산화막(11)을 수직으로 식각하는 공정; 다시 감광제를 사용한 마스킹 및 식각작업에 의해 상기 산화막(11)의 내부를 제거하는 공정; 마스킹 및 식각작업에 의해 상기 산화막, 질화막을 제거하여 매몰 콘택트를 형성하는 공정; 노드용 다결정 규소막, 유전체, 플레이트용 다결정 규소막을 증착하고 패터닝하는 공정을 차례로 실시하여 이루어짐을 특징으로하는 고집적 모스 소자의 커패시터 제조방법.
  2. 제1항에 있어서, 산화막(5)은 1000-3500Å의 두께로 형성함을 특징으로하는 고집적 모스 소자의 커패시터 제조방법.
  3. 제1항에 있어서, 질화막(5)은 2000-8000Å의 두께로 형성함을 특징으로하는 고집적 모스 소자의 커패시터 제조방법.
  4. 제1항에 있어서, 종각형 형상의 중앙부위는 2000-8000Å 식각함을 특징으로하는 고집적 모스 소자의 커패시터 제조방법.
  5. 제1항에 있어서, 종각형 형상의 중앙부위 식각후에 노드용 다결정 규소막 증착시 종각형 중앙부 구멍내에 틈의 1000Å이상되게 형성함을 특징으로하는 고집적 모스 소자의 커패시터 제조방법.
  6. 제1항에 있어서, 노드용 다결정 규소막의 두께는 1000-2700Å으로 함을 특징으로하는 고집적 모스 소자의 커패시터 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900012463A 1990-08-13 1990-08-13 고집적 모스소자의 커패시터 제조방법 Expired - Fee Related KR930009578B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900012463A KR930009578B1 (ko) 1990-08-13 1990-08-13 고집적 모스소자의 커패시터 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900012463A KR930009578B1 (ko) 1990-08-13 1990-08-13 고집적 모스소자의 커패시터 제조방법

Publications (2)

Publication Number Publication Date
KR920005390A true KR920005390A (ko) 1992-03-28
KR930009578B1 KR930009578B1 (ko) 1993-10-07

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Family Applications (1)

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KR1019900012463A Expired - Fee Related KR930009578B1 (ko) 1990-08-13 1990-08-13 고집적 모스소자의 커패시터 제조방법

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Also Published As

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KR930009578B1 (ko) 1993-10-07

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