KR920005137B1 - A dual system of the warning driving device of electronic switching center - Google Patents

Abstract

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Description

Redundant Circuit of Electronic Switching Alarm Drive

1 is a block diagram of a redundancy circuit in the alarm drive device according to the present invention.

2 is a detailed circuit diagram of the redundant control unit of FIG.

3 is a communication diagram of the redundant control circuit between the alarm drive device according to the present invention.

* Explanation of symbols for main parts of the drawings

10: main control unit 20: redundancy control unit

30: watchdog timer 21: OR gate

22, 23: buffer 24, 25: NAND gate

26, 27: inverter

The present invention relates to a circuit for redundancy of the alarm drive device of the electronic switchboard.

Alarm drive device is a maintenance device to classify the fault condition generated in the system into emergency alarm, main alarm, and general alarm to promptly deliver it to the operator by driving the alarm sound and lamp according to each lamp.

Because alarm drives require speed and accuracy in their nature, they require the ability to duplicate two alarm drives.

SUMMARY OF THE INVENTION The present invention has been made to realize the above-described demand, and by the dual control of the two alarm drive devices, even if a failure occurs in the drive device in the active state, another alarm drive device in the standby state is successfully completed. Its purpose is to provide a redundant circuit for the alarm drive system that can take over the task and send out the appropriate alarm without delay.

The present invention is a system having two redundant alarm drive device in order to achieve the above object, receiving the status signal of the redundant state alarm drive device to determine the transfer decision, analyze and process the alarm transmission failure signal, Main control means for performing overall operation including fault signal and redundancy control signal including watchdog timer driving, and when connected to the main control means and receiving periodic signal (SELFTE) of the main control means, when the function of the corresponding alarm drive device fails It is connected to the watchdog timer that generates and transmits a function failure signal (ALMDR), and the redundant control means of the main control means, the watchdog timer and other redundant alarm control devices, and the status information received from the counterpart redundant control unit and its own status and failure information. It characterized by consisting of the redundancy control means 20 for controlling the redundancy function by using. Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram showing a redundancy circuit in an alarm driving apparatus according to the present invention, which shows the interrelationship among the constituent blocks of the redundancy circuit, in which 10 is a main control, 20 is a redundancy control, and 30 is a watchdog timer. .

As shown in the figure, a redundancy circuit includes a main control unit 10, a watchdog timer 30, and a redundancy control unit 20. The main control unit 10 consists of a Motorola M6801 Microprocessor Unit (MCU), a buffer for data transmission, and an M6821 for adjusting peripheral circuit interfaces. If a failure occurs when sending a signal, AAS signal is sent to the main control unit 10. The main control unit 10 examines this signal, and if it has a logic value of '0', assumes that a failure has occurred, and then A of the logical value '1'. / S signal is transmitted to the redundancy control unit 20. At this time, if the alarm driving device in the standby state, which is duplicated by the OUTA / S output of the redundancy control unit 20, is not switched to the active state, the AAC signal of the logic value '0' is duplicated. The main control unit 10 has a built-in microcomputer unit and receives the status signal of the redundant counterpart alarm driving device to determine the transfer decision. It analyzes and processes alarm transmission fault signals and runs a watchdog timer for overall operation including fault signals and redundancy control signals.

The watchdog timer 30 is configured as a monostable multivi-brator, and periodically receives a SELITE signal from the main controller 10 and sends an ALMDR signal to the redundant control unit 20. If the watchdog timer 30 does not receive a new SELITE signal after 180 ms after receiving the SELFTE signal of the logic value '0', the control unit 20 converts the LAMDR signal of the logic value '1' into a malfunction signal of the alarm driving device. Tell it to.

The redundancy control unit 20 relates to the redundancy control unit of the main control unit 10, the watchdog timer 10 and other redundant alarm drive devices. Signals transmitted and received between the redundancy control unit 20 in the two alarm control devices are AACO, AACE, OUTA / S, INA / S, and the output AACO and OUTA / S of one redundancy control unit 10 are the other redundancy control unit 20. Interchange as AACE and INA / S input. These signals are used as information to make a transfer decision between two states of active and standby between redundant alarm drives and examine whether two alarm drives are in a stand-by state at the same time. The inverted AACO signal is passed to the 400Hz tow generator, which allows 400Hz tow to be sent to the alarm speaker when all the redundant alarm drives fail. In this way, the duplication control unit 20 controls the duplication function by using the relative information received from the relative duplication control unit and its own state and failure information.

FIG. 2 is a detailed circuit diagram of an exemplary embodiment of the redundant control unit of FIG. 1, in which 21 is an OR gate, 22 and 23 a buffer, 24 and 25 are NAND gates, and 26 and 27 are inverters.

The redundancy control unit includes an OR gate 21 connected to a main control unit and a watchdog timer, a buffer 22 which connects an input terminal to an output terminal of the OR gate 21 and an output terminal to the other alarm driving device, and the other redundant control unit. A buffer 23 having an input connected to the NAND gate 24 having an input connected to the main control unit and a watchdog timer, an output terminal connected to an output terminal of the buffer 23 and the NAND gate 24, and the other redundant control unit; It consists of an input NAND gate 25, an inverter 26 connected to the output terminal of the NAND gate 25, and another inverter 27 connected to the inverter 26.

The redundant control unit configured as described above receives the A / S signal from the main control unit and the ALMDR signal from the watchdog timer to check the operation state of the corresponding alarm drive device. If the A / S signal is at logic value '0', normal operation is performed. If logic value '1', the drive device is in standby state. The ALMDR signal is an incoming signal output from the watchdog timer. If the logic value is '0', it is normal. If the logic value is '1', it indicates that the function of the alarm drive has failed. These two are output as OUTA / S signals through the OR gate, which in turn serves as the INA / S input for the other redundant alarm drive. The input INA / S signal checks the dual standby state of the alarm drive device and at the same time, when the counter alarm drive device becomes active to standby state, it acts as an interrupt to the main control unit so that the corresponding alarm drive device can be switched from the standby state to the active state. Make sure

The four-input NAND gate receives AACE, INA / S, ALMDR, and AAC as inputs, generates AACO as outputs, and sends them as AACE input signals of other redundant alarm drives. The AAC signal has a logic value of '0' when a failure occurs during the audible alarm transmission of the alarm drive device.If an alarm failure occurs during normal operation, the AAC signal is converted from the logic value '1' to '0' and the error occurs. Informing the redundant circuit of other alarm control devices that it has occurred. When a dual standby condition occurs, the inverted AACO signal is passed to the 400 Hz tow generator. The ALMDR signal is the output of the watchdog timer and indicates a malfunction of the alarm drive when the logic value is '0'. This signal, along with the AAC signal, forces the AACO output to a logic value of '0' so that the AACO plays the same role as in the event of an alarm outage.

Among the inputs of the NAND gate, AACE and INA / S are received from other redundant alarm control devices, and the AACO of the duplicated circuit is taken as AACE and OUTA / S as INA / S. When in normal operation, AACE and INA / S are logical values '1' indicating that the relative alarm control device is in standby state. When in standby state, AACE and INA / S have '1' and '0' respectively. Indicates that the alarm drive is active. If a watchdog timer failure or an audible alarm failure occurs in the alarm device during normal operation, the OUTA / S signal and the AACO signal are converted to logic values '1' and '0' and the OUTA / S is sent to the alarm drive device in standby state. With / S, that is, it acts as an interrupt to generate an entanglement. In case of a fault in the alarm control device in standby state when switching, the AACE input becomes a logic value '0' to indicate that a double alarm drive fault has occurred.

3 is a communication of the redundancy control circuit between the alarm drive device according to the present invention, showing the signals exchanged between the redundancy control unit. Observing this in conjunction with the circuit of FIG. 2 clearly shows the meaning of redundancy.

The present invention as described above can be applied to all the electron exchanger, and particularly effectively applied to the TDX-10.

The effect achieved by the present invention is that it can double the reliability of alarming in the exchange where immediate action should be taken in the event of a system failure. In other words, by installing two alarm control devices and controlling the redundancy, other alarm control devices in standby status can be succeeded by the successful operation even when a failure occurs in the active window. .

Claims (4)

In a system with two redundant alarm drives, it receives status signals from the redundant counter alarm drive and judges the transfer decision, analyzes and processes the alarm transmission fault signal, and the fault signal including the watchdog timer operation. Main control means 10 for performing the overall operation including the redundant control signal, connected to the main control means 10 when receiving a periodic signal (SELFTE) of the main control means 10 when the function of the corresponding alarm drive device failure Relative redundancy is connected to the watchdog timer 30 for generating and transmitting a malfunction signal ALMPR in case of a malfunction, and the redundant control means of the main control means 10, the watchdog timer 30 and other redundant alarm drive devices. Electronic switching device characterized in that it comprises a redundancy control means 20 for controlling the redundancy function by using the state information received from the control unit and its own state and fault information Beam redundancy circuit of the same device. The method of claim 1, wherein the main control means 10 comprises a microprocessor unit (MUC), a buffer for data transmission, and an interface adjusting unit for adjusting a peripheral circuit interface. Redundancy circuit of electronic switching alarm drive device. According to claim 1, The watchdog timer 30 is composed of a monostable multi-vibrator transmits a functional failure signal to the redundancy control means 20 if a new SELFTE signal is not received until 180ms after receiving the SELFTE signal Dual circuit of an electronic switch alarm drive device characterized in that. According to claim 1, wherein the redundancy control means 20 is OR gate 21 connected to the main control means 10 and the watchdog timer 30, and the first buffer connected to the output terminal of the OR gate 21 ( 22), a second buffer 23 connected to the other redundancy control means, a first NAND gate 24 connected to the main control means 10 and the watchdog timer 30, the second buffer 23 and A fourth input 2NAND gate 25 having an input terminal connected to an output terminal of the first NAND gate 24 and the other redundancy control means; a first buffer 26 connected to an output terminal of the second NAND gate 25; Redundant circuit of the electronic switch exchange information driving device, characterized in that the first buffer 26 is connected to the second buffer (27).

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