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KR920000032A - 캐시 메모리를 구비한 프로세서 - Google Patents

캐시 메모리를 구비한 프로세서 Download PDF

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Publication number
KR920000032A
KR920000032A KR1019910002886A KR910002886A KR920000032A KR 920000032 A KR920000032 A KR 920000032A KR 1019910002886 A KR1019910002886 A KR 1019910002886A KR 910002886 A KR910002886 A KR 910002886A KR 920000032 A KR920000032 A KR 920000032A
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KR
South Korea
Prior art keywords
information
cache memory
read out
command
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
KR1019910002886A
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English (en)
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KR940003318B1 (ko
Inventor
히로유키 다카이
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
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Publication of KR920000032A publication Critical patent/KR920000032A/ko
Application granted granted Critical
Publication of KR940003318B1 publication Critical patent/KR940003318B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3648—Debugging of software using additional hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)

Abstract

내용 없음

Description

캐시 메모리를 구비한 프로세서
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 1실시예를 나타낸 구성도,
제2도는 제1도에 나타낸 실시예의 동작설명도,
제3도는 캐시 메모리에 있어서 치환동작의 액세스정보단위를 나타낸 도면이다.

Claims (1)

  1. 캐시 메모리에 기억되는 정보에 부가되는 지정정보를 격납하고 격납된 정보가 캐시 메모리로부터 독출되는 때에 대응된 지정정보를 독출하는 기억수단(3)과, 외부 메모리로부터 펫치되어 캐시 메모리에 격납되는 정보에 부가되는 상기 지정정보를 결정하여 지령하는 지령수단(6), 상기 지령수단(6)으로부터 출력되는 지령에 따라 지정정보를 상기 기억수단(3)에 기입되는 기입수단(4), 캐시 메모리로부터 정보가 독출되는 때에 독출된 정보와 더불어 상기 기억수단(3)으로부터 독출되는 지정정보에 의해 지정된 정보가 캐시 메모리로부터 독출되는 것을 통지하는 통지수단(5)을 구비하여 구성된 것을 특징으로 하는 캐시 메모리를 구비한 프로세서.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910002886A 1990-02-27 1991-02-22 캐시 메모리를 구비한 프로세서 Expired - Fee Related KR940003318B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2-44555 1990-02-27
JP2044555A JPH03248244A (ja) 1990-02-27 1990-02-27 キャッシュメモリを備えたプロセッサ

Publications (2)

Publication Number Publication Date
KR920000032A true KR920000032A (ko) 1992-01-10
KR940003318B1 KR940003318B1 (ko) 1994-04-20

Family

ID=12694748

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910002886A Expired - Fee Related KR940003318B1 (ko) 1990-02-27 1991-02-22 캐시 메모리를 구비한 프로세서

Country Status (3)

Country Link
US (1) US5313608A (ko)
JP (1) JPH03248244A (ko)
KR (1) KR940003318B1 (ko)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2734468B2 (ja) * 1992-01-24 1998-03-30 三菱電機株式会社 プロセッサ
US5964893A (en) * 1995-08-30 1999-10-12 Motorola, Inc. Data processing system for performing a trace function and method therefor
US5704034A (en) * 1995-08-30 1997-12-30 Motorola, Inc. Method and circuit for initializing a data processing system
US5737516A (en) * 1995-08-30 1998-04-07 Motorola, Inc. Data processing system for performing a debug function and method therefor
EP0762280B1 (en) * 1995-08-30 2001-11-14 Motorola, Inc. Data processor with built-in emulation circuit
US7137105B2 (en) * 1999-05-12 2006-11-14 Wind River Systems, Inc. Dynamic software code instrumentation method and system
US6397382B1 (en) 1999-05-12 2002-05-28 Wind River Systems, Inc. Dynamic software code instrumentation with cache disabling feature
US7555605B2 (en) * 2006-09-28 2009-06-30 Freescale Semiconductor, Inc. Data processing system having cache memory debugging support and method therefor
US8495287B2 (en) * 2010-06-24 2013-07-23 International Business Machines Corporation Clock-based debugging for embedded dynamic random access memory element in a processor core
JP5843801B2 (ja) * 2013-03-19 2016-01-13 株式会社東芝 情報処理装置およびデバッグ方法
US10768907B2 (en) 2019-01-30 2020-09-08 Bank Of America Corporation System for transformation prediction with code change analyzer and implementer
US10824635B2 (en) 2019-01-30 2020-11-03 Bank Of America Corporation System for dynamic intelligent code change implementation
US10853198B2 (en) 2019-01-30 2020-12-01 Bank Of America Corporation System to restore a transformation state using blockchain technology

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4527236A (en) * 1980-04-04 1985-07-02 Digital Equipment Corporation Communications device for data processing system
US4635193A (en) * 1984-06-27 1987-01-06 Motorola, Inc. Data processor having selective breakpoint capability with minimal overhead
US4791550A (en) * 1985-02-13 1988-12-13 Rational Higher order language-directed computer
JPS62144246A (ja) * 1985-12-18 1987-06-27 Mitsubishi Electric Corp 計算機
US4860195A (en) * 1986-01-24 1989-08-22 Intel Corporation Microprocessor breakpoint apparatus
US4802085A (en) * 1987-01-22 1989-01-31 National Semiconductor Corporation Apparatus and method for detecting and handling memory-mapped I/O by a pipelined microprocessor
US5053949A (en) * 1989-04-03 1991-10-01 Motorola, Inc. No-chip debug peripheral which uses externally provided instructions to control a core processing unit

Also Published As

Publication number Publication date
KR940003318B1 (ko) 1994-04-20
US5313608A (en) 1994-05-17
JPH03248244A (ja) 1991-11-06

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