[go: up one dir, main page]

KR910013488A - Thin Film Transistor Driven by DIFET - Google Patents

Thin Film Transistor Driven by DIFET Download PDF

Info

Publication number
KR910013488A
KR910013488A KR1019890019109A KR890019109A KR910013488A KR 910013488 A KR910013488 A KR 910013488A KR 1019890019109 A KR1019890019109 A KR 1019890019109A KR 890019109 A KR890019109 A KR 890019109A KR 910013488 A KR910013488 A KR 910013488A
Authority
KR
South Korea
Prior art keywords
difet
electrode
thin film
film transistor
amorphous silicon
Prior art date
Application number
KR1019890019109A
Other languages
Korean (ko)
Other versions
KR960013506B1 (en
Inventor
안인호
Original Assignee
이헌조
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이헌조, 주식회사 금성사 filed Critical 이헌조
Priority to KR1019890019109A priority Critical patent/KR960013506B1/en
Publication of KR910013488A publication Critical patent/KR910013488A/en
Application granted granted Critical
Publication of KR960013506B1 publication Critical patent/KR960013506B1/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32055Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)

Abstract

내용 없음.No content.

Description

DIFET에 의해 구동되는 박막 트랜지스터Thin Film Transistor Driven by DIFET

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제3도는 본 발명의 DIFET에 의해 구동되는 박막 트랜지스터의 단면도.3 is a cross-sectional view of a thin film transistor driven by the DIFET of the present invention.

Claims (1)

유리기판(1)상에 크롬 또는 탄탈늄(Ta)금속막을 증착하고 그위에 제1게이트전극 G1(2), 금속 Pad층(3), 제2게이트전극(4)을 형성하고 이와같이 형성된 제1게이트전극 G1(2)과 제2게이트전극(4) 위에 게이트 절연층(5)을 형성한후 계속해서 게이트 절연층(5)상에 비정질 실리콘층(6)을 적층하고 DIFET소자영역(13)의 일측 및 박막 트랜지스터소자영역(14)인 비정질 실리콘층(6)위에는 비정질 실리콘층(7)을 형성시키고 나머지 DIFET소자 영역의 일측인 비정질 실리콘층(6)위에는 P+비정질 실리콘층(8)을 형성시킨후, 이렇게 형성된 상기 층위에 알루미늄 또는 크롬금속을 증착하고 그위에 애노드전극A(9), 캐소드전극 K(10) 소오스전극 S(11), 드레인전극 D(12)을 형성하여 금속 Pad층(3)을 통하여 DIFET소자의 캐소드전극 K(10)과 박막트랜지스터(14)의 소오스전극 S(11)이 상호 전기적으로 접촉되도록 구성됨을 특징으로하는 DIFET에 의해 구동되는 박막트랜지스터.Depositing a chromium or tantalum (Ta) metal film on the glass substrate 1, and forming a first gate electrode G 1 (2), a metal pad layer (3), and a second gate electrode (4) thereon. After forming the gate insulating layer 5 on the one gate electrode G 1 (2) and the second gate electrode 4, the amorphous silicon layer 6 is subsequently laminated on the gate insulating layer 5, and the DIFET device region ( 13, an amorphous silicon layer 7 is formed on the amorphous silicon layer 6, which is one side and the thin film transistor element region 14, and a P + amorphous silicon layer 8 is formed on the amorphous silicon layer 6, which is one side of the remaining DIFET element region. ), And then aluminum or chromium metal is deposited on the layer thus formed, and the anode electrode A (9), the cathode electrode K (10), the source electrode S (11), and the drain electrode D (12) are formed thereon. The cathode electrode K (10) of the DIFET device and the source electrode S (11) of the thin film transistor 14 are electrically connected to each other through the pad layer 3. A thin film transistor driven by a DIFET, characterized in that it is configured to be in contact with each other. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890019109A 1989-12-21 1989-12-21 Thin film transistor drived by difet KR960013506B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890019109A KR960013506B1 (en) 1989-12-21 1989-12-21 Thin film transistor drived by difet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890019109A KR960013506B1 (en) 1989-12-21 1989-12-21 Thin film transistor drived by difet

Publications (2)

Publication Number Publication Date
KR910013488A true KR910013488A (en) 1991-08-08
KR960013506B1 KR960013506B1 (en) 1996-10-05

Family

ID=19293291

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890019109A KR960013506B1 (en) 1989-12-21 1989-12-21 Thin film transistor drived by difet

Country Status (1)

Country Link
KR (1) KR960013506B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101822012B1 (en) 2010-12-07 2018-01-26 삼성디스플레이 주식회사 Organic light emitting display device and method for manufacturing the same

Also Published As

Publication number Publication date
KR960013506B1 (en) 1996-10-05

Similar Documents

Publication Publication Date Title
KR960015929A (en) Semiconductor device and manufacturing process
KR980003732A (en) Manufacturing method of liquid crystal display device
KR940015562A (en) Liquid crystal display device manufacturing method
KR910013488A (en) Thin Film Transistor Driven by DIFET
KR890007108A (en) Thin film transistor array and liquid crystal display device using the same
JPS567480A (en) Film transistor
ATE76222T1 (en) THIN FILM TRANSISTOR.
KR970048843A (en) Manufacturing method of liquid crystal display device having flat wiring structure and liquid crystal display device having flat wiring structure in liquid crystal display device
JPS6461061A (en) A-si thin film transistor
KR900015350A (en) Amorphous silicon thin film transistor
KR920003534A (en) Method of manufacturing thin film transistor
KR920003811A (en) Thin film EL display device and manufacturing method thereof
KR910001987A (en) Low Power Consumption Thin Film Transistor
KR900005612A (en) Amorphous Silicon Thin Film Transistor with 4 Mask Level Protection Structure
JPS6467971A (en) Thin film transistor
KR960006080A (en) Method of manufacturing thin film transistor
KR900007079A (en) Method of manufacturing thin film transistor with inclined gate electrode
KR970011944A (en) Liquid crystal display panel and its manufacturing method
KR900012371A (en) Thin film transistor and its manufacturing method
KR940012656A (en) Method of manufacturing thin film transistor
KR930014945A (en) Structure of Thin Film Transistor
KR910010648A (en) Poly Silicon Thin Film Transistor
KR930015068A (en) TFT manufacturing method using gate insulating film with step
KR920003544A (en) Thin film transistors with a plurality of gate insulating layers
KR940016613A (en) Gate pad manufacturing method of thin film transistor

Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19891221

PG1501 Laying open of application
A201 Request for examination
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 19930917

Comment text: Request for Examination of Application

Patent event code: PA02011R01I

Patent event date: 19891221

Comment text: Patent Application

G160 Decision to publish patent application
PG1605 Publication of application before grant of patent

Comment text: Decision on Publication of Application

Patent event code: PG16051S01I

Patent event date: 19960910

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 19961223

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 19961230

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 19961228

End annual number: 3

Start annual number: 1

PR1001 Payment of annual fee

Payment date: 19990906

Start annual number: 4

End annual number: 4

PR1001 Payment of annual fee

Payment date: 20000922

Start annual number: 5

End annual number: 5

PR1001 Payment of annual fee

Payment date: 20010927

Start annual number: 6

End annual number: 6

PR1001 Payment of annual fee

Payment date: 20020923

Start annual number: 7

End annual number: 7

PR1001 Payment of annual fee

Payment date: 20031001

Start annual number: 8

End annual number: 8

PR1001 Payment of annual fee

Payment date: 20040930

Start annual number: 9

End annual number: 9

PR1001 Payment of annual fee

Payment date: 20050930

Start annual number: 10

End annual number: 10

PR1001 Payment of annual fee

Payment date: 20061002

Start annual number: 11

End annual number: 11

PR1001 Payment of annual fee

Payment date: 20070928

Start annual number: 12

End annual number: 12

FPAY Annual fee payment

Payment date: 20081001

Year of fee payment: 13

PR1001 Payment of annual fee

Payment date: 20081001

Start annual number: 13

End annual number: 13

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee