KR900008894Y1 - Audio signal muting circuit of video signal recording and reproducing apparatus - Google Patents
Audio signal muting circuit of video signal recording and reproducing apparatus Download PDFInfo
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- KR900008894Y1 KR900008894Y1 KR2019860017277U KR860017277U KR900008894Y1 KR 900008894 Y1 KR900008894 Y1 KR 900008894Y1 KR 2019860017277 U KR2019860017277 U KR 2019860017277U KR 860017277 U KR860017277 U KR 860017277U KR 900008894 Y1 KR900008894 Y1 KR 900008894Y1
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/24—Signal processing not specific to the method of recording or reproducing; Circuits therefor for reducing noise
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
- G11B20/10222—Improvement or modification of read or write signals clock-related aspects, e.g. phase or frequency adjustment or bit synchronisation
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B2220/00—Record carriers by type
- G11B2220/90—Tape-like record carriers
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- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
- Television Signal Processing For Recording (AREA)
Abstract
내용 없음.No content.
Description
제 1 도는 본 고안의 회로도이다.1 is a circuit diagram of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 시정수회로 2 : 뮤팅부1: Time constant circuit 2: Muting part
MM : 단안정 멀티바이브레이터 Vcc : 전원단MM: Monostable Multivibrator Vcc: Power Stage
TR₁,TR₂ : 트랜지스터 Vsyn : 동기신호TR₁, TR₂: Transistor Vsyn: Synchronization Signal
Q,: 단안정 멀티바이브레이터의 출력단Q, : Output stage of monostable multivibrator
Lin : VTR의 왼쪽 오디오 신호 입력단자Lin: Left audio signal input terminal of VTR
Rin : VTR의 오른쪽 오디오 신호 입력단자Rin: Right audio signal input terminal of VTR
Lout : VTR의 왼쪽오디오 신호 출력단자Lout: Left audio signal output terminal of VTR
Rout : VTR의 오른쪽 오디오 신호 출력단자Rout: Right audio signal output terminal of VTR
T₁,T₂: 클록단자T₁, T₂: Clock terminal
본 고안은 영상신호 기록재생장치를 이용하여 테이프상에 영상신호를 기록하자 할 경우 영상신호가 출력되지 않을 때 생기는 잡음신호를 제거하고, 또한 테이프상에 기록된 신호를 재생시키고자 할 때 신호기록용 테이프상에 아무런 신호가 기록되어 있지 않았을 경우 오디오 출력측으로 출력되어 지는 잡음신호를 제거할 수 있도록 된 영상신호 기록재생장치의 오디오 신호 뮤팅회로에 관한 것이다.The present invention eliminates the noise signal generated when the video signal is not output when recording the video signal on the tape by using the video signal recording and reproducing apparatus, and also records the signal when reproducing the signal recorded on the tape. The present invention relates to an audio signal muting circuit of a video signal recording and reproducing apparatus capable of removing a noise signal outputted to an audio output side when no signal is recorded on a recording tape.
일반적인 영상신호 기록재생장치에서는 사용자가 원하는 프로그램을 녹화하고 있는 도중 방송국측 정전등의 외부요인에 의해서 녹화중인 프로그램이 잠시중단 되었을 경우라던가, 테이프상에 아무런 신호도 기록되어져 있지 않는 부분을 재생하는 경우나 기록된 프로그램의 재생 도중 기록이 완료된 부분이 나타나는 경우 기록신호가 없는 부분에서는 콘트롤 신호의 동기를 정확히 잡아주지 못하게 되므로 오디오출력측으로 변형된 음이 출력된다거나 잡음이 출력되게 되는 단점이 있었다.In a general video signal recording / reproducing apparatus, when a program being recorded is interrupted by an external factor such as a power outage at the broadcasting station or a part in which no signal is recorded on the tape while recording a desired program. However, if the part where the recording is completed during the playback of the recorded program appears, the control signal is not synchronized exactly in the part without the recording signal, so that the sound that is deformed to the audio output side or the noise is output.
본 고안은 상기한 단점을 해결하고자 고안된 것으로, 단안정 멀티바이브레이터와 트랜지스터, 저항 및 콘덴서로 구성된 간단한 회로를 채용하여 영상신호 기록재생장치를 가지고 테이프에 원하는 프로그램을 녹화할 경우와 테이프상에 기록된 신호를 재생시키는 과정에서 테이프상에 기록된 신호가 없을 경우에 오디오측으로 출력되어지는 잡음을 제거할 수 있도록 된 영상신호 기록재생장치의 오디오 신호 뮤팅회로를 제공하고자 함에 그 목적이 있다.The present invention has been devised to solve the above-mentioned disadvantages, and employs a simple circuit composed of a monostable multivibrator, a transistor, a resistor and a capacitor to record a desired program on a tape with a video signal recording and reproducing apparatus, It is an object of the present invention to provide an audio signal muting circuit of a video signal recording and reproducing apparatus that can remove noise output to an audio side when no signal is recorded on a tape in the process of reproducing a signal.
이하 본 고안의 구성 및 작용, 효과를 예시도면을 참조하여 상세히 설명하면 다음과 같다.Hereinafter, the configuration, operation, and effects of the present invention will be described in detail with reference to the accompanying drawings.
본 고안은 단안정 멀티바이브레이터(MM)내의 OR게이트의 한 입력단자(A₁)에 동기신호(Vsyn)의 출력단이 연결되고, 다른 한 입력단자(A₂)에는 클리어단자(CL)와 연결된 전원단(Vcc)이 연결되며, 클럭단자(T₁)(T₂)에는 클럭의 펄스폭을 제어할 수 있는 저항(Rx)과 콘덴서(Cx)로 구성된 시정수회로(1)가 연결되고, 출력단자에는 저항(R₁)(R₂)과 트랜지스터(TR₁)로 구성된 왼쪽출력음성 뮤팅부(2L)와, 저항(R₃)(R₄)과 트랜지스터(TR₂)로 구성된 오른쪽 출력음성 뮤팅부(2R)가 병렬로 결합되어진 뮤팅부(2)가 연결된 구조로 되어있다.According to the present invention, the output terminal of the synchronizing signal Vsyn is connected to one input terminal A₁ of the OR gate in the monostable multivibrator MM, and the power terminal connected to the clear terminal CL is connected to the other input terminal A₂. Vcc) is connected, and the clock terminal T₁ (T₂) is connected with a time constant circuit 1 composed of a resistor Rx and a capacitor Cx for controlling the pulse width of the clock, and an output terminal. The left output negative muting section 2L composed of the resistor R₁ (R₂) and transistor TR (and the right output negative muting section 2R composed of the resistor R₃ (R₄) and transistor TR2 are arranged in parallel. The muting unit 2 is coupled to the structure.
제 1 도는 본 고안의 회로도로서, 먼저 정상적인 동기신호가 단안정 멀티바이브레이터(MM)내의 OR게이트단자(A₁)로 입력되면 OR게이트의 다른 한 단자(A₂)는 전원단(Vcc)의 신호가 반전되어 항상 로우상태를 유지하고 있으며 OR게이트의 출력측에서는 하이신호가 출력되게 되는데, 이때 시정수회로(1)의 저항(Rx)과 콘덴서(Cx)를 조절하여 클록단자(T₁)(T₂)에서 발생되는 클록펄스폭을 동기신호의 클록펄스폭과 일치되게 하면 출력단자로는 항상 로우신호가 출력되어 뮤팅부(2)내의 트랜지스터(TR₁)와 트랜지스터(TR₂)의 베이스단자에 인가되게 된다. 따라서 트랜지스터(TR₁)와 트랜지스터(TR2)의 베이스단자에 인가되게 된다. 따라서 트랜지스터(TR1)와 트랜지스터(TR₂)는 턴오프되게 된다. 그러므로 입력단자(Lin)(Rin)에서 나오는 오른쪽, 왼쪽 음성신호는 뮤팅되지 않고 출력단자(Lout)(Rout)로 출력되게 된다.1 is a circuit diagram of the present invention. First, when a normal synchronization signal is input to the OR gate terminal A 'in the monostable multivibrator MM, the other terminal A₂ of the OR gate is inverted from the power terminal Vcc. It is always kept low and high signal is output from the output side of the OR gate. At this time, the resistance Rx and the capacitor Cx of the time constant circuit 1 are adjusted to generate the clock terminal T₁ (T₂). If the clock pulse width becomes equal to the clock pulse width of the synchronization signal, the output terminal The low signal is always output to the furnace and applied to the transistor TR 'and the base terminal of the transistor TR2 in the muting section 2. Therefore, the transistor TR 'and the base terminal of the transistor TR 2 are applied. Therefore, the transistor TR 1 and the transistor TR2 are turned off. Therefore, the right and left voice signals from the input terminal Lin are outputted to the output terminal Lout without being muted.
한편, 영상신호 기록재생장치로 원하는 프로그램을 녹화하고 있는 도중 방송국측 정전등의 외부요인으로 인하여 영상신호가 출력되지 않을 경우와 기록된 테이프를 재생할 경우 영상신호가 녹화되어 있지 않은 부분에서는 단안정 멀티바이브레이터(MM)내의 OR게이트단자(A₁)으로 동기신호(Vsyn)가 입력되지 않게된다. 또한 OR게이트(OR)의 다른 입력단(A₂)에는 전술한 것처럼 항상 로우신호가 입력되고 있으므로 OR게이트의 출력단으로 로우신호가 출력되게 된다.On the other hand, when a desired program is being recorded by the video signal recording / reproducing apparatus, when the video signal is not output due to an external factor such as a power outage at the broadcasting station or when the recorded tape is played back, the monostable multi The synchronization signal Vsyn is not inputted to the OR gate terminal A 'in the vibrator MM. In addition, since the low signal is always input to the other input terminal A2 of the OR gate OR, the low signal is output to the output terminal of the OR gate.
따라서, 출력단자로 하이신호가 출력되게 되어 트랜지스터(TR₁)와 트랜지스터(TR₂)의 베이스단자에 인가되게 된다. 따라서, 트랜지스터(TR₁)와 트랜지스터(TR₂)가 턴온된다.Therefore, output terminal The low high signal is output and applied to the base terminals of the transistor TR 'and the transistor TR2. Thus, transistor TR 'and transistor TR2 are turned on.
그러므로 입력단자(Lin)의 왼쪽 음성신호는 트랜지스터(TR₁)의 에미터단자를 통해 접지측으로 흐르게 되고, 또한 입력단자(Rin)의 오른쪽 음성신호도 트랜지스터(TR₂)의 에미터단자를 통해 접지측으로 흐르게되어 출력단자(Lout)(Rout)에는 아무 신호도 나타나지 않으므로 오른쪽, 왼쪽 음성신호는 모두 뮤팅되게 된다.Therefore, the left audio signal of the input terminal Lin flows to the ground side through the emitter terminal of the transistor TR ', and the right audio signal of the input terminal Lin also flows to the ground side through the emitter terminal of the transistor TR2. Since no signal appears at the output terminals Lout and Rout, both right and left voice signals are muted.
상기한 바와같이 본 고안은 영상신호가 기록되어 있지않은 부분이 재생될 때 발생되는 잡음과 영상신호 기록시 영상신호가 입력되지 않을 때 발생되는 잡음을 방지할 수 있는 효과가 있다.As described above, the present invention has an effect of preventing noise generated when a portion in which an image signal is not recorded is reproduced and noise generated when an image signal is not input when the image signal is recorded.
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Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019860017277U KR900008894Y1 (en) | 1986-11-06 | 1986-11-06 | Audio signal muting circuit of video signal recording and reproducing apparatus |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019860017277U KR900008894Y1 (en) | 1986-11-06 | 1986-11-06 | Audio signal muting circuit of video signal recording and reproducing apparatus |
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| Publication Number | Publication Date |
|---|---|
| KR880011013U KR880011013U (en) | 1988-07-29 |
| KR900008894Y1 true KR900008894Y1 (en) | 1990-09-29 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019860017277U KR900008894Y1 (en) | 1986-11-06 | 1986-11-06 | Audio signal muting circuit of video signal recording and reproducing apparatus |
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| Country | Link |
|---|---|
| KR (1) | KR900008894Y1 (en) |
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1986
- 1986-11-06 KR KR2019860017277U patent/KR900008894Y1/en not_active IP Right Cessation
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| KR880011013U (en) | 1988-07-29 |
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