[go: up one dir, main page]

KR890005834A - Semiconductor device - Google Patents

Semiconductor device Download PDF

Info

Publication number
KR890005834A
KR890005834A KR1019880012646A KR880012646A KR890005834A KR 890005834 A KR890005834 A KR 890005834A KR 1019880012646 A KR1019880012646 A KR 1019880012646A KR 880012646 A KR880012646 A KR 880012646A KR 890005834 A KR890005834 A KR 890005834A
Authority
KR
South Korea
Prior art keywords
semiconductor
semiconductor device
epitaxial layer
semiconductor substrate
note
Prior art date
Application number
KR1019880012646A
Other languages
Korean (ko)
Inventor
히로후미 미시로
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 아오이 죠이치, 가부시키가이샤 도시바 filed Critical 아오이 죠이치
Publication of KR890005834A publication Critical patent/KR890005834A/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/858—Complementary IGFETs, e.g. CMOS comprising a P-type well but not an N-type well

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

내용 없음No content

Description

반도체장치Semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 1실시예에 관한 반도체장치의 평면도.1 is a plan view of a semiconductor device according to one embodiment of the present invention.

제2도는 제 1도에 도시된 A-A선의 단면도.2 is a cross-sectional view taken along the line A-A shown in FIG.

Claims (1)

비저항이 작은 반도체기판(1)과, 이 반도체기판(1)상에 형성되는 에피택셜층(2) 및, 이 에피택셜층(2)표면에 형성되는 반도체소자(3)(4)를 구비해서, 상기 반도체소자 (3)(4)로의 소정전위의 공급이 상기 반도체가 판(1)으로부터 상기 에피택셜층(2)을 매개로 이루어지도록 된 것을 특징으로 하는 반도체장치.A semiconductor substrate 1 having a low specific resistance, an epitaxial layer 2 formed on the semiconductor substrate 1, and semiconductor elements 3 and 4 formed on the surface of the epitaxial layer 2 are provided. And the supply of a predetermined potential to the semiconductor element (3) (4) is such that the semiconductor is made from the plate (1) via the epitaxial layer (2). ※ 참고사항 : 최초 출원 내용에 의하여 공개하는 것임.※ Note: It is to be disclosed by the contents of the original application.
KR1019880012646A 1987-09-30 1988-09-29 Semiconductor device KR890005834A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP62247358A JPS6489557A (en) 1987-09-30 1987-09-30 Semiconductor device
JP87-247358 1987-09-30

Publications (1)

Publication Number Publication Date
KR890005834A true KR890005834A (en) 1989-05-17

Family

ID=17162232

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880012646A KR890005834A (en) 1987-09-30 1988-09-29 Semiconductor device

Country Status (2)

Country Link
JP (1) JPS6489557A (en)
KR (1) KR890005834A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2602974B2 (en) * 1990-02-27 1997-04-23 株式会社東芝 CMOS semiconductor integrated circuit device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60128655A (en) * 1983-12-16 1985-07-09 Hitachi Ltd semiconductor equipment
JPS61131477A (en) * 1984-11-30 1986-06-19 Fujitsu Ltd Semiconductor device
JPS61131476A (en) * 1984-11-30 1986-06-19 Fujitsu Ltd semiconductor equipment

Also Published As

Publication number Publication date
JPS6489557A (en) 1989-04-04

Similar Documents

Publication Publication Date Title
KR870005459A (en) Semiconductor device
KR840003869A (en) Arrow indicator
KR920007199A (en) Semiconductor memory device
KR900010999A (en) Semiconductor devices
KR890016679A (en) Semiconductor device
KR910010728A (en) Hybrid Integrated Circuit Devices
KR880000891A (en) Printer mounted terminal
KR840006871A (en) Display
KR900005593A (en) Semiconductor device
KR910007159A (en) MOS semiconductor device
DE69013646D1 (en) Integrated semiconductor circuit device with contacting areas on the edge of the semiconductor chip.
KR880013255A (en) Bipolar transistor
KR900017129A (en) Back metallization scheme for semiconductor device and manufacturing method thereof
KR910013570A (en) Schottky diodes
KR890005834A (en) Semiconductor device
KR950020965A (en) Semiconductor devices
KR900004040A (en) Semiconductor integrated circuit devices
KR900019220A (en) Semiconductor device
KR860001488A (en) Semiconductor Devices with Bipolar Transistors and IIL
KR910013565A (en) Lateral semiconductor device
KR900001025A (en) Semiconductor device
KR910008853A (en) Semiconductor device and manufacturing method
KR900013615A (en) Master slice type semiconductor integrated circuit device
KR900005561A (en) Semiconductor device
KR920007093A (en) Hybrid semiconductor device

Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19880929

PG1501 Laying open of application
E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 19910629

Patent event code: PE09021S01D

E601 Decision to refuse application
PE0601 Decision on rejection of patent

Patent event date: 19920612

Comment text: Decision to Refuse Application

Patent event code: PE06012S01D

Patent event date: 19910629

Comment text: Notification of reason for refusal

Patent event code: PE06011S01I