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KR890004410B1 - Automatic increasing circuit of ringing signal - Google Patents

Automatic increasing circuit of ringing signal Download PDF

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Publication number
KR890004410B1
KR890004410B1 KR1019860009249A KR860009249A KR890004410B1 KR 890004410 B1 KR890004410 B1 KR 890004410B1 KR 1019860009249 A KR1019860009249 A KR 1019860009249A KR 860009249 A KR860009249 A KR 860009249A KR 890004410 B1 KR890004410 B1 KR 890004410B1
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circuit
output
flip
flop
ring tone
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KR880006866A (en
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고한일
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삼성전자 주식회사
한형수
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/02—Calling substations, e.g. by ringing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M1/00—Substation equipment, e.g. for use by subscribers

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Telephonic Communication Services (AREA)
  • Devices For Supply Of Signal Current (AREA)

Abstract

내용 없음.No content.

Description

전화기의 착신음 자동 증가회로Increasing ringing tone of telephone

제1도는 본 발명의 회로도.1 is a circuit diagram of the present invention.

제2도는 착신음 발생 지시 신호도.2 is a ring tone generation indication signal.

제3도는 본 발명의 카운터 회로 펄스 파형도.3 is a counter circuit pulse waveform diagram of the present invention.

제4도는 분압회로.4 is a voltage divider circuit.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

a : 착신음 발생회로 b : 착신음 증폭회로a: ring tone generator circuit b: ring tone amplifier circuit

c : 스피커 d : 디코더c: speaker d: decoder

e : 분압회로 A : 착신음 발생 지시 신호e: voltage divider circuit A: ring tone generation indication signal

B : 착신음 C : 증폭도 조정용 전압인가단자B: Ringing sound C: Voltage amplification terminal for amplification degree adjustment

R1, R2: 분배용 저항 VR1: 가변저항R 1 , R 2 : Distribution resistor VR 1 : Variable resistor

g : 카운터 회로 F1-F4: 플립플롭g: Counter circuit F 1 -F 4 : Flip-flop

G : 낸드게이트 D1-D10: 다이오드G: NAND gate D 1 -D 10 : Diode

본 발명은 전화기의 착신음 자동증가 회로에 관한 것으로 전화기의 착신음이 일정횟수 이상울리면 착신음의 음량이 점차 증가하게 하여 전화기 주변에 소음이 심하거나 전화기로부터 수화자가 멀리 떨어져 있을 지라도 착신음을 들을수 있게 한 것이다.The present invention relates to a circuit for automatically increasing the ringing tone of a telephone, and when the ringing tone of the telephone is more than a predetermined number of times, the volume of the ringing tone is gradually increased so that the ringing tone can be heard even when the noise is severe around the telephone or the receiver is far from the telephone.

통상 전화기의 착신음은 음량 조절놉을 조절하여 그 조정이 한번 정해지면 다시 조절할때까지 정한 음량으로만 동작되어 착신음이 너우 시끄럽거나 듣지 못하는 겅우 송화자는 수화자가 없는 것으로 간주하고 전화를 끊어 버리는 경우도 있었다.In general, the ringing tone of the telephone is adjusted to the volume control knob, and once the adjustment is made, it operates only at the set volume until it is adjusted again. there was.

본 발명은 이를 개선하기 위하여 착신음을 점차 커지게 하며 착신음의 발생횟수가 10회가 되면 다시 처음부터 할수 있게 하였으며 분압회로의 출력이 서로 영향을 미치는 것을 방지하기 위하여 역전압 방지용 ,다이오드를 사용한 것으로 도면을 참조하여 설명하면 다음과 같다.In order to improve this, the ringing tone is gradually increased and the number of ringing sounds is made 10 times. Therefore, the reverse voltage prevention diode is used to prevent the output of the voltage divider circuit from affecting each other. Referring to the following.

착신음 발생지시회로(A)에 의하여 착신음(B)을 발생하는 착신음 발생회로(가)를 착신음 증폭회로(나) 및 분배저항(R1)(R2)에 연결한다. 분배저항(R1)(R2)은 플립플롭(F1-F4)으로 구성되는 카운터(사)의 클럭단자(C1)를 구동한다.A ringing tone generating circuit (A) for generating a ringing sound (B) by the ringing tone generating instruction circuit (A) is connected to the ringing tone amplifying circuit (B) and the distribution resistor (R 1 ) (R 2 ). The distribution resistor R 1 (R 2 ) drives the clock terminal C 1 of the counter, which is composed of flip-flops F 1 -F 4 .

카운터회로(사) 출력 (Q1-Q4)은 디코더(라)와 낸드게이트(G)에 각각 연결되며 낸드게이트(G)출력은 카운터회로(사)의 클리어 단자에 연결된다. 디코더(라) 출력은 분압회로(마)를 거쳐 각 기준레벨 마디의 다이오드(D1-D4)를 통하여 착신음 증폭회로(나)를 제어한다. 이때 저항(R23)과 가변저항(VR1)으로 기준치를 설정한다.The counter circuit (Q) outputs (Q 1 -Q 4 ) are connected to the decoder (D) and the NAND gate (G), respectively, and the NAND gate (G) output is connected to the clear terminal of the counter circuit (G). The decoder (D) output controls the ring tone amplifier circuit (B) through the voltage dividing circuit (E) through the diodes D 1 -D 4 of each reference level node. At this time, the reference value is set by the resistor R 23 and the variable resistor VR 1 .

이와같이 구성된 본 발명에서 송화자의 발신에 의하여 수신측 수화기에 착신음 발생지시신호( A)가 전달됐을 경우 착신음 발생회로(가)에서는 제2도와 같은 신호가 발생하게 된다. 제2도의 신호는 착신음 증폭회로(나)에 가해짐과 동시에 분배용 저항(R1) (R2)으로 분배되어 카운터로 (사)에 인가된다.In the present invention configured as described above, when the ring tone generating instruction A is transmitted to the receiving receiver by the caller, the ring tone generating circuit A generates a signal as shown in FIG. 2. The signal of FIG. 2 is applied to the ring tone amplifier circuit (b) and simultaneously distributed to the distribution resistor (R 1 ) (R 2 ) and applied to (g) as a counter.

제2도의 신호가 최초의 플립플롭(F1)에 인가되면 플립플롭(F1)의 클럭단자(C1)에 제2도의 신호가 입력되면 플립플롭(F1)은 포지티브에지에서 동작하게 되어 제2도 파형의ㄱ부분에서 제3도의 Q1파형의 ㅁ과 같은 파형을 발생시킨다.When the signal of FIG. 2 is applied to the first flip-flop F 1 , when the signal of FIG. 2 is input to the clock terminal C 1 of the flip-flop F 1 , the flip-flop F 1 is operated at the positive edge. In a part of the waveform of FIG. 2, a waveform equal to ㅁ of the Q 1 waveform of FIG. 3 is generated.

플립플롭(F1)의 Q1에서 발생된 신호는 디코더(라)의 20단자에 인가됨과 동시에 플립플롭(F2)의 클럭단자(C2)에 네거티브에지에서 동작하도록 반전되어 입력된다. 플 립플롭(F1,)의 출력인 Q1파형의 네거티브에지인 ㅂ부분에서 플립플롭(F2)의 출력(Q2)인 ㅅ이 발생한다. 같은 원리로 플립플롭(F2)의 출력(Q2)(ㅇ)부분에서 플립플롭(F3)출력(R3)에 (ㅊ)부분이 발생한다. 플립플롭(F3)출력(Q3)에서 (ㅋ)부분은 출력(Q2)의 (ㅈ)부분에 의하여 발생한다.The signal generated at Q 1 of the flip-flop F 1 is applied to the 2 0 terminal of the decoder D and at the same time is inverted and input to the clock terminal C 2 of the flip-flop F 2 to operate at the negative edge. Flip-flops (F 1,) the output (Q 2) of oi of the flip-flop (F 2) in the connections to the negative part f of the output Q 1 of the waveform occurs. On the same principle and the flip-flop (F 2), the output (Q 2) (o) a flip-flop (F 3), the output (R 3) is (ㅊ) portion generated at a portion of the. The (ㅋ) portion of the flip-flop (F 3 ) output (Q 3 ) is caused by the () portion of the output (Q 2 ).

이 (ㅋ)부분에 의하여 뒷단 플립플롭(F4)의 출력(Q4)에 (ㅌ)이 발생한다.This (B) causes (ㅌ) to occur at the output Q 4 of the rear flip-flop F 4 .

카운터 출력에 의해서 플립플롭(F1)의 클럭단자(C1)에 10개의 착신음이 입력되면 플립플롭(F1-F4)각각의 출력은 1, 0, 1, 0으로 되고 11째의 착신음이 입력되면 출력은 각각 1, 0, 1, 1로 되어 앤드게이트(G)에 가해진다. 앤드게이트(G)에 1, 0, 1, 1의 입력이 가해지면 앤드게이트(G)출력은 하이레벨에서 로우레벨로 떨어지므로 카운터회로(사)를 클리어하여 처음상태로 돌아가도록 한다.When 10 ringing tones are inputted to the clock terminal C 1 of the flip-flop F 1 by the counter output, each of the outputs of the flip-flop F 1 to F 4 becomes 1, 0, 1, 0 and the 11th ringing tone When is input, the output becomes 1, 0, 1, 1, respectively, and is applied to the AND gate G. When the inputs of 1, 0, 1, and 1 are applied to the AND gate G, the AND gate G output falls from the high level to the low level, so the counter circuit 4 is cleared to return to the initial state.

제4도는 분압회로에 관한 것으로 디코더(라)에서 출력되는 0-9단자의 일정한 전압을 분배용 저항(R3-R22)을 사용하여 다이오드 D1-D10을 통하여 출력되는 전압 0-9의 순서로 점점 커지도록 조정한다. 그리하여 C점의 전압은 착신음이 울리는 횟수가 증가함에 따라 커지게 되고, 그 전압이 증폭회로(나)의 음량조절단자에 가해져서. C점의 전압에 따라 착신음의 음량이 변하게 된다. 이때 저항(R23)은 착신음 음량 조절용 가변저항(VR1)이 최소상태가 있을때 소리가 전혀나지 않는 것을 방지하기 위한 저항이다.4 is a voltage divider circuit, and a voltage 0-9 outputted through diodes D 1 -D 10 by using a resistor R 3- R 22 for the constant voltage of the 0-9 terminals output from the decoder D. Adjust to increase in order. Thus, the voltage at point C increases as the number of ringing rings increases, and the voltage is applied to the volume control terminal of the amplifying circuit (B). The volume of the ringing tone changes according to the voltage at point C. At this time, the resistance (R 23 ) is a resistance for preventing the sound does not come out at all when the variable resistance (VR 1 ) for the incoming sound volume is at a minimum state.

이상과 같이 스피커에서 발생하는 착신음의 음량은 착신음의 반복횟수가 증가함에 따라 커지게 되고, 그 횟수는 10회가 되면 착신음의 음량이 처음상태로 돌아가 다시 10회가 될때까지 증가한다.As described above, the volume of the ringing tone generated by the speaker increases as the number of repetitions of the ringing tone increases, and the number of the ringing tone increases to 10 times when the volume of the ringing tone returns to the initial state again.

이상과 같이 본원 고안은 착신음을 단계적으로 변화시켰으므로 사용자에게 매우 편리한 발명이다.As described above, the present invention changes the ringing tone step by step, which is a very convenient invention for the user.

Claims (1)

착신음 발생회로(가)를 착신음 증폭회로(나) 및 카운터회로(사)에 병렬 연결시키고 플립플롭 (F1-F4)으로 구성된 카운터회로(사)의 출력 (F1,F2,F3,F4)에 디코더(라) 및 낸드게이트(G)를 병렬연결하며, 낸드게이트(G)출력은 플립플롭(F1-F4)의 클리어단자(CL1-CL4)에 인가하고 디코더(라) 출력은 분압회로(마) 및 다이오드(D1-D10)를 통하여 착신음 증폭회로에 전달하고 저항(R23)및 가변저항(VR1)에 의하여 착신신호의 초기치를 변화시킴을 특징으로 하는 전화기의 착신음 자동증가 회로.Output of the counter circuit (F) consisting of flip-flops (F 1 -F 4 ) connected in parallel with the ring tone generator circuit (A) to the ring tone amplifier circuit (B) and the counter circuit (F) (F 1 , F 2 , F 3) , F 4) parallel connected to the decoder (d) and a NAND gate (G) and a NAND gate (G) output is applied to the clear terminal (CL 1 -CL 4) of the flip-flop (F 1 -F 4), and the decoder (D) The output is transmitted to the ring tone amplifier circuit through the divider circuit (e) and diodes (D 1 -D 10 ) and changes the initial value of the incoming signal by the resistor (R 23 ) and the variable resistor (VR 1 ). Ringer automatic increase circuit of telephone.
KR1019860009249A 1986-11-03 1986-11-03 Automatic increasing circuit of ringing signal Expired KR890004410B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019860009249A KR890004410B1 (en) 1986-11-03 1986-11-03 Automatic increasing circuit of ringing signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019860009249A KR890004410B1 (en) 1986-11-03 1986-11-03 Automatic increasing circuit of ringing signal

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KR880006866A KR880006866A (en) 1988-07-25
KR890004410B1 true KR890004410B1 (en) 1989-11-03

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Application Number Title Priority Date Filing Date
KR1019860009249A Expired KR890004410B1 (en) 1986-11-03 1986-11-03 Automatic increasing circuit of ringing signal

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