KR890000225Y1 - Power supply control circuit with mutting function - Google Patents
Power supply control circuit with mutting function Download PDFInfo
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- KR890000225Y1 KR890000225Y1 KR2019850016325U KR850016325U KR890000225Y1 KR 890000225 Y1 KR890000225 Y1 KR 890000225Y1 KR 2019850016325 U KR2019850016325 U KR 2019850016325U KR 850016325 U KR850016325 U KR 850016325U KR 890000225 Y1 KR890000225 Y1 KR 890000225Y1
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Abstract
내용 없음.No content.
Description
제1도는 본 고안의 회로도.1 is a circuit diagram of the present invention.
제2도는 본 고안의 각부에 나타나는 타이밍 챠아트.2 is a timing chart shown in each part of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
Q1-Q2: 트랜지스터 ZD1: 제너다이오드Q 1 -Q 2 : Transistor ZD 1 : Zener Diode
D1-D2: 다이오드 C1-C2: 증폭부D 1 -D 2 : Diode C 1 -C 2 : Amplifier
R1-R7: 저항 1 : 증폭부R 1 -R 7 : Resistor 1: Amplifier
2 : 로직제어부 3 : 메카니즘 구동부2: logic control unit 3: mechanism driving unit
본 고안은 전원 온, 오프시에 발생되는 팝잡음(POP Noise)을 뮤트시킴과 동시에 제어부의 전원의 상승, 하강시간을 단축하여 안정된 회로동작을 수행하도록 한 뮤팅기능을 겸한 전원제어회로에 관한 것이다.The present invention relates to a power supply control circuit having a muting function to mute the pop noise generated when the power is turned on and off, and to shorten the rise and fall times of the power supply of the controller to perform stable circuit operation. .
종래에는 전원전압의 상승, 하강시간(Rising/Falling Time)이 길어 이와 같은 전원 전압을 로직회로에 사용하는 경우에는, 회로동작이 불안정 하므로 해서 이에따라 구동되는 기계적 구동장치가 순간적으로 오동작 되는 등의 문제점이 있었다.In the related art, when a power supply voltage rises or falls, the rise / falling time is long, such a circuit operation is unstable when the power supply voltage is used in a logic circuit. Thus, a mechanical drive device driven accordingly may malfunction immediately. There was this.
본 고안은 이러한점을 감안하여 전원전압의 상승, 하강시간을 최대한 단축시킴과 동시에 뮤팅기능도 겸하여 행할 수 있도록 안출한 것으로,The present invention is designed to reduce the rise and fall time of the power supply as much as possible, and also to perform the muting function.
이를 첨부도면에 의하여 상세히 설명하면 다음과 같다.When described in detail by the accompanying drawings as follows.
제1도에 도시한 바와 같이, 교류전원 입력단자(AC)에 브리지 다이오드(BD)를 통하여 콘덴서(C1), 증폭부(1), 다이오드(D1), (D2), 저항(R3) 및 트랜지스터(Q1)의 콜렉터를 접속하고, 상기 다이오드(D2)의 캐소우드측에는 저항(R1)을 통하여 상기 다이오드(D1)의 에노우드측 및 콘덴서(C2)가 베이스에 접속된 트랜지스터(Q3)의 에미터와 콘덴서(C3)를 접속하며, 상기 트랜지스터(Q3)의 콜렉터에는 저항(R5)을 통하여 트랜지스터(Q2)의 베이스 및 저항(R2)을 접속함과 동시에, 저항(R6)을 통하여는 저항(R7)을 통하여 증폭부(1)의 출력단에 콜렉터가 접속된 트랜지스터(Q1)의 베이스를 접속하고, 통상의 로직제어부(2)를 통하여 메카니즘 구동부(3)가 에미터에 접속된 트랜지스터(Q1)의 베이스에는 저항(R4)을 통하여 저항(R3)의 일측 및 콘덴서(C4)를 접속함과 동시에 제너다이오드(ZD1) 및 트랜지스터(Q2)의 콜렉터를 접속하여 구성한다.As shown in FIG. 1, the capacitor C 1 , the amplifier 1, the diodes D 1 , D 2 , and the resistor R are connected to the AC power input terminal AC through the bridge diode BD. 3) and to a connection for a collector of the transistor (Q 1) and said diode (D 2) of enoic wood side of the diode (D 1) through the resistor (R 1), the side of cathode and capacitor (C 2) base The emitter of the connected transistor Q 3 and the capacitor C 3 are connected, and the base of the transistor Q 2 and the resistor R 2 are connected to the collector of the transistor Q 3 through a resistor R 5 . At the same time as the connection, the base of the transistor Q 1 connected with the collector is connected to the output terminal of the amplifier 1 through the resistor R 7 through the resistor R 6 , and the normal logic control unit 2 is connected. through the mechanism driving unit 3, the base of the transistor (Q 1) is connected to the emitter resistor (R 4) contact the one side and a condenser (C 4) of the resistance (R 3) through the At the same time it constitutes a collector connected to the zener diode (ZD 1) and the transistor (Q 2).
미설명부호 10은, 오디오 입력단자이고, 20은, 오디오 출력단자이다.Reference numeral 10 denotes an audio input terminal, and 20 denotes an audio output terminal.
이와 같이 구성된 본 고안의 작용효과를 설명하면 다음과 같다.Referring to the effect of the present invention configured as described above are as follows.
우선, 제2도에 나타낸 시간(to)에서 제1도에 도시한 본 고안 회로에 교류전원(AC)이 인가되면, 브리지 다이오드(BD)를 통하여 콘덴서(C1)에는 제2(a)도에서와 같이 시간(to)부터 전하가 충전되기 시작하여 시간(t1)에 도달하면 충전이 완료된다.First, when the AC power source AC is applied to the inventive circuit shown in FIG. 1 at the time to shown in FIG. 2, the capacitor C 1 is connected to the capacitor C 1 through the bridge diode BD. As in, the charge starts to charge from time to and the charge is completed when time t 1 is reached.
이와 같은 콘덴서(C1)의 양단전의(B1 +)는 중폭부(1)의 동작전원으로 가해짐과 동시에, 다이오드(D2)를 통하여는 콘덴서(C3)에 전하가 충전되며, 저항(R3)을 통하여는 콘덴서(C4)에 전하가 충전되기 시작한다.(B 1 + ) before both ends of the capacitor C 1 is applied to the operating power supply of the medium width part 1, and the charge is charged to the capacitor C 3 through the diode D 2 . Through R 3 , the capacitor C 4 begins to be charged.
여기서 콘덴서(C3)의 양단전위는 콘덴서(C1)의 양단전위와 동일한 상승시간과 값을 가진다.Here, both potentials of the capacitor C 3 have the same rise time and value as both potentials of the capacitor C 1 .
한편, 콘덴서(C3)의 양단전위는 제2(b)도에서와 같이 시간(t0)부터 서서히 증가하기 시작하여(t1)이후가 되면 하이 상태가 되므로 트랜지스터(Q3)는 차단상태가 된다.On the other hand, since the potential of both ends of the capacitor C 3 starts to increase gradually from the time t 0 as in FIG. 2 (b) and becomes high after t 1 , the transistor Q 3 is in the cutoff state. Becomes
즉, 트랜지스터(Q3)는 시간(t0~t1)동안에는 도통상태로 있다가 시간(t1)이후에는 차단상태가 되므로, (R2)의 양단전위는 제2(c)도에서와 같이 시간(t0~t1)사이에 콘덴서(C3)의 충전전압에서 트랜지스터(Q3)의 콜렉터, 에미터간의 전압을 감산한 전압이 나타나게 되고, 이 전압은 각각 저항(R5), (R6)을 통하여 트랜지스터(Q2), (Q4)를 시간(t0~t1)동안 도통시키게 되므로, 전원 온시에 증폭부(1)에서 발생되는 팝잡음음 저항(R7) 및 도통된 트랜지스터(Q1)의 콜렉터와 에미터를 통하여 뮤트시킴과 동시에, 트랜지스터(Q2) 역시시간(t0~t1)동안 도통 되므로, 트랜지스터(Q1)의 베이스 전위는 로우상태를 유지하게 되어 트랜지스터(Q1)의 에미터 전위인 로직제어부(2)의 전원은 제2(d)도에서와 같이 시간(t0~t1)동안 로우상태를 유지하다가 트랜지스터(Q2)가 차단상태로 되는 시간(t1)이후에 트랜지스터(Q1)의 베이스 전위는 급속하게 제너다이오드(ZD1)의 설정 전압까지 상승하게 된다.That is, since the transistor Q 3 is in the conduction state for the time t 0 to t 1 and becomes the blocking state after the time t 1 , the potentials of both ends of (R 2 ) are different from those in FIG. 2 (c). as time (t 0 ~ t 1) is the collector, the voltage obtained by subtracting the voltage between the emitter of the capacitor (C 3) a transistor (Q 3) in the terminal voltage of the being to appear between the voltage are each resistor (R 5), Since transistors Q 2 and Q 4 are turned on for time t 0 to t 1 through R 6 , the pop noise resistance R 7 generated by the amplifier 1 at power-on and At the same time the mute Sikkim through the collector and the emitter of the conduction of the transistor (Q 1), the transistor (Q 2), too, because conductive for time (t 0 ~ t 1), the base potential of the transistor (Q 1) maintains a low state, to the emitter of the power supply electric potential of the control logic (2) of the transistor (Q 1) is the 2 (d) even while maintaining a low state for a time (t 0 ~ t 1) such as a transistor in the Is (Q 2) has a cut-off state the base potential of the time (t 1) the transistor (Q 1) after the rapid rise to the set voltage of the zener diode (ZD 1) is a.
따라서 트랜지스터(Q1)의 에미터 전위도 제2(d)도에 나타낸 시간(t1)에서 급속하게 상승되므로 상승시간이 로직제어부(2)는 빠란 시간내에 안정하게 되므로 오동작을 방지할 수가 있다.Therefore, since the emitter potential of the transistor Q 1 also rises rapidly at the time t 1 shown in FIG. 2 (d), the rise time of the logic controller 2 is stable within a short time, thereby preventing malfunction. .
이와 같은 안정상태로 회로동작을 수행하닥 기기의 전원을 시간(t2)에서 오프시키게 되면, 콘덴서(C1)의 양단전위는 제2(a)도에 나타낸 시간(t2)이후부터는 증폭부(1), 로직제어부(2) 및 메카니즘 구동부(3)로 방전되기 시작하여 점차로 낮아지게 되다가 콘덴서(C2)의 양단전위에서 다이오드(D1)의 순방향 전압 강하분을 감산한값보다 낮아지게 되는 시간(t2)직후 부터는 제2(b)도에서와 같이 콘덴서(C2)의 충전전하도 다이오드(D1)를 통하여 방전되기 시작하여 제2(b)도에 나타낸 시간(t3)으로부터 트랜지스터(Q3)는 다시 도통상태가 된다.When the power of the device is turned off at time t 2 while performing the circuit operation in such a stable state, the potential of both ends of the capacitor C 1 is increased after the time t 2 shown in FIG. 2 (a). (1), it starts to discharge to the logic control unit 2 and the mechanism driving unit 3, and gradually decreases, and then becomes lower than the value obtained by subtracting the forward voltage drop of the diode D 1 from both potentials of the capacitor C 2 . Immediately after the time t 2 , the charge charge of the capacitor C 2 starts to be discharged through the diode D 1 as shown in FIG. 2 b, and the time t 3 shown in FIG. The transistor Q 3 is again brought into a conductive state.
따라서 저항(R2)의 양단전위는 제2(c)도에 나타낸 시간(t3)에서와 같이 갑자기 높아져 시간(t3)에서 다시 트랜지스터(Q2), (Q4)를 도통시키게 되어 콘덴서(C3)에 충전된 전하가 완전 방전되는 시간(t5) 직전까지 도통시키게 된다.Therefore, the potential of both ends of the resistor R 2 is suddenly increased as in the time t 3 shown in FIG. 2 (c), and the transistor Q 2 and Q 4 become conductive again at the time t 3 . The charge charged in (C 3 ) is conducted until immediately before the time t 5 when the discharge is completed.
이와 같이 하여 전원(AC)을 오프시킬때에 증폭부(1)에서 발생하는 팝잡음을 트랜지스터(Q4)가 도통된 상태를 유지하는 긴시간 동안 뮤트시킴과 동시에, 로직제어부(2)의 전원(B2) 역시도 제2(c)도에 나타낸 시간(t3)에서 트랜지스터(Q2)가 도통되므로 트랜지스터(Q1)의 베이스 전위가 갑자기 로우전위가 되어 제2(d)도에 나타낸 시간(t3)에서 갑자기 로우상태가 되는 것이어서 로직제어부(2)의 하강시간이 단축 되므로 오동작을 배제할 수가 있는 것이다.In this manner, when the power supply AC is turned off, the pop noise generated in the amplifier 1 is muted for a long time while the transistor Q 4 is kept conducting, and at the same time, the power supply of the logic controller 2 is turned off. (B 2 ) Since the transistor Q 2 is also conducting at the time t 3 shown in FIG. 2 (c), the base potential of the transistor Q 1 suddenly becomes low potential and is shown in FIG. 2 (d). Since it suddenly goes to a low state at (t 3 ), the fall time of the logic control unit 2 is shortened, thereby preventing malfunction.
이상에서와 같이 동작되는 본 고안은 전원 온. 오프시에 발생되는 팝잡음을 뮤트함과 동시에 로직제어부의 전원의 상승, 하강 시간을 최대한 단축시켜 로직제어부 및 메카니즘 구동부의 오동작을 방지할 수가 있는 것이다.The present invention operates as described above is powered on. It is possible to prevent the malfunction of the logic control unit and the mechanism driving unit by muting the pop noise generated at the time of off and reducing the rise and fall time of the power supply of the logic control unit as much as possible.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019850016325U KR890000225Y1 (en) | 1985-12-07 | 1985-12-07 | Power supply control circuit with mutting function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019850016325U KR890000225Y1 (en) | 1985-12-07 | 1985-12-07 | Power supply control circuit with mutting function |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR870010880U KR870010880U (en) | 1987-07-13 |
| KR890000225Y1 true KR890000225Y1 (en) | 1989-03-08 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019850016325U Expired KR890000225Y1 (en) | 1985-12-07 | 1985-12-07 | Power supply control circuit with mutting function |
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| Country | Link |
|---|---|
| KR (1) | KR890000225Y1 (en) |
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1985
- 1985-12-07 KR KR2019850016325U patent/KR890000225Y1/en not_active Expired
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| Publication number | Publication date |
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| KR870010880U (en) | 1987-07-13 |
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