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KR880005525A - Random recording automatic prevention circuit of recording / playback equipment - Google Patents

Random recording automatic prevention circuit of recording / playback equipment Download PDF

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Publication number
KR880005525A
KR880005525A KR860009054A KR860009054A KR880005525A KR 880005525 A KR880005525 A KR 880005525A KR 860009054 A KR860009054 A KR 860009054A KR 860009054 A KR860009054 A KR 860009054A KR 880005525 A KR880005525 A KR 880005525A
Authority
KR
South Korea
Prior art keywords
signal
recording
prevention
output
predetermined
Prior art date
Application number
KR860009054A
Other languages
Korean (ko)
Other versions
KR890003722B1 (en
Inventor
서정훈
Original Assignee
한형수
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 한형수, 삼성전자 주식회사 filed Critical 한형수
Priority to KR1019860009054A priority Critical patent/KR890003722B1/en
Publication of KR880005525A publication Critical patent/KR880005525A/en
Application granted granted Critical
Publication of KR890003722B1 publication Critical patent/KR890003722B1/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

내용 없음No content

Description

기록/재생기기의 임의기록 자동방지회로Random recording automatic prevention circuit of recording / playback equipment

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본발명의 회로도.1 is a circuit diagram of the present invention.

Claims (1)

소정제어 신호에 의해 서보 및 메카니즘을 제어하는 서보회로(20) 및 메카니즘(30)과, 소정신호를 입력하여 기록매체에 기록하는 동시에 기록 매체에 기록된 소정신호를 픽업하여 출력하는 기록/재생부(70)를 구비한 기록/재생기기의 임의 기록 자동방지 회로에 있어서, 모드선택신호 또는 기록방지 인식신호를 입력하여 소정제어 및 기록방지 제어신호를 출력하는 동시에 시스템을 제어하는 시스콘(10)과, 상기 시스콘 (10)에서 출력하는 제어신호에 의해 입력되는 신호를 기록신호 또는 재생신호로 변환처리하는 신호처리부(40)와, 상기 시스콘(10)에서 출력되는 기록방지 제어신호를 입력하여 특정 주파수의 기록방지 신호를 발생하고 신호처리부(40)에서 출력하는 기록신호와 믹싱증록 출력하는 제1수단 (50)(60)과, 상기 기록/재생부(70)에서 픽업되어 출력되는 신호를 입력하고 필터링하여 기록방지 신호와 기록재생 신호를 분리검출하여 기록방지 인식신호와 기록재생 신호를 상기 스시콘(10)과 신호처리부(40)로 각각 출력하는 제2수단(80)(90)으로 구성함을 특징으로 한다.Servo circuit 20 and mechanism 30 for controlling the servo and mechanism by a predetermined control signal, and a recording / reproducing section for inputting a predetermined signal to record on a recording medium and picking up and outputting a predetermined signal recorded on a recording medium. 6. An arbitrary recording automatic prevention circuit of a recording / reproducing apparatus provided with 70, which inputs a mode selection signal or a recording prevention recognition signal to output a predetermined control and a recording prevention control signal and simultaneously controls the system. And a signal processing unit 40 for converting a signal input by the control signal output from the scissor 10 into a recording signal or a reproduction signal, and a write prevention control signal output from the scissor 10. First means 50 and 60 for generating a recording prevention signal of a specific frequency and outputting a mixing signal and a recording signal output from the signal processing unit 40, and being picked up and output from the recording / reproducing unit 70; Second means 80 for inputting and filtering a signal to separately detect a recording prevention signal and a recording / playback signal, and output the recording prevention recognition signal and the recording / playback signal to the sushicon 10 and the signal processor 40, respectively. 90) characterized in that the configuration. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019860009054A 1986-10-29 1986-10-29 Free recording protect circuits of recorder & rerecoder KR890003722B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019860009054A KR890003722B1 (en) 1986-10-29 1986-10-29 Free recording protect circuits of recorder & rerecoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019860009054A KR890003722B1 (en) 1986-10-29 1986-10-29 Free recording protect circuits of recorder & rerecoder

Publications (2)

Publication Number Publication Date
KR880005525A true KR880005525A (en) 1988-06-29
KR890003722B1 KR890003722B1 (en) 1989-09-30

Family

ID=19253043

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860009054A KR890003722B1 (en) 1986-10-29 1986-10-29 Free recording protect circuits of recorder & rerecoder

Country Status (1)

Country Link
KR (1) KR890003722B1 (en)

Also Published As

Publication number Publication date
KR890003722B1 (en) 1989-09-30

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