[go: up one dir, main page]

KR870003624A - A/d 또는 d/a 변환기 - Google Patents

A/d 또는 d/a 변환기 Download PDF

Info

Publication number
KR870003624A
KR870003624A KR1019860007936A KR860007936A KR870003624A KR 870003624 A KR870003624 A KR 870003624A KR 1019860007936 A KR1019860007936 A KR 1019860007936A KR 860007936 A KR860007936 A KR 860007936A KR 870003624 A KR870003624 A KR 870003624A
Authority
KR
South Korea
Prior art keywords
counter
current
converter
integrator
clock supplied
Prior art date
Application number
KR1019860007936A
Other languages
English (en)
Other versions
KR950007466B1 (ko
Inventor
이꾸로 하따
Original Assignee
오오가 노리오
소니 가부시끼 가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 오오가 노리오, 소니 가부시끼 가이샤 filed Critical 오오가 노리오
Publication of KR870003624A publication Critical patent/KR870003624A/ko
Application granted granted Critical
Publication of KR950007466B1 publication Critical patent/KR950007466B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
    • H03M1/162—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in a single stage, i.e. recirculation type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/50—Analogue/digital converters with intermediate conversion to time interval
    • H03M1/52—Input signal integrated with linear return to datum

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

내용 없음

Description

A/D 또는 D/A 변환기
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일실시예의 접속도.
제2도는 본 발명의 일실시예에 있어서 2배의 주파수의 클럭의 생성의 설명에 사용하는 파형도.
제3도는 본 발명의 일실시예의 동작 설명에 사용하는 파형도.
제4도는 및 제5도는 본 발명의 일실시예의 설명에 사용하는 파형도.
* 도면의 주요부분에 대한 부호의 설명
1 : 연산증폭기, 2 : 적분콘덴서, 6 : 입력단자, 9, 10 : 전류원, 11, 12 : 비교기, 14 : 제어회로, 17 : 클럭발생회로, 18 : 지연회로, 19 : EX-OR 게이트

Claims (1)

  1. 적분기와, 상기 적분기에 전류를 공급하는 복수의 전류원과, 상기 각 전류원에 대응하여 설치된 복수의 카운터를 구비하고, 상기 카운터의 비트수에 대응하여 상기 각 전류원의 전류치의 가중치를 부가하도록 한 적분형 A/D 또는 D/A 변환기에 있어서, 상기 복수의 카운터 중에서 하위 비트의 카운터에 공급하는 클럭을 상위 비트의 카운터에 공급하는 클럭보다 높은 주파수로 설정을 함과 함께, 상기 하위 비트의 카운터 및 상기 상위 비트의 카운터에 공급되는 상기 클럭에 대응하여 상기 각 전류원의 전류치를 설정하도록 한 것을 특징으로 하는 A/D 또는 D/A 변환기.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019860007936A 1985-09-24 1986-09-23 A/d 또는 d/a 변환기 KR950007466B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP210763 1985-09-24
JP60210763A JPS6271335A (ja) 1985-09-24 1985-09-24 Ａ／ｄ又はｄ／ａ変換器

Publications (2)

Publication Number Publication Date
KR870003624A true KR870003624A (ko) 1987-04-18
KR950007466B1 KR950007466B1 (ko) 1995-07-11

Family

ID=16594726

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860007936A KR950007466B1 (ko) 1985-09-24 1986-09-23 A/d 또는 d/a 변환기

Country Status (8)

Country Link
US (1) US4731602A (ko)
JP (1) JPS6271335A (ko)
KR (1) KR950007466B1 (ko)
CA (1) CA1257932A (ko)
DE (1) DE3632429C2 (ko)
FR (1) FR2590092B1 (ko)
GB (1) GB2182218B (ko)
NL (1) NL191965C (ko)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01162420A (ja) * 1987-12-19 1989-06-26 Nippon Hoso Kyokai <Nhk> サブレンジ型ａ／ｄ変換装置
DE3739208A1 (de) * 1987-11-19 1989-06-01 Siemens Ag Analog-digital-umsetzer
DE3800804A1 (de) * 1988-01-14 1989-07-27 Bodenseewerk Geraetetech Digital-analog-wandleranordnung
DE3916482A1 (de) * 1989-05-20 1990-11-22 Thomson Brandt Gmbh Verfahren zur umwandlung von aus datenworten gebildeten digitalen signalen sowie digital/analog-wandler
KR920009206B1 (ko) * 1990-01-25 1992-10-14 삼성전자 주식회사 적분형 아날로그/디지탈 변환기의 기준전원 자동 제어회로
JPH05308599A (ja) * 1991-12-30 1993-11-19 Samsung Electron Co Ltd プリンティング方法及びこれに適合したプリンティング装置
US5926155A (en) * 1993-02-02 1999-07-20 Hitachi, Ltd. Digital video display system
US6522982B1 (en) * 1999-09-24 2003-02-18 Cirrus Logic, Inc. Energy-to-pulse converter systems, devices, and methods wherein the output frequency is greater than the calculation frequency and having output phasing
US7038610B2 (en) * 2001-07-19 2006-05-02 Rohm Co., Ltd. Integration type A/D converter, and battery charger utilizing such converter
US7336213B2 (en) * 2004-12-17 2008-02-26 Stmicroelectronics Pvt. Ltd. Polarity independent precision measurement of an input voltage signal
WO2009062306A1 (en) * 2007-11-15 2009-05-22 Kaben Wireless Silicon Inc. Sampling filter using multiple clocks
US7659840B2 (en) * 2008-02-15 2010-02-09 Analog Devices, Inc. Sigma-delta conversion circuit suitable for photocurrent measurement applications
CN106788439B (zh) * 2016-11-30 2021-06-15 上海集成电路研发中心有限公司 积分型模数转换器转移特性的调节系统及方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT318764B (de) * 1967-07-26 1974-11-11 Oesterr Studien Atomenergie Verfahren und Vorrichtung zur Messung von Impulsamplituden
US3582947A (en) * 1968-03-25 1971-06-01 Ibm Integrating ramp analog to digital converter
IT1017612B (it) * 1974-05-15 1977-08-10 Sits Soc It Telecom Siemens Mono codecodificatore in particola re per sistemi telefonici a divisio ne di tempo
US4125896A (en) * 1977-06-15 1978-11-14 Hentschel Instruments, Inc. Digital normalizing circuit
JPS5799821A (en) * 1980-12-15 1982-06-21 Sony Corp Digital-to-analogue converter
JPH063878B2 (ja) * 1981-10-08 1994-01-12 ソニ−株式会社 デジタル・アナログ変換装置
JPS58164318A (ja) * 1982-03-25 1983-09-29 Sony Corp アナログ／デイジタル変換装置

Also Published As

Publication number Publication date
US4731602A (en) 1988-03-15
GB8622865D0 (en) 1986-10-29
GB2182218B (en) 1988-12-29
GB2182218A (en) 1987-05-07
DE3632429C2 (de) 1994-10-06
FR2590092A1 (fr) 1987-05-15
FR2590092B1 (fr) 1991-04-19
NL191965C (nl) 1996-11-04
DE3632429A1 (de) 1987-04-23
NL8602414A (nl) 1987-04-16
NL191965B (nl) 1996-07-01
JPS6271335A (ja) 1987-04-02
CA1257932A (en) 1989-07-25
KR950007466B1 (ko) 1995-07-11

Similar Documents

Publication Publication Date Title
KR870003624A (ko) A/d 또는 d/a 변환기
KR900011144A (ko) 듀티제어 회로장치
KR830008558A (ko) 파형변환회로(波形變換回路)
KR840004333A (ko) 아날로그 디지탈 변환장치
KR880014446A (ko) 마이크로콤퓨터의 클록생성회로
KR880013328A (ko) 디지탈·애널로그 변환장치
KR890006085A (ko) Pll 회로
KR920019080A (ko) 전압/펄스폭 변환회로
KR880014452A (ko) 마이크로프로세서용 입.출력 회로장치
KR880013310A (ko) 단측파대 변조기
KR880011802A (ko) 반도체장치
KR900001127A (ko) 클램프회로
KR880010409A (ko) 잡음 감쇠기
KR890004495A (ko) 리셋트신호 발생회로
KR860000779A (ko) 색신호 처리장치
KR900013722A (ko) 신경 회로망을 이용한 a/d변환기 회로
MY100773A (en) Frequency to current converter circuit.
KR840006090A (ko) 제 산 회 로
KR940004964A (ko) 최소치회로
KR920015709A (ko) 겹침방지 클락펄스 발생회로
KR830004622A (ko) 전 원 회 로
KR920015728A (ko) 전압레벨검출회로
KR870007513A (ko) 출력회로
KR860003695A (ko) 트윈(twin) 위상제어 정류장치
KR920015737A (ko) 연산회로

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19860923

PA0201 Request for examination
PG1501 Laying open of application
E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 19950314

Patent event code: PE09021S01D

G160 Decision to publish patent application
PG1605 Publication of application before grant of patent

Comment text: Decision on Publication of Application

Patent event code: PG16051S01I

Patent event date: 19950614

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 19950912

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 19951016

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 19951016

End annual number: 3

Start annual number: 1

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee