KR860009427A - 2-위상 클록신호 공급 쉬프트 레지스터형 반도체 메모리장치 - Google Patents
2-위상 클록신호 공급 쉬프트 레지스터형 반도체 메모리장치 Download PDFInfo
- Publication number
- KR860009427A KR860009427A KR1019860003929A KR860003929A KR860009427A KR 860009427 A KR860009427 A KR 860009427A KR 1019860003929 A KR1019860003929 A KR 1019860003929A KR 860003929 A KR860003929 A KR 860003929A KR 860009427 A KR860009427 A KR 860009427A
- Authority
- KR
- South Korea
- Prior art keywords
- shift register
- phase clock
- clock signal
- signal supply
- type semiconductor
- Prior art date
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/18—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
- G11C19/182—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes
- G11C19/184—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes with field-effect transistors, e.g. MOS-FET
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Shift Register Type Memory (AREA)
Abstract
Description
Claims (4)
- 쉬프트 레지스터 소자들과 상기 쉬프트 레지스터 소자들에 2-위상 클록신호들을 공급하기 위한 제1 및 제2의 2-위상 클록신호 타인들을 포함하되, 상기 2-위상 클록신호들은 서로 중첩되지 않는 파형들을 가지며, 상기 제1,2-위상 클록 신호라인은 상기 쉬프트 레지스터의 짝수 순위 쉬프트 레지스터 소자들에 연결되며, 상기 제2의 2-위상 클록신호 라인은 상기 쉬프트 레지스터의 홀수 순위 쉬프트 레지스터 소자들에 연결되며, 상기쉬프트 레지스터 소자들 각각은; 출력신호를 발생시키기 위한 출력노드와, 2-위상 클록신호들 중 하나를 수신하기 위한 클록신호 공급 노드와, 상기 출력노드와 상기 클록신호 공급노드사이에 연결되며 또한 제어 게이트를 갖는 게이트와, 상기 게이트의 상기 제어노드를 미리 충전시키기 위해 선행하는 쉬프트 레지스터 소자의 출력신호에 반응하는 충전회로와, 그리고 상기 게이트의 상기 제어노드의 충전을 해제하기 위해 뒤를 잇는 쉬프트 레지스터의 출력에 반응하는 방전회로를 포함하는 것이 특징인 2-위상 클록신호공급 쉬프트 레지스터형 반도체 메모리장치.
- 제1항에서, 상기 쉬프트 레지스터 소자들 각각은 상기 쉬프트 레지스터 소자들 각각의 상기 출력노드에 연결되는 전위유지 기능을 갖는 래치회로를 더 포함하는 것이 특징인 2-위상 클록신호 공급 쉬프트 레지스터형 반도체 메모리장치.
- 제1항에서, 상기 쉬프트 레지스터 소자들 각각은 상기 쉬프트 레지스터 소자들 각각의 입력에 연결되는 전위유지 기능을 갖는 레지회로를 더 포함하는 것이 특징인 2-위상 클록신호 공급 쉬프트 레지스터형 반도체 메모리장치.
- 제2항에서, 상기 쉬프트 레지스터 소자들 각각은 상기 쉬프트 레지스터 소자들 각각의 입력측에 연결되는 전위 유지기능을 갖는 래치호로를 더 포함하는 것이 특징인 2-위상 클록신호 공급 쉬프트 레지스터형 반도체 메모리장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP107824 | 1985-05-20 | ||
JP60107824A JPS61265798A (ja) | 1985-05-20 | 1985-05-20 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR860009427A true KR860009427A (ko) | 1986-12-22 |
KR900006142B1 KR900006142B1 (ko) | 1990-08-24 |
Family
ID=14468965
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019860003929A KR900006142B1 (ko) | 1985-05-20 | 1986-05-20 | 두 위상 클록신호 공급 쉬프트 레지스터형 반도체 메모리장치 |
Country Status (4)
Country | Link |
---|---|
US (1) | US4720815A (ko) |
EP (1) | EP0202912A3 (ko) |
JP (1) | JPS61265798A (ko) |
KR (1) | KR900006142B1 (ko) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5544101A (en) | 1994-03-28 | 1996-08-06 | Texas Instruments Inc. | Memory device having a latching multiplexer and a multiplexer block therefor |
US6320797B1 (en) | 1999-02-24 | 2001-11-20 | Micron Technology, Inc. | Method and circuit for regulating the output voltage from a charge pump circuit, and memory device using same |
US6160723A (en) * | 1999-03-01 | 2000-12-12 | Micron Technology, Inc. | Charge pump circuit including level shifters for threshold voltage cancellation and clock signal boosting, and memory device using same |
KR100430099B1 (ko) * | 1999-03-02 | 2004-05-03 | 엘지.필립스 엘시디 주식회사 | 쉬프트 레지스터 회로 |
US6985388B2 (en) * | 2001-09-17 | 2006-01-10 | Sandisk Corporation | Dynamic column block selection |
US7170802B2 (en) * | 2003-12-31 | 2007-01-30 | Sandisk Corporation | Flexible and area efficient column redundancy for non-volatile memories |
US6560146B2 (en) * | 2001-09-17 | 2003-05-06 | Sandisk Corporation | Dynamic column block selection |
US7379330B2 (en) * | 2005-11-08 | 2008-05-27 | Sandisk Corporation | Retargetable memory cell redundancy methods |
US8102705B2 (en) | 2009-06-05 | 2012-01-24 | Sandisk Technologies Inc. | Structure and method for shuffling data within non-volatile memory devices |
US8027195B2 (en) * | 2009-06-05 | 2011-09-27 | SanDisk Technologies, Inc. | Folding data stored in binary format into multi-state format within non-volatile memory devices |
US7974124B2 (en) * | 2009-06-24 | 2011-07-05 | Sandisk Corporation | Pointer based column selection techniques in non-volatile memories |
US20110002169A1 (en) * | 2009-07-06 | 2011-01-06 | Yan Li | Bad Column Management with Bit Information in Non-Volatile Memory Systems |
US8144512B2 (en) | 2009-12-18 | 2012-03-27 | Sandisk Technologies Inc. | Data transfer flows for on-chip folding |
US8468294B2 (en) * | 2009-12-18 | 2013-06-18 | Sandisk Technologies Inc. | Non-volatile memory with multi-gear control using on-chip folding of data |
US8725935B2 (en) | 2009-12-18 | 2014-05-13 | Sandisk Technologies Inc. | Balanced performance for on-chip folding of non-volatile memories |
US9342446B2 (en) | 2011-03-29 | 2016-05-17 | SanDisk Technologies, Inc. | Non-volatile memory system allowing reverse eviction of data updates to non-volatile binary cache |
US8842473B2 (en) | 2012-03-15 | 2014-09-23 | Sandisk Technologies Inc. | Techniques for accessing column selecting shift register with skipped entries in non-volatile memories |
US8681548B2 (en) | 2012-05-03 | 2014-03-25 | Sandisk Technologies Inc. | Column redundancy circuitry for non-volatile memory |
US9490035B2 (en) | 2012-09-28 | 2016-11-08 | SanDisk Technologies, Inc. | Centralized variable rate serializer and deserializer for bad column management |
US8897080B2 (en) | 2012-09-28 | 2014-11-25 | Sandisk Technologies Inc. | Variable rate serial to parallel shift register |
US9076506B2 (en) | 2012-09-28 | 2015-07-07 | Sandisk Technologies Inc. | Variable rate parallel to serial shift register |
US9934872B2 (en) | 2014-10-30 | 2018-04-03 | Sandisk Technologies Llc | Erase stress and delta erase loop count methods for various fail modes in non-volatile memory |
US9224502B1 (en) | 2015-01-14 | 2015-12-29 | Sandisk Technologies Inc. | Techniques for detection and treating memory hole to local interconnect marginality defects |
US10032524B2 (en) | 2015-02-09 | 2018-07-24 | Sandisk Technologies Llc | Techniques for determining local interconnect defects |
US9269446B1 (en) | 2015-04-08 | 2016-02-23 | Sandisk Technologies Inc. | Methods to improve programming of slow cells |
US9564219B2 (en) | 2015-04-08 | 2017-02-07 | Sandisk Technologies Llc | Current based detection and recording of memory hole-interconnect spacing defects |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1240110A (en) * | 1967-12-14 | 1971-07-21 | Plessey Co Ltd | Improvements in or relating to switching circuits |
JPS6023438B2 (ja) * | 1976-08-05 | 1985-06-07 | 松下電器産業株式会社 | 走査パルス発生回路 |
US4250406A (en) * | 1978-12-21 | 1981-02-10 | Motorola, Inc. | Single clock CMOS logic circuit with selected threshold voltages |
JPS56117394A (en) * | 1980-02-20 | 1981-09-14 | Hitachi Ltd | Two phase dynamic shift register |
JPS6066396A (ja) * | 1983-09-20 | 1985-04-16 | Fujitsu Ltd | シフトレジスタ |
JPS6095651A (ja) * | 1983-10-31 | 1985-05-29 | Toshiba Corp | 記憶装置 |
-
1985
- 1985-05-20 JP JP60107824A patent/JPS61265798A/ja active Granted
-
1986
- 1986-05-19 US US06/864,248 patent/US4720815A/en not_active Expired - Lifetime
- 1986-05-20 KR KR1019860003929A patent/KR900006142B1/ko not_active IP Right Cessation
- 1986-05-20 EP EP86303815A patent/EP0202912A3/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
EP0202912A2 (en) | 1986-11-26 |
JPH0377598B2 (ko) | 1991-12-11 |
US4720815A (en) | 1988-01-19 |
KR900006142B1 (ko) | 1990-08-24 |
JPS61265798A (ja) | 1986-11-25 |
EP0202912A3 (en) | 1989-05-24 |
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