KR860003660A - 높은 스위칭 속도와 래치업(latchup)효과를 받지 아니하는 상보형 반도체 장치 - Google Patents
높은 스위칭 속도와 래치업(latchup)효과를 받지 아니하는 상보형 반도체 장치Info
- Publication number
- KR860003660A KR860003660A KR1019850007087A KR850007087A KR860003660A KR 860003660 A KR860003660 A KR 860003660A KR 1019850007087 A KR1019850007087 A KR 1019850007087A KR 850007087 A KR850007087 A KR 850007087A KR 860003660 A KR860003660 A KR 860003660A
- Authority
- KR
- South Korea
- Prior art keywords
- subject
- semiconductor device
- switching speed
- high switching
- complementary semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/859—Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0167—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59214617A JPS61111576A (ja) | 1984-10-13 | 1984-10-13 | 半導体装置 |
| JP59-214617 | 1984-10-13 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR860003660A true KR860003660A (ko) | 1986-05-28 |
| KR900004871B1 KR900004871B1 (ko) | 1990-07-08 |
Family
ID=16658687
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019850007087A Expired KR900004871B1 (ko) | 1984-10-13 | 1985-09-26 | 높은 스위칭 속도와 래치업(latchup)효과를 받지 아니하는 상보형 반도체 장치 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4893164A (ko) |
| EP (1) | EP0178991B1 (ko) |
| JP (1) | JPS61111576A (ko) |
| KR (1) | KR900004871B1 (ko) |
| DE (1) | DE3581045D1 (ko) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120142467A1 (en) * | 2010-12-01 | 2012-06-07 | Hyundai Motor Company | Idler device |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61111576A (ja) * | 1984-10-13 | 1986-05-29 | Fujitsu Ltd | 半導体装置 |
| US5206535A (en) * | 1988-03-24 | 1993-04-27 | Seiko Epson Corporation | Semiconductor device structure |
| EP0357410B1 (en) * | 1988-09-01 | 1993-11-03 | Fujitsu Limited | Semiconductor integrated circuit device |
| US5223451A (en) * | 1989-10-06 | 1993-06-29 | Kabushiki Kaisha Toshiba | Semiconductor device wherein n-channel MOSFET, p-channel MOSFET and nonvolatile memory cell are formed in one chip and method of making it |
| JPH03203348A (ja) * | 1989-12-29 | 1991-09-05 | Sony Corp | 半導体装置及び半導体装置の製法 |
| US5210437A (en) * | 1990-04-20 | 1993-05-11 | Kabushiki Kaisha Toshiba | MOS device having a well layer for controlling threshold voltage |
| KR920008951A (ko) * | 1990-10-05 | 1992-05-28 | 김광호 | 더블도우프된 채널스톱층을 가지는 반도체장치 및 그 제조방법 |
| JP3184298B2 (ja) * | 1992-05-28 | 2001-07-09 | 沖電気工業株式会社 | Ｃｍｏｓ出力回路 |
| EP0637073A1 (en) * | 1993-07-29 | 1995-02-01 | STMicroelectronics S.r.l. | Process for realizing low threshold P-channel MOS transistors for complementary devices (CMOS) |
| US5500548A (en) * | 1995-01-05 | 1996-03-19 | Texas Instruments Incorporated | Non-epitaxial CMOS structures and processors |
| US5739058A (en) * | 1995-12-14 | 1998-04-14 | Micron Technology, Inc. | Method to control threshold voltage by modifying implant dosage using variable aperture dopant implants |
| JPH1092950A (ja) | 1996-09-10 | 1998-04-10 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
| US6878595B2 (en) * | 2003-01-27 | 2005-04-12 | Full Circle Research, Inc. | Technique for suppression of latchup in integrated circuits (ICS) |
| US7773442B2 (en) | 2004-06-25 | 2010-08-10 | Cypress Semiconductor Corporation | Memory cell array latchup prevention |
| US9842629B2 (en) | 2004-06-25 | 2017-12-12 | Cypress Semiconductor Corporation | Memory cell array latchup prevention |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4229756A (en) * | 1979-02-09 | 1980-10-21 | Tektronix, Inc. | Ultra high speed complementary MOS device |
| JPS5643605A (en) * | 1979-09-18 | 1981-04-22 | Fujitsu Ltd | Photoswitch |
| JPS57143854A (en) * | 1981-02-27 | 1982-09-06 | Toshiba Corp | Complementary type metal oxide semiconductor device and its manufacture |
| JPS57211248A (en) * | 1981-06-22 | 1982-12-25 | Hitachi Ltd | Semiconductor integrated circuit device |
| JPS5821857A (ja) * | 1981-07-31 | 1983-02-08 | Seiko Epson Corp | アナログ・デイジタル混載集積回路 |
| JPS5871650A (ja) * | 1981-10-26 | 1983-04-28 | Hitachi Ltd | 半導体集積回路装置 |
| JPS5874083A (ja) * | 1981-10-28 | 1983-05-04 | Seiko Instr & Electronics Ltd | Ｍｉｓ集積回路とその製造方法 |
| JPS58170047A (ja) * | 1982-03-31 | 1983-10-06 | Fujitsu Ltd | 半導体装置 |
| JPS5969948A (ja) * | 1982-10-15 | 1984-04-20 | Fujitsu Ltd | マスタ−スライス型半導体集積回路 |
| US4516313A (en) * | 1983-05-27 | 1985-05-14 | Ncr Corporation | Unified CMOS/SNOS semiconductor fabrication process |
| JPS60767A (ja) * | 1983-06-17 | 1985-01-05 | Hitachi Ltd | 半導体装置 |
| DE3340560A1 (de) * | 1983-11-09 | 1985-05-15 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum gleichzeitigen herstellen von schnellen kurzkanal- und spannungsfesten mos-transistoren in vlsi-schaltungen |
| JPS60123055A (ja) * | 1983-12-07 | 1985-07-01 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| FR2571178B1 (fr) * | 1984-09-28 | 1986-11-21 | Thomson Csf | Structure de circuit integre comportant des transistors cmos a tenue en tension elevee, et son procede de fabrication |
| JPS61111576A (ja) * | 1984-10-13 | 1986-05-29 | Fujitsu Ltd | 半導体装置 |
-
1984
- 1984-10-13 JP JP59214617A patent/JPS61111576A/ja active Granted
-
1985
- 1985-09-26 KR KR1019850007087A patent/KR900004871B1/ko not_active Expired
- 1985-10-10 EP EP85401971A patent/EP0178991B1/en not_active Expired - Lifetime
- 1985-10-10 DE DE8585401971T patent/DE3581045D1/de not_active Expired - Lifetime
-
1989
- 1989-05-05 US US07/348,132 patent/US4893164A/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120142467A1 (en) * | 2010-12-01 | 2012-06-07 | Hyundai Motor Company | Idler device |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0178991A3 (en) | 1986-12-03 |
| US4893164A (en) | 1990-01-09 |
| EP0178991B1 (en) | 1991-01-02 |
| KR900004871B1 (ko) | 1990-07-08 |
| EP0178991A2 (en) | 1986-04-23 |
| DE3581045D1 (de) | 1991-02-07 |
| JPS61111576A (ja) | 1986-05-29 |
| JPH0144021B2 (ko) | 1989-09-25 |
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Legal Events
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| A201 | Request for examination | ||
| PA0109 | Patent application |
St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
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| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
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| R17-X000 | Change to representative recorded |
St.27 status event code: A-3-3-R10-R17-oth-X000 |
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| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
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| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
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| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
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| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
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| G160 | Decision to publish patent application | ||
| PG1605 | Publication of application before grant of patent |
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| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
St.27 status event code: A-1-2-D10-D22-exm-PE0701 |
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| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
St.27 status event code: A-2-4-F10-F11-exm-PR0701 |
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| PR1002 | Payment of registration fee |
St.27 status event code: A-2-2-U10-U11-oth-PR1002 Fee payment year number: 1 |
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| FPAY | Annual fee payment |
Payment date: 19930507 Year of fee payment: 4 |
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St.27 status event code: A-4-4-U10-U13-oth-PC1903 Not in force date: 19940709 Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE |
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| PN2301 | Change of applicant |
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| PN2301 | Change of applicant |
St.27 status event code: A-5-5-R10-R13-asn-PN2301 St.27 status event code: A-5-5-R10-R11-asn-PN2301 |
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| R18-X000 | Changes to party contact information recorded |
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| R18-X000 | Changes to party contact information recorded |
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| PN2301 | Change of applicant |
St.27 status event code: A-5-5-R10-R13-asn-PN2301 St.27 status event code: A-5-5-R10-R11-asn-PN2301 |
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| P22-X000 | Classification modified |
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| P22-X000 | Classification modified |
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