KR860001705B1 - Constant Frequency Waveform Generation Circuit of High Voltage Heating Equipment - Google Patents
Constant Frequency Waveform Generation Circuit of High Voltage Heating Equipment Download PDFInfo
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- KR860001705B1 KR860001705B1 KR1019840008071A KR840008071A KR860001705B1 KR 860001705 B1 KR860001705 B1 KR 860001705B1 KR 1019840008071 A KR1019840008071 A KR 1019840008071A KR 840008071 A KR840008071 A KR 840008071A KR 860001705 B1 KR860001705 B1 KR 860001705B1
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- high voltage
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- 238000010438 heat treatment Methods 0.000 title claims description 5
- 239000003990 capacitor Substances 0.000 claims description 8
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- 230000000737 periodic effect Effects 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
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Abstract
내용 없음.No content.
Description
제1도는 종래의 회로도.1 is a conventional circuit diagram.
제2도는 종래의 방식에 따른 펄스 파형도.2 is a pulse waveform diagram according to a conventional scheme.
제3도는 본 발명의 회로도.3 is a circuit diagram of the present invention.
제4도는 본 발명에 따른 펄스 파형도.4 is a pulse waveform diagram according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
OP1: 비교기 C1: 콘덴서OP 1 : Comparator C 1 : Capacitor
Q1-Q4: 트렌지스터 R1-R6: 저항Q 1 -Q 4 : Transistor R 1 -R 6 : Resistance
a : 입력단자 d : 출력단자a: Input terminal d: Output terminal
본 발명은 고전압 가열장치(High Power Heating System)에 이응되는 펄스파형을 입력펄스에 대하여 정수배마다 한개의 펄스를 출력하여 퍽스폭을 입력펄스와 동일하게 함은 물론 이에 정확히 동기시키기 위한 정수배 주기파형 발생회로에 관한 것이다.According to the present invention, a pulse waveform corresponding to a high power heating system (High Power Heating System) outputs one pulse for each integer multiple of an input pulse, so that the pulse width is equal to the input pulse, and an integer frequency periodic waveform is generated to accurately synchronize it. It is about a circuit.
종래에는 제1도에 도시한 바와같이, 입력펄스를 n진 카운터(1)에 가해지도록 연결하고, 카운터(1)의 각 비트(bit) 출력과 입력펄스를 앤드게이트(2)를 통하여 출력신호를 생성하게 된다.Conventionally, as shown in FIG. 1, the input pulses are connected to the n-
따라서, 4배의 주기를 갖는 경우에는 제2(a)도에 도시한 바와같은 입력파형을 4진 카운터(1)에 의하여 카운트 하게되면 2°의 비트출력은 제2(b)도에 도시한 파형과 같이 나타나게되고, 2'의 비트출력은 제2(c)도에 도시한 파형과 같이 나타나게 된다. 이때, 앤드게이트(2)를 통하여 2° 비트출력과 2,비트출력, 입력퍽스를 앤드시키면 제2(d)도와 같은 파형을 얻게 되었다.Therefore, in the case of having a 4 times period, if the input waveform as shown in FIG. 2 (a) is counted by the
그러나, 이 방식은 앤드게이트 및 카운터를 사용해야 하므로 제품원가가 상승할 뿐만아니라, 전원전압 공급이 용이치 못하며, 아나로그 회로와의 연결 사용시에는 인터패이스 회로 구성이 복잡하여지는 문제점이 있었다.However, since this method requires the use of an end gate and a counter, not only the cost of the product rises, but also the power supply voltage cannot be easily supplied, and the interface circuit configuration becomes complicated when using an analog circuit.
본 발명은 이와같은 점을 감안하여, 트랜지스터 및 비교기를 이용한 아나로그회로를 구성함으로써 제품원가의 절감을 꾀함은 물론, 아나로그 회로와의 인터패이스가 용이하며, 또한 비교적 높은 임의의 전원전압을 사용할 수 있도록 창안한 것으로, 이를 첨부한 도면에 의하여 보다 상세히 설명하면 다음과 같다.In view of the above, the present invention provides an analog circuit using a transistor and a comparator, which not only reduces product cost, but also facilitates interface with the analog circuit, and can also use a relatively high power supply voltage. Invented so that, when described in more detail by the accompanying drawings as follows.
제3도에 도시한 바와같이, 입력단자(a)에 트랜지스터(Q1)의 베이스를 접속하여 그의 콜렉터를 트랜지스터(Q2)의 베이스에 접속하고, 그 트랜지스터(Q2)이 콜렉터에 비교기(OP1)의 출력단 및 출력단자(d), 트랜지스터(Q3), (Q4)의 베이스를 공통접속하고, 상기 트랜지스터(Q4)의 콜렉터에 접속한 저항(Ra)을 전원(Vcc) 단자에 접속한 저항(R1) 및 콘덴서(C1), 비교기(OP1)의 비 반전단자(+)에 접속하고, 그의 반전단자(-)에는 트랜지스터(Q3)의 콜렉터를 접속하여 구성시킨다.The third diagram, an input terminal (a) comparator his collector to connect the base of the transistor (Q 1) connected to the base of the transistor (Q 2), and the transistor (Q 2) on a collector as shown in ( The output terminal of the OP 1 ), the output terminals d, the bases of the transistors Q 3 and Q 4 are commonly connected, and the resistor Ra connected to the collector of the transistor Q 4 is connected to a power supply Vcc terminal. The non-inverting terminal (+) of the resistor (R 1 ), the capacitor (C 1 ), and the comparator (OP 1 ) connected to each other is connected, and the collector of the transistor (Q 3 ) is connected to the inverting terminal (-) thereof. .
도면의 설명중 미설명부호 R3,R4는 저항이다.In the description of the drawings, reference numerals R 3 and R 4 denote resistors.
이와같이 구성된 본 발명의 작용효과를 상세히 설명하면 다음과 같다.If described in detail the effects of the present invention configured as described above.
전원이(Vcc)이 공급된 초기에 제9(a)도의 입력단자에 제2(a)도에 도시한 바와같은 입력펄스파형이 가해지면, 이때 콘덴서(C1)에는 절하가 충전되지 않은 상태가 되어 접속점(b)에는 영(0) 전위가 나타나게 되므로, 비교기(OP1)의 출력단에는 저전위 신호가 나타나게 되어 이에 접속된 트랜지스터(Q3), (Q4)가 오프 상태로 되고, 이에 따라 콘덴서(C1)에는 전하가 충전을 계속하게 되며, 이때 접속점(c)에 나타나는 전압If an input pulse waveform as shown in FIG. 2 (a) is applied to the input terminal of FIG. 9 (a) at the initial time when the power supply (Vcc) is supplied, the capacitor C 1 is not charged at this time. Since a zero potential appears at the connection point b, a low potential signal appears at the output terminal of the comparator OP 1 , and the transistors Q 3 and Q 4 connected thereto are turned off. As a result, electric charge continues to be charged to the capacitor C 1 , and the voltage appearing at the connection point c is
(Vc)은,(Vc) is
가 된다.Becomes
이러한 상태에서 접속점(b)의 전위가 비교기(OP1)의 반전단자(-)의 접속점(c) 전위보다 높아지게 되면, 비교기(OP1)의 출력단에는 고전위가 나타나게되나, 이 순간 입력단자(a)의 입력펄스가 로우신호 상태이면, 트랜지스터(Q1)가 오프되어 트랜지스터(Q2)가 은 되므로 그의 콜렉터의 전위〔비교기(OP1)의 출력단 전위〕는 저전위상태를 유지하게 되어 콘덴서(C1)에는 전하가 계속해서 충전된다.In this state, the connection point (b) the potential is inverted terminal of the comparator (OP 1) of (-) when higher than the connection point (c) potential, is termed a high potential to appear the output terminal of the comparator (OP 1), the instantaneous input terminal ( When the input pulse of a) is in the low signal state, the transistor Q 1 is turned off and the transistor Q 2 is turned off, so that the collector's potential (output terminal potential of the comparator OP 1 ) is kept at a low potential state. (C 1 ) continues to be charged.
이와같은 상태에서 입력단자(a)에 나타나는 입력펄스가 하이신호 상태로 되면, 이로 인하여 트랜지스터(Q1)가 온 되고, 트랜지스터(Q2)가 오프되므로 비교기(OP1)의 출력단에는 전원(Vcc)으로부터 저항(R5)을 통하여 가해지게 되어 고전위상태가 된다.In this state, when the input pulse appearing at the input terminal a becomes a high signal state, this causes the transistor Q 1 to be turned on and the transistor Q 2 to be turned off, so that the output terminal of the comparator OP 1 has a power supply Vcc. ) Is applied through a resistor (R 5 ) to a high potential state.
따라서, 그에 접속될 트랜지스터(Q3)가 온되므로 그의 콜렉터측인 접속점(c)에는 포화전압이 나타나며, 또한 트랜지스터(Q4)도 온 상태가 되므로 콘덴서(C1)에 충전되어 있던 전하가 저항(R2) 및 트랜지스터(Q4)를 통하여 방전하게 된다.Therefore, since the transistor Q 3 to be connected thereto is turned on, the saturation voltage appears at the junction point c on the collector side thereof, and the transistor Q 4 is also turned on, so that the charge charged in the capacitor C 1 is resisted. Discharge is performed through R 2 and transistor Q 4 .
이와같은 방전전위가 접속점(c)보다 고전위상태가 되도록 설정되어 있다면 비교기(OP1)의 출력단에는 계속하이신호 상태를 유지하게 된다.If the discharge potential is set to be in a high potential state than the connection point c, the high signal state is maintained at the output terminal of the comparator OP 1 .
이와같은 상태에서 입력펄스가 다시 로우신호 상태로 되면, 트랜지스터(Q1)가 오프되어 트랜지스터(Q2)가 온되므로 비교기(OP1)의 출력단에는 저전위상태가 되어 이에 접속된 트랜지스터(Q3), (Q4)가 각각 오프상태가 되므로 접속점(c)에 나타나는 전압(Vc)은 전술한 바와같이,In such a state, when the input pulse becomes a low signal state again, the transistor Q 1 is turned off and the transistor Q 2 is turned on so that the output terminal of the comparator OP 1 becomes a low potential state and is connected to the transistor Q 3. ) And (Q 4 ) are turned off, respectively, so that the voltage Vc appearing at the connection point c is as described above.
로 나타나게되며, 콘텐서(C1)는 다시 충전을 시작하게 된다.The capacitor C 1 will start charging again.
즉, 제4도의 (나)와 같은 파형이 나타나게 되어 출력단(d)자에 제4(d)도에서와 같은 입력펄스의 정수배 주기를 가지는 출력파형을 얻게 되는 것이다.That is, a waveform as shown in (b) of FIG. 4 appears and an output waveform having an integer multiple of an input pulse as shown in FIG. 4 (d) is obtained at the output terminal d.
이와같이 동작되는 본 발명은 콘덴서, 저항, 비교기 및 트랜지스터로 구성된 아나로그 회로를 이용하여 제품의 원가절감, 인터 패이스 회로구성을 용이하게 함은 물론 전원전압 선택도 손쉽게 설정할 수 있는 효과를 제공하는 것이다.The present invention operated as described above uses an analog circuit composed of a capacitor, a resistor, a comparator, and a transistor to provide an effect of facilitating cost reduction and interface circuit configuration of a product, as well as easily selecting a power supply voltage.
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KR1019840008071A KR860001705B1 (en) | 1984-12-18 | 1984-12-18 | Constant Frequency Waveform Generation Circuit of High Voltage Heating Equipment |
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KR1019840008071A KR860001705B1 (en) | 1984-12-18 | 1984-12-18 | Constant Frequency Waveform Generation Circuit of High Voltage Heating Equipment |
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KR860005487A KR860005487A (en) | 1986-07-23 |
KR860001705B1 true KR860001705B1 (en) | 1986-10-17 |
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