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KR840002179A - Interference controller - Google Patents

Interference controller Download PDF

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Publication number
KR840002179A
KR840002179A KR1019820004732A KR820004732A KR840002179A KR 840002179 A KR840002179 A KR 840002179A KR 1019820004732 A KR1019820004732 A KR 1019820004732A KR 820004732 A KR820004732 A KR 820004732A KR 840002179 A KR840002179 A KR 840002179A
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South Korea
Prior art keywords
signal
interference
values
generate
simulation
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KR1019820004732A
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Korean (ko)
Inventor
안젤름 알스베르크 디터리취 (외 3)
Original Assignee
오레그 이. 엘버
웨스턴 일렉트릭 캄파니, 인코포레이티드
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Publication of KR840002179A publication Critical patent/KR840002179A/en
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/20Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/20Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • H04B3/23Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
    • H04B3/237Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers using two adaptive filters, e.g. for near end and for end echo cancelling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/20Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • H04B3/23Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
    • H04B3/234Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers using double talk detection
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/20Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • H04B3/23Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
    • H04B3/238Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers using initial training sequence

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Noise Elimination (AREA)

Abstract

내용 없음No content

Description

간섭 제어기Interference controller

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명을 실시하는 제1 및 제2에코상쇄기를 구비하고 있는 2단에코제어용 배열에 대한 예시도. 제2도 및 3도는 제2에코상쇄기내에 근단 스피치 검출기를 그리고 제1에코상쇄기의 작용을 금지할 수 있는 "변화율" 제어유니트를 포함하고 있는 본 발명의 실시예에 대한 예시도. 제4도는 제2도 및 3도를 합하여 형성한 도면.1 is an exemplary diagram of a two-stage echo control arrangement having first and second echo cancellers embodying the present invention. 2 and 3 illustrate exemplary embodiments of the present invention that include a near-end speech detector in a second echo canceller and a "rate of change" control unit that can inhibit the action of the first echo canceller. 4 is a view formed by combining the second and third degrees.

Claims (10)

근단 송신기/수신기의 전송신호경로를 따라서 전파하는 제1신호의 간섭신호를 실질적으로 상쇄하기 위한 간섭제어기에 있어서, 동작시에 간섭모사신호가 제1신호로부터 빼져서 간섭상쇄신호를 생성하고 이 간섭모사신호가 간섭상쇄신호 및 송신기/수신기의 수신경로상의 입력신호에 응답하여 생성되고, 간섭모사신호의 생성에 대한 조정이 제1신호가 기정의 레벨에 도달할 때 금지되며, 제1신호가 송신기/수신기로부터 실제의 복귀간섭신호 및 입력신호에 응답하여 생성된 예비간섭상쇄신호인 것을 특징으로 하는 간섭제어기에 대한 OR 관계의 개선.In an interference controller for substantially canceling an interference signal of a first signal propagating along a transmission signal path of a near-end transmitter / receiver, an interference simulation signal is subtracted from the first signal in operation to generate an interference cancellation signal, and the interference The simulated signal is generated in response to the interference canceled signal and the input signal on the receiving path of the transmitter / receiver, adjustment to the generation of the interference simulated signal is prohibited when the first signal reaches a predetermined level, and the first signal is transmitted to the transmitter. Improvement of OR relationship to the interference controller, characterized in that the pre-interference cancel signal generated in response to the actual return interference signal and the input signal from the receiver. 제1항에 있어서, 제1신호로부터 간섭모사신호를 빼서 간섭상쇄신호를 생성하기 위한 수단과, 입력신호 및 간섭상쇄신호에 응답하여 간섭모사신호를 생성하기 위한 수단과, 입력신호 및 제1신호에 응답하여 제1신호가 기정의 레벨의 도달할 때 처음에 언급한 응답수단의 조정을 금지하기 위한 수단과 실제의 복귀간섭신호로부터 또 다른 간섭모사신호를 빼서 제1신호를 생성하는 수단과, 입력신호 및 제1신호에 응답하여 다른 간섭모사신호를 수신하기 위한 수단을 포함하는 것을 특징으로 하는 제어기.2. The apparatus of claim 1, further comprising: means for generating an interference cancellation signal by subtracting the interference simulation signal from the first signal; means for generating an interference simulation signal in response to the input signal and the interference cancellation signal; Means for prohibiting adjustment of the first-mentioned response means when the first signal reaches a predetermined level in response to the first signal and means for generating the first signal by subtracting another interference simulation signal from the actual return interference signal; Means for receiving another interference simulation signal in response to the input signal and the first signal. 디지털 입력신호를 수신하고 디지털 간섭상쇄신호를 전송하기 위해 채택된 제2항에 따른 제어기에 있어서, 간섭모사신호를 생성하기 위한 수단이 입력신호의 복수의 N증가지연샘플값을 발생하여 간섭모사신호를 발생하도록 간섭상쇄신호로써 복수의 N값을 합성하기 위해 입력신호에 응답하며, 다른 간섭모사신호를 생성하기 위한 수단이 입력신호의 복수의 M증가지연샘플값을 발생하여 다른 간섭모사신호를 발생하도록 복수의 M값을 제1신호와 합성하기 위하여 입력신호에 응답하는 것을 특징으로 하는 제어기.A controller according to claim 2 adapted to receive a digital input signal and to transmit a digital interference cancellation signal, wherein the means for generating an interference simulation signal generates a plurality of N incremental delay sample values of the input signal to produce an interference simulation signal. Responsive to the input signal for synthesizing a plurality of N values as an interference canceling signal, and means for generating another interference simulation signal generate a plurality of M incremental delay sample values of the input signal to generate another interference simulation signal. And responsive to the input signal to combine the plurality of M values with the first signal. 제3항에 있어서, 금지수단이 입력신호의 복수의 N증가지연샘플값을 발생하기 위해 입력신호에 응답하며, 제1신호가 복수의 N값의 최대 샘플값의 1/2인 값보다 더 클 경우 금지를 행하도록 복수의 N값을 제1신호와 비교하는 것을 특징으로 하는 제어기.4. The apparatus of claim 3, wherein the prohibiting means is responsive to the input signal to generate a plurality of N incremental delay sample values of the input signal, wherein the first signal is greater than a value that is one half of the maximum sample value of the plurality of N values. And comparing the plurality of N values with the first signal to prohibit the case. 제3 또는 4항에 있어서, 간섭모사신호를 생성하기 위한 수단이 입력신호의 복수의 N값을 발생하기 위해 입력신호에 응답하는 횡단필터를 형성하는 복수의 (N-1)지연소자와, 각각 복수의 N탭웨이트값중 각각의 것을 발생하기 위해 간섭상쇄신호에 응답하는 복수개의 N탭웨이트 발생기와, 각각 복수의 N샘플값중 각각의 것과 복수의 N탭웨이트값중 각각의 것에 응답하여 그 값의 각각의 적을 발생하기 위한 복수개의 N체배기와, 간섭모사신호를 발생하도록 N적값을 합산하기 위한 수단을 포함하며; 다른 간섭모사신호를 생성하기 위한 수단이 복수의 입력신호의 값을 발생하기 위하여 입력신호에 응답하는 횡단필터를 형성하는 복수의 (M-1) 지연소자와 복수의 M탭웨이트값중 각각의 것을 발생하기 위하여 각각 제1신호에 응답하는 복수의 M탭웨이트 발생기와 복수 M샘플값중 각각의 것과 복수의 M탭웨이트값중 각각의 것에 각각 응답하여 그 값들의 각각의 적을 발생하기 위한 복수 M체배기와, 다른 간섭모사신호를 발생하도록 M적값을 합산하기 위한 수단을 포함하는 것을 특징으로 하는 제어기.A plurality of (N-1) delay elements according to claim 3 or 4, wherein the means for generating the interference simulation signal comprises a plurality of (N-1) delay elements for forming a cross filter responsive to the input signal to generate a plurality of N values of the input signal, respectively. A plurality of N tap weight generators responsive to the interference canceled signal to generate respective ones of the plurality of N tap weight values, and each of the plurality of N sample values and each of the plurality of N tap weight values in response thereto; A plurality of N multipliers for generating respective products of the value, and means for summing the N product values to generate an interference simulation signal; Means for generating another interference simulation signal, each of a plurality of (M-1) delay elements and a plurality of M tap weight values forming a cross filter responsive to the input signal to generate values of the plurality of input signals; A plurality of M tap weight generators respectively responsive to the first signal to generate and a plurality of M multipliers for generating respective products of the respective values in response to each of the plurality of M tap weight values and each of the plurality of M tap weight values, respectively. And means for summing M-values to generate another interference simulation signal. 제2,3,4 또는 5항에 있어서, 기정의 간섭상쇄도로서 다른 간섭모사신호를 생성하기 위한 수단의 조정을 금지하기 위한 수단을 포함함을 특징으로 하는 제어기.6. A controller as claimed in claim 2, 3, 4 or 5, comprising means for prohibiting adjustment of the means for generating another interference simulation signal as a predetermined interference cancellation degree. 제2,3,4 또는 5항에 있어서, 간섭모사율을 발생하도록 그 위에서 시간미분을 수행하고 또 그 모사율이 기정의 값보다 작을때에는 다른 간섭모사신호를 생성하기 위한 수단의 조정을 금지하도록 모사율과 기정의 값을 비교하기 위해 다른 간섭모사신호에 응답하는 수단을 포함함을 특징으로 하는 제어기.6. A method as claimed in claim 2, 3, 4 or 5, for performing time differentiation thereon to generate an interference simulation rate and forbidding adjustment of means for generating another interference simulation signal when the simulation rate is less than a predetermined value. And means for responding to another interference simulation signal to compare the simulation rate with a predetermined value. 제2,3,4 또는 5항에 따른 제어기에 있어서, 입력신호의 복수의 M증가지연샘플값을 생성하고, 그러한 복수의 값과 제1신호를 비교하기 위해, 그리고 제1신호가 그러한 복수의 값중 최대 샘플값의 기정의 웨이트된 값에 비해 작을 때 다른 간섭모사신호를 생성하기 위한 수단의 조정을 금지하기 위해 입력신호 및 제1신호에 응답하는 수단을 포함하는 것을 특징으로 하는 제어기.In the controller according to the second, third, fourth or fifth aspect, to generate a plurality of M incremental delay sample values of an input signal, to compare the plurality of values with the first signal, and the first signal is a plurality of such plurality. Means for responsive to the input signal and the first signal to prohibit adjustment of the means for generating another interference simulation signal when the value of the maximum sample value is smaller than a predetermined weighted value. 제2,3,4 또는 5항에 있어서, 제1신호가 실제의 복귀간섭신호의 기정의 웨이트된 값에 비해 작을 경우 다른 간섭모사신호를 생성하기 위한 수단의 조정을 금지하기 위하여 실제의 복귀간섭신호와 제1신호에 응답하는 수단을 포함하는 것을 특징으로 하는 제어기.6. The actual return interference according to claim 2, 3, 4 or 5, in order to prohibit the adjustment of the means for generating another interference simulation signal when the first signal is smaller than the predetermined weighted value of the actual return interference signal. Means for responding to the signal and the first signal. 첨부된 도면의 제1도, 또는 제2도 내지 4도, 또는 제5도 내지 7도를 참조하여 여기에서 설명한 바와 같은 간섭 제어기.An interference controller as described herein with reference to FIGS. 1, 2 or 4, or 5 to 7 of the accompanying drawings. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019820004732A 1981-10-23 1982-10-21 Interference controller Withdrawn KR840002179A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US31449081A 1981-10-23 1981-10-23
US314490 1981-10-23

Publications (1)

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KR840002179A true KR840002179A (en) 1984-06-11

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KR1019820004732A Withdrawn KR840002179A (en) 1981-10-23 1982-10-21 Interference controller

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JP (1) JPS5881346A (en)
KR (1) KR840002179A (en)
AU (1) AU8965682A (en)
DE (1) DE3238564A1 (en)
FR (1) FR2515454A1 (en)
GB (1) GB2109207A (en)
NL (1) NL8204096A (en)
SE (1) SE8205839L (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1238381A (en) * 1985-03-14 1988-06-21 Ephraim Arnon Multi-stage echo canceller
US4868874A (en) * 1986-04-18 1989-09-19 Hitachi, Ltd. Echo canceller
CA2004379C (en) * 1988-12-01 1993-07-06 Tetsu Taguchi Echo canceller with means for determining filter coefficients from autocorrelation and cross-correlation coefficients
US5471527A (en) 1993-12-02 1995-11-28 Dsc Communications Corporation Voice enhancement system and method
US5631899A (en) * 1995-05-31 1997-05-20 Lucent Technologies Inc. Acoustic echo canceler
GB2308283A (en) * 1995-12-16 1997-06-18 Ibm System and method for echo cancellation

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1816153B2 (en) * 1968-12-20 1971-04-15 CIRCUIT ARRANGEMENT FOR ECHO SUPPRESSION IN A TALK CIRCUIT ON A FOUR WIRE TRANSMISSION SYSTEM IN THE CASE OF A TRANSITION TO A TWO WIRE TRANSMISSION PATH
US4282411A (en) * 1979-06-04 1981-08-04 Tellabs, Inc. Residual echo suppressor for echo canceller
JPS56153850A (en) * 1980-04-28 1981-11-28 Kokusai Denshin Denwa Co Ltd <Kdd> Echo control system
FR2487144B1 (en) * 1980-07-21 1986-10-24 Trt Telecom Radio Electr DEVICE FOR CANCELING A COMPOSITE ECHO SIGNAL

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Publication number Publication date
AU8965682A (en) 1983-04-28
FR2515454A1 (en) 1983-04-29
NL8204096A (en) 1983-05-16
DE3238564A1 (en) 1983-05-05
JPS5881346A (en) 1983-05-16
GB2109207A (en) 1983-05-25
SE8205839L (en) 1983-04-24
SE8205839D0 (en) 1982-10-14

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Patent event code: PA01091R01D

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Patent event date: 19821021

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