KR20200138982A - Ito를 포함하는 투명 정전척 및 그 제조방법 - Google Patents
Ito를 포함하는 투명 정전척 및 그 제조방법 Download PDFInfo
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- KR20200138982A KR20200138982A KR1020190065425A KR20190065425A KR20200138982A KR 20200138982 A KR20200138982 A KR 20200138982A KR 1020190065425 A KR1020190065425 A KR 1020190065425A KR 20190065425 A KR20190065425 A KR 20190065425A KR 20200138982 A KR20200138982 A KR 20200138982A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B23Q—DETAILS, COMPONENTS, OR ACCESSORIES FOR MACHINE TOOLS, e.g. ARRANGEMENTS FOR COPYING OR CONTROLLING; MACHINE TOOLS IN GENERAL CHARACTERISED BY THE CONSTRUCTION OF PARTICULAR DETAILS OR COMPONENTS; COMBINATIONS OR ASSOCIATIONS OF METAL-WORKING MACHINES, NOT DIRECTED TO A PARTICULAR RESULT
- B23Q3/00—Devices holding, supporting, or positioning work or tools, of a kind normally removable from the machine
- B23Q3/15—Devices for holding work using magnetic or electric force acting directly on the work
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02N—ELECTRIC MACHINES NOT OTHERWISE PROVIDED FOR
- H02N13/00—Clutches or holding devices using electrostatic attraction, e.g. using Johnson-Rahbek effect
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- Condensed Matter Physics & Semiconductors (AREA)
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- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
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- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
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- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
도 2는, 본 발명의 일 실시예에 따르는 정전척의 제조방법의 각 단계를 개략적으로 도시한 공정도이다.
도 3은, 본 발명의 일 실시예에 따르는 정전척의 제조방법에서, 정전척의 각 층이 형성되는 과정을 정전척의 단면을 통하여 개략적으로 도시한 공정 흐름도이다.
도 4는, 본 발명의 일 실시예에 따르는 정전척을 개략적으로 도시한 평면도(좌) 및 단면도(우)이다.
Claims (9)
- ITO를 포함하는 기판을 준비하는 단계;
상기 기판의 일 면 상에 상기 기판을 향해 열린 패턴이 형성된 마스크층을 도입하는 단계;
상기 마스크층의 패턴에 보호층을 도입하는 단계;
상기 마스크층을 식각하는 단계;
상기 보호층을 제거하는 단계; 및
상기 기판 상에 투명 세라믹스를 포함하는 상부 유전층을 형성하는 단계;를 포함하는,
ITO를 포함하는 투명 정전척의 제조방법.
- 제1항에 있어서,
상기 투명 정전척의 제조방법은, 용사 코팅 공정 및 기계적 방식을 이용한 표면 가공 공정을 포함하지 않는 것인,
ITO를 포함하는 투명 정전척의 제조방법.
- 제1항에 있어서,
상기 마스크층을 식각하는 단계는, 기판의 일 면 상에 양각으로 패턴화된 전극부를 형성하는 것인,
ITO를 포함하는 투명 정전척의 제조방법.
- 제1항에 있어서,
상기 마스크층을 식각하는 단계는, 산을 이용한 습식 식각 방식으로 수행되는 것인,
ITO를 포함하는 투명 정전척의 제조방법.
- 제1항에 있어서,
상기 보호층은, 유기물, 감광성 수지(Photo Resist) 또는 둘 다를 포함하는 것인,
ITO를 포함하는 투명 정전척의 제조방법.
- 제1항에 있어서,
상기 보호층을 제거하는 단계는, 유기 용매를 이용한 용해 방식을 이용하는 것인,
ITO를 포함하는 투명 정전척의 제조방법.
- 기판의 일 면 상에 형성된 양각 전극부를 포함하고, ITO를 포함하는 본체부(body); 및
상기 본체부의 상기 양각 전극부를 덮도록 형성되고, 투명 세라믹스를 포함하는 상부 유전층;
을 포함하는,
ITO를 포함하는 투명 정전척.
- 제7항에 있어서,
상기 투명 정전척은, 제1항의 제조방법에 의해 형성된 것인,
ITO를 포함하는 투명 정전척.
- 제7항에 있어서,
상기 기판에서 상기 양각 전극부를 포함하지 않는 영역에 형성된 상기 상부 유전층의 두께는, 상기 양각 전극부의 높이 이상인 것이고,
상기 투명 정전척은, 상기 기판의 일 면의 반대 쪽 면 상에 형성되는 하부 유전층을 포함하지 않는 것인,
ITO를 포함하는 투명 정전척.
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KR1020190065425A KR102358365B1 (ko) | 2019-06-03 | 2019-06-03 | Ito를 포함하는 투명 정전척 및 그 제조방법 |
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KR1020190065425A KR102358365B1 (ko) | 2019-06-03 | 2019-06-03 | Ito를 포함하는 투명 정전척 및 그 제조방법 |
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KR20200138982A true KR20200138982A (ko) | 2020-12-11 |
KR102358365B1 KR102358365B1 (ko) | 2022-02-04 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113397991A (zh) * | 2021-07-16 | 2021-09-17 | 蓝科医美科学技术(吉林)有限公司 | 一种美白保湿锁水固态精华面膜及其制备方法 |
KR20230039446A (ko) | 2021-09-14 | 2023-03-21 | 이지스코 주식회사 | 투명 플렉시블 정전척 및 그 제조방법 |
Citations (1)
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JP2018518055A (ja) * | 2015-06-04 | 2018-07-05 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | 透明な静電キャリア |
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- 2019-06-03 KR KR1020190065425A patent/KR102358365B1/ko active Active
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JP2018518055A (ja) * | 2015-06-04 | 2018-07-05 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | 透明な静電キャリア |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113397991A (zh) * | 2021-07-16 | 2021-09-17 | 蓝科医美科学技术(吉林)有限公司 | 一种美白保湿锁水固态精华面膜及其制备方法 |
KR20230039446A (ko) | 2021-09-14 | 2023-03-21 | 이지스코 주식회사 | 투명 플렉시블 정전척 및 그 제조방법 |
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