KR20200017848A - A waferless right angle stacking type solar cell and the manufacturing method - Google Patents

Abstract

The present invention is a method of making a solar cell without a wafer to manufacture a thin rectangular wire-shaped p-type or n-type semiconductor light-receiving material as a wire rod and the emitter layer passivation layer electric field electrode layer vertically arranged and bonded to the solar It is manufactured by using a panel, and the charge generating layer and the electrode are arranged as close and wide as possible, so that the generated charge reaches the electrode is short and wide. Due to the vertical arrangement of the electrodes, it naturally induces relatively little light and becomes a double-sided light receiving form. In addition, since the metal electrodes are vertically disposed on both sides of the light receiving layer, they serve as an optical waveguide.

Description

Waferless vertical stacked solar cell and its manufacturing method {A waferless right angle stacking type solar cell and the manufacturing method}

The present invention is a method of making a solar cell without a wafer, and a thin wire-shaped semiconductor material is vertically erected and joined together with an electrode to make a solar panel having a flat plate structure.

Solar cells are usually manufactured through a wafer process or planar coating such as thin film deposition without a wafer. Recently, solar cells through directional solidified polycrystalline silicon wafers which have been melt-molded in the form of agglomerates in the form of reduced single crystal wafer manufacturing cost through silicon ingots or more easily manufactured are occupying most of the market share in terms of efficiency and durability. However, all of them are manufactured after wafer processing, which leads to significant expense and material loss. Therefore, as an alternative, a method of forming a thin rectangular wire-shaped semiconductor and repeatedly arranging it vertically with the electrode to connect thousands of strands is used to form a panel having a desired width. Here, we will use silicon as a semiconductor material. First, we use various kinds of thin rectangular wires such as drawing, drawing, extrusion, micro pulling down, cutting wafers or ribbons using solar cell-class silicon 5N or higher purity. There is a way to make, but after making a thin rectangular wire-shaped silicon wire by powder metallurgy method and performing post-treatment work to improve physical properties as solar cell materials such as density conductivity crystallographic properties by compression molding and heat treatment, Formed as a p-type light-receiving layer, added various performance improvement layers such as emitter layer, passivation layer, and surface field layer, and added electrodes to form wires vertically and repeatedly bonded to various sizes and various voltages A current panel is formed. Physicochemical vapor deposition, plating, coating techniques, etc. will be used as a method of forming and attaching each layer, and forming an electrode, and there are mainly a vapor chemical vapor deposition method and a laser acceleration method. Various methods of constructing a panel, ie, a cell, have emerged. The main focus is on improving light efficiency. In addition, it will be a process of finding an economical and efficient method, such as ease of manufacture. Most recently, Japan's Panasonic has achieved a world record in efficiency with the introduction of a back-electrode heterojunction battery. The present invention seeks to find an inexpensive and efficient method for photovoltaic power generation. The method of fabricating a light-receiving layer in the form of a thin rectangular wire rod of single crystal or polycrystal increases the efficiency of 쎌 construction method, 쎌 assembly method, and post-assembly cell. Topics include surface treatment. There is an amorphous or polycrystalline thin film battery as a method of manufacturing silicon solar cells without a wafer process. However, the life and efficiency are low. There is a method of manufacturing a wafer without a wafer process by extracting the molten silicon in a ribbon form, but the market formation is extremely low.

(1) Multicrystalline Silicon wafers prepared by sintering of silicon bed powders and re-crystallization using ZMR, P.BELLANGER1,2 *, M. GRAU1,2, A.SOW3, A.KAMINSKI2, D. BLANGIS1, JMSERRA4, A VALLERA4, S. DUBOIS5 and A.STRABONI Micro-Pulling-Down (μ-PD) and Related Growth Methods, Valery I. Chani Direct Synthesis of High Purity Silicon Wires by Electrorefining in Molten, KF-NaF Eutectic, Xiang-yu Zou Hong-wei Xie Yu-chun Zhai Xiao-chuan Lang, School of Materials and Metallurgy, Northeastern University, Shenyang 110189, China (4) Laser and Electron-Beam Powder-Bed Additive Manufacturing of Metallic Implants: A Review on Processes, Materials and Designs, Swee Leong Sing, 1, 2 Jia An, 2 Wai Yee Yeong, 1, 2 Florencia Edith Wiria 1, 3 (Document 5) Hit Solar Cell Development Trend, Solar Energy Research Department, Sanyo Electric R & D Division, Kenji, Uchihashi (6) HIT solar cell, L. Carnel Scanwafer

The present invention is a method of making a solar cell without an expensive wafer process, the thin square of the light-receiving material is made into a wire shape, and the functional improvement layers such as an emitter layer, a passivation layer, and a surface field layer are vertically regulated together with the electrodes. They are placed side by side and repeatedly, bonded to the desired width to make a flat plate, and then surface-treated on both sides or one side to improve the performance, and then into solar cells. In addition, powder metallurgy was used to make the light-receiving material, which accounts for the largest portion of solar cell materials, in the shape of thin square wires, and devised a batch continuous process to improve the properties and density crystallinity of wires produced by powder metallurgy. did. Various structures based on light-receiving layer and emitter layer It is the core of the present invention to construct a flat panel battery by repeatedly repeating and vertically joining components of a solar cell of various materials with an electrode layer between them. The present invention has been motivated by the possibility of producing market-competitive solar cells even with relatively low quality materials without a wafer process. Without the wafer, thin, flat light-receiving materials would have to be deposited, coated or filmed out. These methods are also not finding satisfactory methods in the market. Therefore, a thin rectangular wire-shaped light receiving layer is made by joining an emitter, a surface field layer, a function improving layer, and an electrode layer as desired. In order for the electron hole to move to the electrode without loss in the light-receiving layer and turn into effective power, the distance that the carrier moves to the electrode should be as short as possible. If the moving distance to the electrode of the carrier is short, the efficiency decreases less, and thus a relatively low light receiving layer material can be easily used. In addition, if the structure capable of receiving light on both sides will seek to increase efficiency, so if the natural-sided light-receiving structure in nature, the bonus will be obtained. If the fin structure inherently acts as an optical waveguide, an improvement in efficiency can also be expected. If the structure is naturally capable of absorbing light at a broader wavelength, it will help to improve efficiency. In the pursuit of the present invention, a thin rectangular wire-shaped light-receiving layer manufacturing method, an emitter layer, a passivation layer, an electric field layer, an electrode layer manufacturing method, a bonding method of each layer, a circuit construction method, and a method of improving the surface after electrode formation were solved. Given as a task.

The present invention manufactures the light receiving material in a thin rectangular wire shape as an alternative without using a single crystal or polycrystalline wafer or ribbon type light receiving material. In the case of silicon, the metal silicon powder (10μm ~ 50μm or less is preferred) is continuously melted by laser beam, electron beam, etc. in a bed filled with uniform height and density continuously, and it is continuously wired with 80 ~ 300μm width and 80 ~ 300μm thickness After molding with a roller of about the same size and shape as the wire rod, the shape and density are improved. After that, heat treatment is performed to improve the crystal structure. Here, p-type or n-type silicon from the wire manufacturing step or doping treatment after the wire can be formed. Intrinsic amorphous silicon (i-a-Si: H) is applied to the p-type or n-type light-receiving layer on both sides with a passivation layer of about 5nm to 15nm. After that, n-type amorphous silicon is applied on the one side of the p-type amorphous silicon as the emitter layer or the electric field layer by about 10 nm to 15 nm. Place the coated wires with hundreds and thousands of strands facing the same type of emitter layer and facing the same type of electric layer, placed in an electrode deposition chamber, and lasered to form electrodes under 5 μm. Bond while depositing. The junction cutting electrode forming operation is performed in consideration of the desired width and length voltage. After that, the surface performance is improved by forming a taxturing, passivation, and antireflection layer.

According to the present invention, solar cells can be manufactured without wafer work, and even with a relatively low-grade material, efficiency can be considerably increased by minimizing the movement path to the electrode of the electron hole. Since there is no covering, both sides can be received at no additional cost. Since the light receiving layer, the emitter layer, and the electric field layer are all present between the metal electrode layers, the metal electrode layer can serve as an optical waveguide. It is easy to optimize the properties of the light-receiving material according to the intensity of the wavelength range of the light source. Even if the light-receiving layer is thick (over 300um), the moving distance between electrodes of the carrier is the same, so there is no loss of efficiency, and since it is manufactured without ingot and wafer work, the material cost is very small. The production of 쎌 relatively thick does not significantly affect economically.

'Figure 1' is a thin rectangular wire rod-shaped solar cell unit 쎌 (1) sandwiched between the positive electrode (2) and the negative electrode (3) vertically and regularly regularly arranged side by side and bonded to improve the surface It is a structural diagram which comprises a flat battery after apply | coating the layer 4. 2 is an n + type semiconductor or p + type semiconductor light receiving layer 5, a passivation layer 11, an emitter layer 9, a field forming layer 10, or an emitter layer 10, a field forming layer 9, and an anode (7). ) Heterojunction type in which the metal electrode layers of the negative electrode 8 or the positive electrode 8 and the negative electrode 7 are repeatedly stacked vertically and regularly to form a predetermined plane and the both surfaces are coated with the performance improvement layer 4. The solar cell structure diagram. 3 is a device diagram for forming a thin rectangular wire 18 by locally irradiating with a laser or an electron beam in a bed capable of continuously supplying a powder-type light-receiving layer material, and improving physical properties by compression heat treatment or the like. . The bed portion fills the powder with a feeder screw 14 for continuously supplying the powder, and the rotary drum pocket 16 for forming the feather portion, the powder compaction roller 17, the light source 15 of the powder thinning portion, the compression molding roller 13, It is composed of a crystal enhancement light source unit 12. 'Fig. 4' is a schematic diagram of a process of first applying a passivation layer, an emitter layer, and an electric field layer to a light receiving layer, and then bonding them to a metal electrode layer. FIG. 5 is a process diagram for bonding a light receiving layer and an applied electrode layer to a passivation layer after applying an emitter layer and an electric field layer to a metal electrode.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. The present invention has been started for the purpose of manufacturing a photovoltaic cell with relatively high efficiency and relatively economical without a wafer process. Starting from silicon, which is the most widely used solar material, as a light-receiving material, we will finally manufacture a heterojunction battery. Solar cell grade (5N-6N) or below (4N) grade silicon is used as starting material. It is processed into a 80-300 μm thick wire 18 with a width of 80-300 μm by the powder molding apparatus or other method shown in FIG. The processing machine of FIG. 3 can simultaneously produce multiple strands simultaneously and can be accompanied by a thermal vacuum refining process through powder thinning of impurities of lower silicon by performing in a vacuum chamber. The first molded by wire rod to the softening point by the powder thin ring is heated to the softening point and then press-molded with a roller 13 to increase the density and to grab the appearance into a smooth square. After directional heating and directional cooling until the melting point by irradiation of a local heat source 12, such as a laser to improve the crystal structure. Single crystals can also be obtained by starting growth from seed, but considering the production rate, polycrystalline silicon seems preferable. First, as described in FIG. 4, the rectangular silicon wire is doped with boron or phosphorus to form a p-type or n-type semiconductor. In this process, the process or doping density follows the existing process. Both sides of the wire rod with the semiconductor type are injected with silane (SiH₄) gas from the deposition chamber, and both sides or entire surfaces are coated with intrinsic amorphous silicon at about 4 nm to 15 nm. This coating is applied so that there is no cross-contamination on each side, and on one side, boron is added on one side, while the amorphous silicon layer is continuously deposited on the order of 10-15 nm to form p + (p + -a-Si: H) or n +. An emitter layer or field forming layer of type (n + -a-Si: H) is formed. The emitter and field layers, respectively attached to both sides, must be deposited separately so that there is no electrical contact. Afterwards, emitters should be placed between the emitters and the electric layers face each other, and in order to obtain a 15 cm wide side-by-side cell, more than 1000 coated wires should be placed in the chamber, followed by physical vapor deposition, electrode paste, chemical vapor deposition (CVD). The electrode is bonded together while forming an electrode around 1 μm in thickness. Aluminum electrodes formed by chemical vapor deposition appear advantageous for production. For example, chemical vapor deposition using dimetylaluminium hydride is used. As another method of making the same pattern, as shown in Fig. 5, an emitter layer is coated on both sides of an electrode having a thickness of about 5 μm and a height of 80 μm to 300 μm (such as a light receiving layer). One by one on both sides of the layer wires were placed vertically and successively, and bonded together with the intrinsic semiconductor passivation layer having a thickness of 4 nm to 15 nm formed by supplying silane (SiH₄) gas from the chamber. Vertically repeat the p- or n-type light-receiving layer to be a p / n or n / p junction with an electrode coated with a p-type or n-type emitter layer and an electrode coated with a p-type or n-type electric field layer between them It is a method of bonding to a functional improvement layer, such as intrinsic semiconductor, after arranging. For example, if the light receiving layer is n-type, one side is disposed as an electrode coated with a p + type emitter and the other side is disposed as an electrode coated with an n + type electric field layer. In this process, laser light is irradiated to the joint surface for more accurate and faster deposition. The flat panel fabricated by the above two methods is applied by applying a texturing, passivation layer anti-reflection layer, etc. on both sides or one side, and then cutting, terminal wiring, attaching protection diode and encapsulating material for the desired voltage current. Will be born as a product.

Claims (14)

As shown in FIG. 1, the unit structure in which the electrode layers 2 and 3 are vertically disposed at the same height on both sides with a thin rectangular wire-shaped charge generating layer 1 in the center is repeatedly arranged horizontally and continuously. A structure that forms an electrical physical junction and forms a solar cell of a flat plate. As shown in Fig. 2, a semiconductor light receiving layer, an emitter layer, an electric field passivation layer, and an improvement layer electrode layer are formed in a vertical band, and are repeatedly stacked or bonded regularly to form a flat panel solar cell. Among the charge generating layers, the light receiving layer is a p-type or n-type semiconductor, and is made from a square wire having a width of 50 to 400 um and a length of 50 to 400 um. A passivation layer having a passivation layer of about 4 to 15 nm is formed on the entire surface or both surfaces of the semiconductor of claim 3 in a square wire shape. For example, intrinsic amorphous silicon (i-a-Si: H) is applied. A method of applying a p-type or n-type semiconductor as an emitter on one side of the light-receiving layer, which has undergone the process of claim 4, as an electric field layer on the other side so that both sides do not have electrical contact at about 10 to 15 nm. For example, a p-type or n-type amorphous silicon layer (p + or n + a-Si: H) is applied at about 10-15 nm. The method of claim 5, wherein the process of forming the emitter layer may be performed on a thin band-shaped electrode instead of the light receiving layer, and the method is manufactured by using an electrode coated with an emitter layer on both surfaces and an electrode coated with an electric field layer on both surfaces. The method of claim 5, wherein the light-receiving layer, which has undergone the process of claim 5, moves to an electrode chamber and is arranged such that emitter layers of the same type face each other, and electrode layers are deposited while depositing the electrodes. For example, if the n-type light-receiving layer, one side of the p-type emitter is coated with an n-type electric field layer, the p-type emitters face each other and the n-type field layers face each other and the electrode material is deposited therebetween. It is joined at the same time by hundreds or thousands of strands. For example, it can be carried out by a chemical assisted cvd method by local laser irradiation. If the process of claim 6 is performed, the p-type or n-type light-receiving layer may be p / n or n with an electrode coated with a p-type or n-type emitter layer and an electrode coated with a p-type or n-type electric field layer as shown in FIG. / p A method of vertically repeating a junction and then joining a functional enhancement layer such as an intrinsic semiconductor. For example, if the light receiving layer is n-type, one side is disposed as an electrode coated with a p + type emitter and the other side is disposed as an electrode coated with an n + type electric field layer. For example, it is bonded by intrinsic amorphous silicon (i-a-Si: H) deposition. For example, it can be carried out by a chemical assisted cvd method by local laser irradiation. A method of improving performance by forming a texturing, passivation layer, or anti-reflection layer on both surfaces or one surface of a flat plate-shaped film which has undergone the process of claim 7 or 8. A method of producing by a metallurgy powder powder by a method of making a thin rectangular wire rod in the semiconductor light receiving layer of claim 1. The light-receiving layer passed through claim 10 is pressed and heat treated with a forming roll in a heating atmosphere below the melting temperature of the material for better shape and material. 12. The method according to claim 11, wherein the forming roller uses a silicon material roller at least in contact surface when the light receiving material is silicon. The light-receiving material which has passed through claim 12 is a method for improving physical performance such as non-melt heating, fusion heating, directional heating, directional cooling, and the like to improve physical performance from a laser or other local heat source. As shown in Fig. 3, the bed portion fills the powder with a feeder screw 14 for continuously supplying the powder, and the rotary drum pocket 16 forms the feather portion, the powder compaction roller 17, the light source 15 of the powder thin ring portion, In the bed capable of continuously supplying a powder-type light receiving layer material composed of the wire rod pressing roller 13 and the wire rod crystal improving light source unit 12, a thin rectangular wire rod 18 is formed by local irradiation such as a laser or an electron beam and subjected to compression heat treatment. Device for improving physical properties with the back.

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