KR20190139810A - Manufacturing Process of Heat-Sink Substrate For Semiconductor - Google Patents

Abstract

Disclosed is a method for manufacturing a heat sink substrate for a semiconductor. The manufacturing method according to the present invention comprises: a bonding step of forming a multilayered heat sink substrate in which a metal base, an insulation layer, and an electrode metal layer or an insulating ceramic base and an electrode metal layer are successively stacked and bonded; a cutting step of cutting a groove having a less depth than the bottom side of the electrode metal layer from the surface of the electrode metal layer by using a fixed depth cutting tool according to a shape of a predesigned electrode pattern and forming an insulating groove pattern by making a fixed thickness of a residual part remain between adjacent electrode patterns; and an etching step of completely etching the residual part along the insulating groove pattern to expose the insulation layer or the ceramic base, thereby electrically insulating the adjacent electrode patterns. According to the present invention, excellent insulation performance can be provided.

Description

Manufacturing Process for Semiconductor {Manufacturing Process of Heat-Sink Substrate For Semiconductor}

The present invention relates to a heat dissipation substrate for mounting a semiconductor device, a semiconductor module including the same, and a manufacturing method thereof. More specifically, the present invention provides a method for manufacturing a heat dissipation substrate having a thick electrode metal layer suitable for mounting a high power semiconductor element in a heat dissipation substrate having a function of a heat sink and a circuit board for mounting a semiconductor device, and structural features thereof It is about.

In recent years, the power industry has been actively researching R & D in new and renewable energy fields such as solar and wind power generation, and improving the efficiency and energy savings of electrical and electronic devices. It is a power module, that is, a power semiconductor module.

The currents used in these power-based devices are tens to hundreds of amps, and the voltages are hundreds to thousands of volts, so they are high-power. Malfunctions and reliability may occur. In order to prevent such a defect, how to quickly release the heat generated in the power semiconductor device has become a big problem.

In the conventional method of manufacturing a metal printed circuit board for power semiconductor, an insulating layer is inserted between a metal substrate having a high thermal conductivity and a copper foil, and manufactured by performing a general printed circuit board manufacturing process after hot pressing at a high temperature and high pressure. The thermal conductivity of metal PCBs manufactured in the prior art is generally 30-50 W / m.K and a large heat sink must be attached for sufficient heat dissipation. Here, a general printed circuit board manufacturing process utilizes an etching or plating process to form a circuit electrode pattern on a layer made of copper foil.

However, it is difficult to apply a conventional metal printed circuit board manufacturing method to a heat dissipation substrate for a high power semiconductor. This is because when the thickness of the electrode metal layer is increased for high power semiconductor mounting, it is difficult to cope with etching or plating. In fact, if the thickness of the electrode metal layer is 0.15mm or more in the art, it is determined that it is difficult to maintain profitability by etching or plating. In addition to this, there is a problem in that the cross-sectional profile of the electrode pattern is deteriorated and insulation breakdown is likely to occur.

Republic of Korea Patent Publication No. 10-1336087 (2013.11.27)

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and an object thereof is to provide a heat dissipation substrate for a semiconductor having a thick electrode metal layer of 0.2 mm or more in thickness, a semiconductor module including the same, and a method of manufacturing the same.

A method for manufacturing a heat dissipation substrate for a semiconductor according to the present invention is to provide an excellent insulation performance by effectively patterning a thick electrode metal layer and forming a cross-sectional profile close to vertical in the stepped portion of the insulation groove in which the electrode metal layer is removed. There is this. In addition, the purpose of this is to reduce the resistance heat generated in the electrode pattern to reduce the overall heat generation as well as to improve the energy efficiency of the power semiconductor module.

The method for manufacturing a heat dissipation substrate for a semiconductor according to the present invention includes a step of forming an insulating groove pattern by cutting to a predetermined depth from the surface of an electrode metal layer using a fixed depth cutting tool.

The heat dissipation substrate for a semiconductor according to the present invention includes an electrode metal layer having a thickness of 0.2 mm or more, and an insulating groove for dividing the electrode pattern and the electrode pattern into the electrode metal layer is formed by (i) cutting at a depth more than the thickness of the electrode metal layer at once. Or (ii) etching the remaining part after the electrode metal layer is bonded with the insulating layer and the metal base or the ceramic base in a state of cutting to leave the remaining part of the predetermined thickness t, or (iii) the In the case it can be formed by cutting the residue on the opposite side instead of etching.

According to an aspect of the present invention, a semiconductor heat dissipation substrate may include: an electrode metal layer having an electrode pattern on which a semiconductor device is mounted by an insulating groove; A metal base constituting a heat sink for diffusing and dissipating heat emitted from the semiconductor element by heat conduction; And an insulating layer having electrical insulation and disposed between the electrode metal layer and the metal base, wherein the insulating groove includes a portion which is vertically cut from the surface of the electrode metal layer.

The insulating groove may be cut deeper than the bottom surface of the electrode metal layer and shallower than the bottom surface of the insulating layer to expose the insulating layer.

The insulating groove may further include a portion formed by isotropic etching.

The heat dissipation substrate for the semiconductor may include a groove having a dovetail shape in at least one of a surface in contact with the insulating layer on the metal base and a surface in contact with the insulating layer on the electrode metal layer, and a material having the same internal portion as the insulating layer. It may further include a reinforcement protrusion filled with.

According to an aspect of the present invention, there is provided a method of manufacturing a heat dissipation substrate for a semiconductor, the method comprising: forming a multi-layer heat dissipation substrate bonded to a metal base, an insulating layer, and an electrode metal layer in a stacked order; And forming an electrode pattern by cutting an insulating groove having a depth deeper than a bottom surface of the electrode metal layer and shallower than a bottom surface of the insulating layer to expose the insulating layer vertically from the surface of the electrode metal layer using a fixed depth cutting tool. It can be configured to include.

In addition, according to one aspect of the present invention, a method for manufacturing a heat dissipation substrate for a semiconductor includes a heat dissipator for a high power semiconductor in which an insulating groove is formed such that an insulating layer formed on a metal base or an electrode metal layer bonded on an insulating ceramic base forms an electrode pattern. A method of manufacturing a plate, the method comprising: cutting the electrode metal layer from one surface thereof to a predetermined depth shallower than the thickness of the electrode metal layer and leaving a residual portion to form an insulating groove pattern; And etching the remaining portion left along the insulating groove pattern while the electrode metal layer is bonded to the insulating layer or the ceramic base to form the electrode pattern.

Here, the method may further include a bonding step of bonding the electrode metal layer having the insulating groove pattern formed thereon between the cutting step and the etching step on the insulating layer or the ceramic base formed on the metal base.

The bonding step may be to bond the electrode metal layer and the metal base through a hot press process through the insulating layer.

In the electrode metal layer or the metal base, a groove having a dovetail cross section may be formed on the surface contacting the insulating layer before the joining step, and a reinforcing protrusion connected to the insulating layer may be formed by performing a vacuum hot press process.

On the other hand, the etching step may be configured to etch the residual portion in a bonded state such that the residue is disposed opposite the surface to be bonded to the insulating layer or the ceramic base in the electrode metal layer.

According to the present invention, a heat dissipation substrate for a semiconductor having a thick electrode metal layer having a thickness of 0.2 mm or more, a semiconductor module including the same, and a method of manufacturing the same are provided.

According to the present invention, a method for manufacturing a heat dissipation substrate for a semiconductor effectively patterns a thick electrode metal layer within a range capable of maintaining profitability, and forms a cross-sectional profile close to vertical at a step portion of an insulation groove from which the electrode metal layer is removed, thereby providing excellent insulation performance. To provide. As a result, the resistance heat generated in the electrode pattern is reduced, thereby reducing the overall heat generation and improving the energy efficiency and lifespan of the power semiconductor module.

1 shows a high power semiconductor module according to one embodiment of the invention.
2 shows an electrode patterning process of a heat dissipation substrate for a high power semiconductor according to one embodiment of the present invention.
Figure 3 shows an electrode patterning process using a fixed depth cutting tool as an embodiment of the present invention.
4 shows a method of manufacturing a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention.
5 shows a method of manufacturing a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention.
6 shows a method of manufacturing a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention.
7 shows a method of manufacturing a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention.
8 shows a method of manufacturing a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention.
9 shows a method of manufacturing a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention.
10 shows a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention.
11 illustrates a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention.

Hereinafter, various embodiments of the present invention will be described with reference to the drawings. Through the embodiments will be understood the technical spirit of the present invention more clearly. In addition, the present invention is not limited to the embodiments described below, but may be modified in various forms within the scope of the technical idea to which the present invention belongs. Meanwhile, the same reference numerals indicate that the components have the same characteristics, and a description of the components having the same reference numerals as those mentioned in the description of one drawing may be omitted in the description of the other drawings.

1 shows a high power semiconductor module according to one embodiment of the invention.

The high power semiconductor module M according to an embodiment of the present invention (a) includes a heat dissipation substrate 101 and a power semiconductor device 201 for a high power semiconductor. The power semiconductor device 201 is mounted on the electrode pattern 31 on the top surface of the heat dissipation substrate 101 for the high power semiconductor, and is electrically connected through a wire bonding 201.

(b) shows the II 'cross section shown in (a). The heat dissipation substrate 101 for the high power semiconductor is composed of a metal base 10, an insulating layer 20, and an electrode metal layer 30 from the lower side of the drawing. The metal base 10 is made of a metal having excellent thermal conductivity such as copper and aluminum, and the insulating layer 20 may include an electrically insulating synthetic resin, an oxide, or a nitride. The insulating layer 20 is preferably made of a material having excellent thermal conductivity and heat resistance in addition to electrical insulation, and may have a role of bonding the metal base 10 and the electrode metal layer 30 to have adhesion or adhesion. . The electrode metal layer 30 may be made of a metal having low resistivity and excellent thermal conductivity such as copper and a copper-manganese alloy. The electrode pattern 31 is formed by an insulating groove 32 exposing a portion of the electrode metal layer 30 to the bottom to expose the insulating layer 20. The thickness of the electrode metal layer 30 is preferably 0.2 mm or more.

2 shows an electrode patterning process of a heat dissipation substrate for a high power semiconductor according to one embodiment of the present invention.

(a) is an example of a mass production process, in which a plurality of circuit patterns corresponding to each high power semiconductor module are arranged in an array form on the electrode metal layer 30 constituting the upper surface of the large-scale multi-layer heat dissipation substrate B, and having a fixed depth. The electrode metal layer 30 is patterned by the cutting tool E. FIG.

(b) shows the structure of the fixed depth cutting tool E in detail (refer patent document 1 for the description of a specific structure). By cutting while maintaining a constant depth (d) to form a pattern of the insulating groove (32).

Figure 3 shows an electrode patterning process using a fixed depth cutting tool as an embodiment of the present invention.

This figure shows a method of manufacturing a heat dissipation substrate M0 for high power semiconductor according to the first embodiment. The metal base 10, the insulating layer 20, and the electrode metal layer 30 are stacked deeper than the thickness of the electrode metal layer 30 using the fixed depth cutting tool E while being stacked in order from the bottom, and the insulating layer An insulating groove 32 having a depth exposing only (20) is formed.

4 shows a method of manufacturing a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention. This figure shows a method for manufacturing a heat dissipation substrate M1 for high power semiconductor according to a second embodiment.

(a) As shown in the embodiment of FIG. 3, the multilayer base substrate 101 in which the metal base 10, the insulating layer 20, and the electrode metal layer 30 are stacked in this order is formed, and the electrode metal layer 30 is formed. The mask pattern 41 in the form of an electrode pattern is formed on the upper surface.

(b) The insulating groove 32 is formed in the portion where the mask pattern 41 is not printed using the fixed depth cutting tool E. FIG. At this time, the remaining portion of the thickness (t) of 0.05mm to 0.1mm is left at the bottom of the insulating groove (32).

(c) The remaining portion of the bottom of the insulating groove 32 is removed by etching so that the insulating layer 20 is exposed. When the multilayer heat dissipation substrate 101 is cut to correspond to each module, the heat dissipation substrate M1 for high power semiconductor is completed.

5 shows a method of manufacturing a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention. This figure shows a method of manufacturing a heat dissipation substrate M1 for high power semiconductor according to a third embodiment.

(a) The insulating groove 32 pattern is formed using the fixed depth cutting tool E while the mask pattern 41 is formed on the upper surface of the electrode metal layer 30. At this time, the remaining portion 320 of the predetermined thickness t is left at the bottom of the insulating groove 32. The predetermined thickness t is the same as that of the embodiment of FIG. 4. Apart from the above, the substrate on which the insulating layer 20 is stacked is prepared on the upper surface of the metal base 10.

(b) The electrode metal layer 30 having the insulating groove 32 pattern formed thereon is bonded to the substrate on which the insulating layer 20 is stacked on the upper surface of the metal base 10. The vacuum hot press method may be applied to the bonding. Adhesion using an adhesive excellent in thermal conductivity is also possible, and the insulating layer 20 may have a function as an adhesive layer.

(c) The remaining portion 320 of the bottom of the insulating groove 32 is removed by etching so that the insulating layer 20 is exposed. When the multilayer heat dissipation substrate is cut to correspond to each module, the heat dissipation substrate M1 for the high power semiconductor is completed.

6 shows a method of manufacturing a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention. This figure shows a method of manufacturing a heat dissipation substrate M2 for high power semiconductor according to a fourth embodiment.

As in the embodiment of FIG. 5, the insulating groove 32 pattern is formed in the electrode metal layer 30, and the remaining portion 321 of the predetermined thickness t is left. A difference from FIG. 5A is that the opposite surface of the mask pattern 42 is processed with the fixed depth cutting tool E. FIG. Separately, a substrate on which the insulating layer 20 is stacked is prepared on the upper surface of the metal base 10.

(b) The electrode metal layer 30 having the insulating groove 32 pattern formed thereon is bonded to the substrate on which the metal base 10 and the insulating layer 20 are stacked. In this case, the surface on which the insulating groove 32 is formed is in contact with the insulating layer 20, and the surface having the mask pattern 42 and the remaining portion 321 forms an upper surface.

(c) The remaining portion 321 exposed from the surface on which the mask pattern 42 is formed is deleted by etching. Instead of etching, the remaining part 320 may be further cut by using the fixed depth cutting tool E. FIG. In this case, the cutting depth of the fixed depth cutting tool E is deeper than the thickness t of the remaining portion 321 and does not exceed the depth of the insulating groove 32. As a result, a structure in which the insulating layer 20 is exposed through the insulating groove 32 is formed. When the multilayer heat dissipation substrate is cut to correspond to each module, the heat dissipation substrate M2 for the high power semiconductor is completed.

7 shows a method of manufacturing a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention. This figure shows a method of manufacturing a heat dissipation substrate M3 for high power semiconductor according to a fifth embodiment.

(a) The ceramic base 11 is applied as a heat sink. A multilayer heat dissipation substrate having a structure in which the electrode metal layer 30 is bonded to the ceramic base 11 is provided, and a mask pattern 41 is formed on the upper surface of the electrode metal layer 30. The ceramic base 11 may be made of a material such as aluminum nitride (AlN), silicon carbide (SiC), and the like, and the bonding of the ceramic base 11 and the electrode metal layer 30 may include direct copper bonding (DCB) and active active material (AMB). Metal Brazing) and the like can be applied. You can also use products already commercialized using these technologies.

When the insulating groove 32 pattern is formed using the fixed depth cutting tool E, the remaining portion 320 of the predetermined depth t is left. The cutting tool has a margin so as not to directly contact the ceramic base 11 through the electrode metal layer 30.

(b) The remaining portion 320 is removed by etching from the top surface, and the ceramic base 11 is exposed through the insulating groove 32. When the multilayer heat dissipation substrate is cut to correspond to each module, the heat dissipation substrate M3 for the high power semiconductor is completed.

8 shows a method of manufacturing a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention. This figure shows a manufacturing method of a heat dissipation substrate M3 for high power semiconductor according to a sixth embodiment.

(a) As shown in FIG. 5 (a), the insulating groove 32 pattern is formed using the fixed depth cutting tool E while the mask pattern 41 is formed on the upper surface of the electrode metal layer 30, but the insulating groove is formed. The remaining portion 320 of a predetermined thickness t is left at the bottom of the 32. Separately, the ceramic base 11 is prepared. Materials of the ceramic base 11 are as described in the embodiment of FIG.

(b) In the above (a), the electrode metal layer 30 having the insulating groove 32 pattern formed so that the remaining portion 320 remains on the bottom thereof is brought into contact with the ceramic base 11 so that the remaining portion 320 contacts the ceramic base 11. Bond. The above-described technique may also be applied to the above-described DCB or AMB.

(c) As in FIG. 7B, the remaining portion is removed by etching from the upper surface of the mask pattern 41. When the multilayer heat dissipation substrate is cut to correspond to each module, the heat dissipation substrate M3 for the high power semiconductor is completed.

9 shows a method of manufacturing a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention. This figure shows a method of manufacturing a heat dissipation substrate M4 for high power semiconductor according to a seventh embodiment.

(a) First, as in FIG. 6A, the opposite side of the mask pattern 42 is processed with a fixed depth cutting tool E to form an insulating groove 32 pattern in the electrode metal layer 30, and to have a predetermined thickness. The remainder 321 of (t) is left. Separately, the ceramic base 11 is prepared.

(b) the mask pattern 42 and the remaining portion 321 are disposed on the ceramic base 11 with the insulating groove 32 toward the ceramic base 11 and on the opposite side thereof. The ceramic base 11 and the electrode metal layer 30 are bonded to each other. The bonding technique is as described in the embodiment of FIG. 8 above.

(c) Then, the residue 320 is deleted by etching. Instead of etching, the remaining part 320 may be further cut by using the fixed depth cutting tool E. FIG. In this case, the cutting depth of the fixed depth cutting tool E is deeper than the thickness t of the remaining portion 321 and does not exceed the depth of the insulating groove 32. When the multilayer heat dissipation board is cut to correspond to each module, the heat dissipation board M4 for high power semiconductor is completed.

10 shows a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention.

The heat dissipation substrate M5 for the high power semiconductor according to the present embodiment is characterized in that the heat sink structure H is integrally formed on the metal base 12. The electrode metal layer 30 and the insulating layer 20 may be formed by the same method as any one of the embodiments of FIGS. 3 to 6 described above. Meanwhile, a ceramic base in which a heat sink structure is integrally formed may be used instead of the metal base 12.

On the other hand, in the above-described embodiments, the cross-sectional profile of the step portion forming the boundary between the insulating groove 32 and the electrode pattern 31 is from the surface side of the electrode metal layer 30 from the insulating layer 20 or the ceramic base ( 11) is formed perpendicular or almost perpendicular to the two surfaces up to the exposed surface.

In the embodiment of FIG. 3, FIG. 6, or FIG. 9, when the insulating groove 32 is formed only by the fixed depth cutting tool E without the etching process, the stepped portion is formed substantially vertically. In the embodiment, even when the remaining portions 320 and 321 are deleted through the etching process, since the thickness t of the remaining portions is less than 0.1 mm and corresponds to only a part of the electrode metal layer 30, the isotropic wet etching process may be performed. The curvature radius R of the portion where the stepped portion and the insulating layer 20 or the ceramic base 11 meet is formed to be 0.1 mm or less even if the residual portion is deleted. Therefore, excellent insulating characteristics can be obtained between two adjacent electrode patterns 31 with the insulating grooves 32 interposed therebetween.

11 illustrates a heat dissipation substrate for a high power semiconductor according to an embodiment of the present invention.

The heat dissipation substrate M6 for the high power semiconductor according to the present exemplary embodiment may be one or both of a surface in contact with the insulating layer 20 of the metal base 10 and a surface in contact with the insulating layer 20 of the electrode metal layer 30. Reinforcing protrusions 21 and 23 having a dovetail cross section may be further provided. The reinforcement protrusions 21 and 23 may be formed by filling a groove having a dovetail cross section with the same material as that of the insulating layer 20. As a material of the insulating layer 20, an epoxy resin having excellent electrical insulation and thermal conductivity may be applied.

In the manufacturing process of the heat dissipation substrate M6 for the high power semiconductor according to the present embodiment, a groove having a dovetail shape is formed in the metal base 10 and / or the electrode metal layer 30, and the metal base 10 and the electrode The reinforcement protrusions 21 and 23 may be formed by bonding them through a vacuum hot pressing process through an epoxy resin between the metal layers 30.

The reinforcement protrusions 21 and 23 formed as described above may have a difference in coefficient of linear expansion between the material forming the metal base 10 and the material forming the electrode metal layer 30. The interface between them can be prevented from peeling off.

10: metal base
11: ceramic base
12: metal base (heat sink structure integrated type)
20: insulation layer
21, 23: reinforcement protrusion
30: electrode metal layer
31: electrode pattern
32: insulation groove
41, 42: mask pattern
320, 321: remainder

Claims (6)

A bonding step of forming a multi-layer heat dissipation substrate in which a metal base, an insulating layer, and an electrode metal layer are laminated in order;
Insulation grooves in which residual portions having a predetermined thickness are left between the adjacent electrode patterns by cutting a groove having a depth smaller than the bottom surface of the electrode metal layer from the surface of the electrode metal layer using a fixed depth cutting tool according to a predesigned electrode pattern. A cutting step of forming a pattern; And
An etching step of electrically insulating the adjacent electrode patterns by completely etching the remaining portion along the insulating groove pattern to expose the insulating layer; Including,
Method for manufacturing a heat sink for semiconductors. The method of claim 1,
In the bonding step, the metal base and the electrode metal layer are bonded to each other through the hot press process through the insulating layer so that the insulating layer serves as a bonding material between the metal base and the electrode metal layer.
Method for manufacturing a heat sink for semiconductors. According to the shape of the predesigned electrode pattern, a groove having a depth smaller than that of the bottom surface of the electrode metal layer is cut from the surface of the electrode metal layer using a fixed depth cutting tool, and an insulating groove in which residual portions of a predetermined thickness are left between adjacent electrode patterns. A cutting step of forming a pattern;
Bonding a metal base, an insulating layer, and the electrode metal layer in a stacked order, such that the bottom surface flat in the electrode metal layer contacts the insulating layer; And
An etching step of electrically insulating adjacent electrode patterns by completely etching the remaining portion along the insulating groove pattern to expose the insulating layer; Including,
Method for manufacturing a heat dissipation substrate for semiconductors. The method of claim 3,
In the bonding step, the metal base and the electrode metal layer are bonded to each other through the hot press process through the insulating layer so that the insulating layer serves as a bonding material between the metal base and the electrode metal layer.
Method for manufacturing a heat sink for semiconductors. A bonding step of forming a multi-layered heat radiation board on which an electrode metal layer is bonded on an insulating ceramic base;
Insulation grooves in which residual portions having a predetermined thickness are left between the adjacent electrode patterns by cutting a groove having a depth smaller than the bottom surface of the electrode metal layer from the surface of the electrode metal layer using a fixed depth cutting tool according to a predesigned electrode pattern. A cutting step of forming a pattern; And
An etching step of electrically insulating adjacent electrode patterns by completely etching the remaining portion along the insulating groove pattern to expose the ceramic base; Including,
Method for manufacturing a heat dissipation substrate for semiconductors. According to the shape of the predesigned electrode pattern, a groove having a depth smaller than that of the bottom surface of the electrode metal layer is cut from the surface of the electrode metal layer using a fixed depth cutting tool, and an insulating groove in which residual portions of a predetermined thickness are left between adjacent electrode patterns. A cutting step of forming a pattern;
Bonding the electrode metal layer on an insulating ceramic base, wherein the bottom surface that is flat in the electrode metal layer is in contact with the ceramic base; And
An etching step of electrically insulating adjacent electrode patterns by completely etching the remaining portion along the insulating groove pattern to expose the ceramic base; Including,
Method for manufacturing a heat sink for semiconductors.

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