KR20130048844A - Light emitting diode and method for fabricating the same - Google Patents

Abstract

The present invention relates to a light emitting diode and a method of manufacturing the same. According to the present invention, preparing a sapphire substrate; Growing a first n-type semiconductor layer on one surface of the sapphire substrate; Growing an anti-bowing layer including Al _x In _{1 -x} N (where x> 0.82) on the first n-type semiconductor layer; Growing a second n-type semiconductor layer on the anti-bowing layer; And growing an active layer and a p-type semiconductor layer on the second n-type semiconductor layer.

Description

LIGHT EMITTING DIODE AND METHOD FOR FABRICATING THE SAME

The present invention relates to a light emitting diode and a method of manufacturing the same.

The light emitting diode is basically a PN junction diode which is a junction between a p-type semiconductor and an n-type semiconductor.

When the light emitting diode is bonded to a p-type semiconductor and an n-type semiconductor, a current is applied by applying a voltage to the p-type semiconductor and the n-type semiconductor, holes of the p-type semiconductor move toward the n-type semiconductor, and In contrast, electrons of the n-type semiconductor move toward the p-type semiconductor, and the electrons and holes move to the PN junction.

The electrons moved to the PN junction are combined with holes as they fall from the conduction band to the valence band. At this time, the energy difference corresponding to the height difference, that is, the energy difference, of the conduction band and the home appliance is emitted, and the energy is emitted in the form of light.

Such a light emitting diode is a semiconductor device that emits light and has characteristics such as eco-friendliness, low voltage, long lifespan, and low cost. In the past, light emitting diodes have been widely applied to simple information display such as display lamps and numbers. In particular, with the development of information display technology and semiconductor technology, it has been used in various fields such as display fields, automobile headlamps and projectors.

Such a light emitting diode may be manufactured by growing an epitaxial layer including a p-type semiconductor layer, an active layer, and an n-type semiconductor layer on a sapphire substrate.

In this case, the method of growing the epitaxial layer on the sapphire substrate is charged by charging the sapphire substrate in a growth apparatus such as MOCVD, heating the sapphire substrate to a high temperature, and then injecting gases required for growth of the epitaxial layer. Let's do it.

When the growth of the epi layer is completed, the sapphire substrate is cooled and then drawn out.

In this case, the sapphire substrate has a problem in that bowing occurs when the epi layer is cooled after growing the epi layer by a lattice constant difference with the epi layer and a high growth temperature.

In order to solve the bowing phenomenon, conventionally, an AlN layer or an AlGaN layer was formed while the thickness of the growth substrate was thickened or the epitaxial layer was grown.

However, increasing the thickness of the growth substrate causes a problem of increasing the manufacturing cost, and the AlN layer or AlGaN layer has a large lattice constant with GaN, which is a material of the epi layer, causing internal bonding in the epi layer. It caused a problem.

Disclosure of Invention It is an object of the present invention to provide a light emitting diode and a method of manufacturing the same, which minimize the occurrence of internal bonding in the epi layer while minimizing a bowing phenomenon in growing an epi layer on a sapphire substrate.

In order to achieve the above object, according to an aspect of the present invention, preparing a sapphire substrate; Growing a first n-type semiconductor layer on one surface of the sapphire substrate; Growing an anti-bowing layer including Al _x In _{1 -x} N (where x> 0.82) on the first n-type semiconductor layer; Growing a second n-type semiconductor layer on the anti-bowing layer; And growing an active layer and a p-type semiconductor layer on the second n-type semiconductor layer.

The method of manufacturing a light emitting diode further includes growing a defect diffusion prevention layer including Al _x In _{1 - x} N (where x = 0.82) on the anti-bowing layer before growing the second n-type semiconductor layer. can do.

The growth of the anti-boeing layer may be performed while cooling from the growth temperature of the first n-type semiconductor layer to the growth temperature of the defect diffusion prevention layer.

The growth temperature of the defect diffusion prevention layer may be 740 to 840 ° C.

The anti-boeing layer and the defect diffusion prevention layer may be grown by supplying a source gas including N, a source gas including TMIn (Trimethyl Indium), and a source gas including TMAl (Trimethyl Aluminum), but including the TMIn. The source gas containing TMAl can supply 130-230 μmol and 15-25 μmol, respectively.

In order to achieve the above object, according to another aspect of the present invention, a sapphire substrate; A first n-type semiconductor layer provided on one surface of the sapphire substrate; An anti-bowing layer provided on the first n-type semiconductor layer and including Al _x In _{1 -x} N (where x>0.82); A second n-type semiconductor layer provided on the anti-bowing layer; And an active layer and a p-type semiconductor layer provided on the second n-type semiconductor layer.

The light emitting diode may further include a defect diffusion prevention layer including Al _x In _{1 -x} N (where x = 0.82) between the second n-type semiconductor layer and the anti-bowing layer.

The anti-bowing layer may be provided with a thickness of 10 to 30Å.

According to the present invention, the growth of the epitaxial layer on the sapphire substrate has the effect of providing a light emitting diode and a method of manufacturing the same to minimize the occurrence of internal bonding in the epitaxial layer while minimizing the bowing phenomenon.

1 is a cross-sectional view of a light emitting diode according to an embodiment of the present invention.
2 is a cross-sectional view showing a light emitting diode device according to an embodiment of the present invention.
3 is a cross-sectional view showing a light emitting diode device according to another embodiment of the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a cross-sectional view of a light emitting diode according to an embodiment of the present invention.

Hereinafter, a method of manufacturing a light emitting diode according to an embodiment of the present invention will be described with reference to FIG. 1.

First, the growth substrate 100 is prepared.

The growth substrate 100 may be any substrate capable of growing an epi layer to be described later, that is, a sapphire substrate, a silicon carbide substrate, a silicon substrate, or the like, but preferably, the growth substrate 100 may be a sapphire substrate. .

In this case, the epi layer may include a buffer layer 210, a first n-type semiconductor layer 222, a second n-type semiconductor layer 224, an anti-bowing layer 232, a defect diffusion prevention layer 234, and a superlattice layer 240. , An active layer 250, an electron blocking layer 260, and a p-type semiconductor layer 270.

Subsequently, the buffer layer 210 may be grown on the growth substrate 100.

The buffer layer 210 may be provided to mitigate lattice mismatch between the growth substrate 100 and the first n-type semiconductor layer 222 described later. In addition, the buffer layer 210 may be formed of a single layer or a plurality of layers, and when formed of a plurality of layers, the buffer layer 210 may be formed of a low temperature buffer layer and a high temperature buffer layer. The buffer layer (not shown) may be made of AlN. In this case, the buffer layer 210 may be omitted.

Subsequently, the first n-type semiconductor layer 222 may be grown on the buffer layer 210.

The first n-type semiconductor layer 222 may be a III-N-based compound semiconductor doped with n-type impurities, for example, an (Al, Ga, In) N-based Group III nitride semiconductor layer.

The first n-type semiconductor layer 222 may be a GaN layer doped with n-type impurities, that is, an N-GaN layer, or an N-AlGaN layer that is an N-GaN layer doped with aluminum. The n-type impurity may be Si. In addition, when the first n-type semiconductor layer 222 is formed of a single layer or multiple layers, for example, the first n-type semiconductor layer 222 is formed of multiple layers, the first n-type semiconductor layer 222 may have a superlattice structure.

Subsequently, the anti-bowing layer 232 may be grown on the first n-type semiconductor layer 222.

In this case, the anti-boeing layer 232 may include Al _x In _{1 -x} N (where x> 0.82). The anti-boeing layer 232 may be grown to a thickness of 10 to 30 kPa.

Subsequently, the defect diffusion prevention layer 234 may be grown on the anti-bowing layer 232. In this case, the defect diffusion prevention layer 234 may be omitted as necessary.

The defect diffusion prevention layer 234 may include Al _x In _{1 - x} N (where x = 0.82).

Subsequently, the second n-type semiconductor layer 224 may be grown on the defect diffusion prevention layer 234.

Since the second n-type semiconductor layer 224 may be grown in the same manner as the first n-type semiconductor layer 222, a detailed description thereof will be omitted.

As described above, the anti-boeing layer 232 is preferably grown in the middle of the n-type semiconductor layers 222 and 224.

As described above, the anti-bowing layer 232 may be formed on an epitaxial layer (e.g., the n-type semiconductor layers 222 and 224) on a growth substrate such as a sapphire substrate or the like, particularly, a large diameter growth substrate having a diameter of 4 inches or more. In the case of growing at a high temperature for smooth impurity doping, etc.), the growth substrate such as the sapphire substrate or the like may be bent due to a lattice constant difference or a high growth temperature between the growth substrate such as the sapphire substrate and the epi layer. The boeing phenomenon, which is a phenomenon, is generated. The anti-boeing layer 323 may minimize and minimize the boeing of a growth substrate such as a sapphire substrate, particularly, a large diameter growth substrate having a diameter of 4 inches or more.

This is not only because the anti-boeing layer 232 has a large lattice constant, but also the anti-boeing layer 232 is grown at a growth temperature lower than the growth temperature at which the n-type semiconductor layers 222 and 224 are grown, thereby alleviating the bowing phenomenon. It can be minimized.

In this case, the anti-boeing layer 232 is grown by a material having a large lattice constant, that is, Al _x In _{1 -x} N (where x> 0.82), in order to minimize the bowing phenomenon. Due to the difference in lattice constant between the n-type semiconductor layers 222 and 224, when the second n-type semiconductor layer 224 is directly grown on the anti-bowing layer 232, the second n-type semiconductor layer 224 is grown. Many defects are generated in).

In this case, the defect in the second n-type semiconductor layer 224 is made of the same material as the anti-boeing layer 232, but the defect diffusion preventing layer 234 having a different composition on the anti-boeing layer 232, that is, This can be solved by growing between the anti-bowing layer 232 and the second n-type semiconductor layer 224.

That is, the defect diffusion preventing layer 234 is grown with the same material as the anti-boeing layer 232, but has the same lattice constant as the n-type semiconductor layers 222 and 224, that is, Al _x In _1-x N (where , x = 0.82).

The process of growing the first n-type semiconductor layer 222, the anti-bowing layer 232, the defect diffusion prevention layer 234, and the second n-type semiconductor layer 224 will be described in detail. After growing 222, the anti-boeing layer 232 is grown while lowering the growth temperature to a predetermined temperature, the defect diffusion preventing layer 234 is grown at a predetermined temperature, and then heated again to increase the growth temperature, and then The 2 n-type semiconductor layer 224 is grown.

At this time, the defect diffusion prevention layer 234, that is, a predetermined temperature for growing a layer made of a material containing Al _x In _{1 - x} N (where x = 0.82) is a temperature range of 740 to 840 ℃, The 1 n-type semiconductor layer 222 and the second n-type semiconductor layer 224 are grown in a temperature range of about 1000 ℃.

Therefore, after the growth of the first n-type semiconductor layer 222, the anti-boeing layer 232 and the defect diffusion prevention layer 234, the source gas containing N, the source gas containing TMIn (Trimethyl Indium) and TMAl ( Supplying a source gas containing Trimethyl Aluminum) and growing the anti-boeing layer 232 and the defect diffusion preventing layer 234 while lowering the growth temperature, wherein the anti-boeing layer 232 is grown while the growth temperature is lowered, The defect diffusion prevention layer 234 is grown while maintaining a constant temperature.

At this time, the source gas containing the TMIn is injected to 130 to 230μmol, the source gas containing the TMAl is grown by injecting and 15 to 25μmol respectively.

The reason why the anti-boeing layer 232 is grown while lowering the growth temperature is that when Al _x In _1-x N is grown at a relatively high growth temperature, Al _x In _{1 - x} N containing a relatively low amount of In When the growth is growth at a relatively low growth temperature, Al _x in ₁ which includes in with a relatively high content _- is because _x N growth.

When the content of In is lower than 18%, the anti-boeing layer 232 including Al _x In _{1 - x} N has a lattice constant greater than that of the n-type semiconductor layers 222 and 224, and the In content is 18. The defect diffusion prevention layer 234 including Al _x In _{1 - x} N at% has a lattice constant equal to that of the n-type semiconductor layers 222 and 224.

Subsequently, the superlattice layer 240 may be grown on the second n-type semiconductor layer 224. The superlattice layer 240 may be a structure in which a plurality of III-N-based compound semiconductors, for example, (Al, Ga, In) N semiconductor layers are stacked in multiple layers, for example, an InN layer and an InGaN layer are repeatedly stacked. The InGaN layer and the GaN layer may be repeatedly stacked.

The superlattice layer 240 is grown before the formation of the active layer 250, which will be described later, to prevent dislocations or defects from being transferred to the active layer 250, thereby preventing the transfer of the active layer 250. It may play a role of alleviating the formation of dislocations or defects, etc. and to improve the crystallinity of the active layer 250. In addition, the superlattice layer 240 may be omitted as necessary.

The active layer 250 may be grown on the superlattice layer 240.

The active layer 250 may be formed of a III-N series compound semiconductor, for example, an (Al, Ga, In) N semiconductor layer, and the active layer 250 may be formed of a single layer or a plurality of layers, It can emit light. In addition, the active layer 250 may have a single quantum well structure including one well layer (not shown), or a multi quantum well having a structure in which a well layer (not shown) and a barrier layer (not shown) are alternately stacked. It may be provided in a structure. In this case, the well layer (not shown) or the barrier layer (not shown) may be formed of a superlattice structure, respectively or both.

Subsequently, the electron blocking layer 260 may be grown on the active layer 250.

The electron breaking layer 260 may be provided between the active layer 250 and the p-type semiconductor layer 270 described later, and may be provided to increase recombination efficiency of electrons and holes, and have a relatively wide band gap. It may be provided with a material having.

The electron blocking layer 260 may be formed of a (Al, In, Ga) N-based group III nitride semiconductor, and may be formed of a P-AlGaN layer doped with impurities, particularly, a P-AlGaN layer doped with Mg. have.

Subsequently, the p-type semiconductor layer 270 may be grown on the electronic blocking layer 260.

The p-type semiconductor layer 270 may be a III-N-based compound semiconductor doped with p-type impurities, such as (Al, In, Ga) N-based Group III nitride semiconductor. The p-type semiconductor layer 270 may be a GaN layer doped with p-type impurities, that is, a P-GaN layer. In addition, the p-type semiconductor layer 270 may be formed of a single layer or multiple layers. For example, the p-type semiconductor layer 270 may have a superlattice structure.

Therefore, the light emitting diode according to an embodiment of the present invention can prevent and minimize the boeing phenomenon during the process of growing an epi layer on a growth substrate, such as a sapphire substrate, in particular, an n-type semiconductor layer, and a boeing anti-boeing layer. By growing a defect diffusion prevention layer that prevents the transfer or diffusion of lattice defects generated in the barrier layer, the sapphire substrate on which the light emitting diode is grown is minimized by reducing the bowing phenomenon. It is possible to manufacture a light emitting diode device having excellent luminous efficiency by minimizing the occurrence of lattice defects in the epi layer, especially in the active layer.

2 is a cross-sectional view showing a light emitting diode device according to an embodiment of the present invention.

Referring to FIG. 2, a light emitting diode device 1000 according to an embodiment of the present invention may be formed using a light emitting diode according to an embodiment of the present invention described with reference to FIG. 1.

That is, the buffer layer 210, the first n-type semiconductor layer 222, the anti-bowing layer 232, the defect diffusion prevention layer 234, and the second n-type semiconductor layer (such as the sapphire substrate) on the growth substrate 100. 224, an epitaxial layer including the superlattice layer 240, the active layer 250, the electron breaking layer 260, and the p-type semiconductor layer 270 is grown.

Subsequently, a portion of the p-type semiconductor layer 270, the electron breaking layer 260, the active layer 250, and the superlattice layer 240 may be mesa-etched to expose a portion of the surface of the second n-type semiconductor layer 224. Let's do it.

In this case, a portion of the second n-type semiconductor layer 224 may also be etched in the mesa etching process. The mesa etching process is performed to expose the surface of the second n-type semiconductor layer 224 because the anti-boeing layer 232 or the defect diffusion prevention layer 234 provided under the second n-type semiconductor layer 224. ) Does not affect the n-side contact. In consideration of such a mesa etching process, the anti-boeing layer 232 or the defect diffusion preventing layer 234 may be grown at an interval of 1.5 to 2 μm from the active layer 250.

Subsequently, an N-side electrode 310 is formed on a portion of the surface of the second n-type semiconductor layer 224 exposed by the mesa etching process to form an n-side contact.

The P-side electrode 320 is formed on the p-type semiconductor layer 270 to form a light emitting diode device 1000, particularly a horizontal light emitting diode device. Although not shown in the drawing, a transparent electrode such as ITO may be further formed between the p-type semiconductor layer 270 and the P-side electrode 320.

3 is a cross-sectional view showing a light emitting diode device according to another embodiment of the present invention.

Referring to FIG. 3, a light emitting diode device 2000 according to another embodiment of the present invention may be formed using a light emitting diode according to an embodiment of the present invention described with reference to FIG. 1.

That is, the buffer layer 210, the first n-type semiconductor layer 222, the anti-bowing layer 232, the defect diffusion prevention layer 234, and the second n-type semiconductor layer (such as the sapphire substrate) on the growth substrate 100. 224, an epitaxial layer including the superlattice layer 240, the active layer 250, the electron breaking layer 260, and the p-type semiconductor layer 270 is grown.

Subsequently, a conductive substrate 330 is formed on the p-type semiconductor layer 270. In this case, the conductive substrate 330 may be formed by depositing on the p-type semiconductor layer 270 by using a physical vapor deposition method or a chemical vapor deposition method, the conductive substrate 330 of the conductive adhesion 340 It can also be formed by bonding with).

Subsequently, the process of removing the growth substrate 100 is performed, and an N-side electrode 360 in electrical contact with the n-type semiconductor layer is formed to manufacture the light emitting diode device 2000, in particular, a vertical light emitting diode device. can do.

At this time, the process of removing the growth substrate 100 is not only the growth substrate 100, but also the buffer layer 210, the first n-type semiconductor layer 222, the anti-bowing layer 232, and the defect diffusion prevention layer 234. It may be a process of removing at least one of the layers at the same time. Preferably, all of the buffer layer 210, the first n-type semiconductor layer 222, the anti-bowing layer 232, and the defect diffusion prevention layer 234 may be removed at the same time as the growth substrate 100 is removed.

The present invention has been described above with reference to the above embodiments, but the present invention is not limited thereto. Those skilled in the art will appreciate that modifications and variations can be made without departing from the spirit and scope of the present invention and that such modifications and variations also fall within the present invention.

100 growth substrate 210 buffer layer
222: first n-type semiconductor layer 224: second n-type semiconductor layer
232: anti-bowing layer 234: defect diffusion prevention layer
240: superlattice layer 250: active layer
260: electron breaking layer 270: p-type semiconductor layer

Claims (8)

Preparing a sapphire substrate;
Growing a first n-type semiconductor layer on one surface of the sapphire substrate;
Growing an anti-bowing layer including Al _x In _{1 -x} N (where x> 0.82) on the first n-type semiconductor layer;
Growing a second n-type semiconductor layer on the anti-bowing layer; And
Growing an active layer and a p-type semiconductor layer on the second n-type semiconductor layer.
The method of claim 1, before growing the second n-type semiconductor layer,
And growing a defect diffusion prevention layer including Al _x In _{1 - x} N (where x = 0.82) on the anti-bowing layer.
The method of claim 2, wherein the growth of the anti-boeing layer is performed while cooling from the growth temperature of the first n-type semiconductor layer to the growth temperature of the defect diffusion prevention layer.
The method according to claim 2, wherein the growth temperature of the defect diffusion barrier layer is 740 to 840 ℃.
The anti-boeing layer and the defect diffusion preventing layer are grown by supplying a source gas including N, a source gas including TMIn (Trimethyl Indium), and a source gas including TMAl (Trimethyl Aluminum). The source gas containing and the source gas containing TMAl supply 130-230μmol and 15-25μmol respectively.
Sapphire substrates;
A first n-type semiconductor layer provided on one surface of the sapphire substrate;
An anti-bowing layer provided on the first n-type semiconductor layer and including Al _x In _{1 -x} N (where x>0.82);
A second n-type semiconductor layer provided on the anti-bowing layer; And
And an active layer and a p-type semiconductor layer provided on the second n-type semiconductor layer.
The method according to claim 6, between the second n-type semiconductor layer and the anti-bowing layer,
A light emitting diode further comprising a defect diffusion preventing layer comprising Al _x In _{1 - x} N, wherein x = 0.82.
The light emitting diode of claim 6, wherein the anti-boeing layer has a thickness of 10 to 30 microseconds.

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