KR20110039123A - LCD and its manufacturing method - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method of manufacturing the same. The liquid crystal display device according to the present invention includes a plurality of gate wires and data wires defining a plurality of pixels perpendicular to each other, and a thin film transistor provided in each pixel. A display area, a non-display area formed at a periphery of the display area, a pad part formed at a lower end of the non-display area, a data link wiring extending from the data line and the gate line and formed at the pad part; A liquid crystal display device comprising a gate link wiring, a data pad and a data pad formed at ends of the data link wiring and the gate link wiring, wherein the data pad and the gate pad are formed on a pad metal and on the pad metal. A gate insulating film and a protective film laminated and formed between the gate insulating film and the protective film Includes a dummy pattern for protecting the metal for the pad.

Description

Liquid crystal display device and its manufacturing method {Method of manufacturing Liquid Crystal Display Device}

The present invention relates to a liquid crystal display device and a manufacturing method thereof.

BACKGROUND ART Liquid crystal display devices, which have recently been spotlighted as flat panel display devices, have been actively researched due to their high contrast ratio, suitable for gradation display or moving picture display, and low power consumption.

In particular, it can be manufactured with a thin thickness, so that it can be used as an ultra-thin display device such as a wall-mounted TV in the future, and it is used as a display of a battery-operated notebook computer because it is light in weight and consumes significantly less than a CRT CRT tube. It is attracting attention as a next generation display device.

The liquid crystal display device includes a liquid crystal panel and a flexible printed circuit (FPC) connected to the pad portion of the liquid crystal panel.

The liquid crystal panel is divided into a display area in which display is performed and a non-display area around the liquid crystal panel, and a pad part in which a driving circuit is formed is defined at a lower end of the non-display area.

In addition, the liquid crystal panel includes a TFT array substrate having a thin film transistor (TFT) and a pixel electrode formed in each pixel region defined by gate wiring and data wiring, a color filter substrate having a color filter layer and a common electrode formed therebetween, and between the two substrates. It is composed of an interposed liquid crystal layer, by applying a voltage to the electrode to rearrange the liquid crystal molecules of the liquid crystal layer to adjust the amount of light transmitted to display an image. The TFT array substrate is formed relatively larger than the color filter substrate, and a large portion is defined as a pad portion, and a driving circuit is mounted on the portion.

On the other hand, in the case of a small liquid crystal display device used for a mobile phone monitor or the like, in order to minimize the size of the pad portion area, the gate pad portion and the data pad portion may be collectively disposed on the pad portion formed at the bottom of the liquid crystal panel, or the pad portion of the liquid crystal panel may be disposed. Only the data pad portion may be formed in the gate pad, and the gate pad portion may be formed in the liquid crystal panel.

In this case, a passivation layer is formed on the top of the gate pad and / or data pad of the liquid crystal display device as described above.

However, during the process operation after the formation of the protective film, scratches may occur on the uppermost protective film, and the scratch formed on the protective film may be formed on the protective film due to the handling of the substrate or foreign matter formed on the glass chip. Damage may be formed, and further, a pad metal such as a gate pad and / or a data pad formed below is exposed, which further causes a problem of disconnecting the pad metal.

An object of the present invention for solving the above problems is to provide a liquid crystal display device and a method of manufacturing the same to prevent the disconnection of the metal for the pad.

According to an aspect of the present invention, there is provided a liquid crystal display device including: a display area including a plurality of gate lines and data lines defining a plurality of pixels vertically crossing each other, and a thin film transistor provided in each pixel; A non-display area formed at a periphery of the area, a pad part formed at a lower end of the non-display area, data link wirings and gate link wirings extending from the data wirings and gate wirings and formed on the pad portions, and the data; A liquid crystal display device comprising a data pad and a data pad formed at an end of a link wiring and a gate link wiring, wherein the data pad and the gate pad are formed of a pad metal, a gate insulating film and a protective film stacked on the pad metal. And formed between the gate insulating film and the protective film to protect the pad metal. It includes a dummy pattern.

The dummy pattern is formed by stacking a data metal and semiconductor layer pattern, and the data metal and semiconductor layer pattern is formed simultaneously with the formation of a drain electrode and a semiconductor layer of the thin film transistor. And a connection wire connecting the metal for the pad and the data link wire through a contact hole therethrough.

In the method of manufacturing the liquid crystal display device according to the present invention for achieving the above object is formed by forming a first metal film on a substrate and then patterned to form a gate electrode in the thin film transistor region, the gate pad portion and the data pad portion region Forming a pad metal on the substrate; forming a gate insulating film on the substrate on which the gate electrode and the pad metal are formed; and forming an amorphous silicon film and an impurity amorphous silicon film on the substrate on which the gate insulating film is formed. And forming and patterning a second metal layer to form a semiconductor layer, an ohmic contact layer, a source electrode and a drain electrode in the thin film transistor region, and the semiconductor pattern and data metal in the gate pad portion and the data pad portion region. Forming a stacked dummy pattern, and forming a protective film on a substrate on which the source and drain electrodes are formed; Removing the passivation layer on the pad metal of the drain electrode and the data pad to form a drain contact hole exposing the drain electrode; forming a third metal layer on the passivation layer and patterning the drain contact hole; And forming a pixel electrode connected to the drain electrode through the pixel electrode.

In the process of forming the drain contact hole exposing the drain electrode, the step of forming the data pad contact hole exposing the pad metal of the data pad part is simultaneously performed. In the process of forming the pixel electrode, the data pad contact hole is formed. The forming of the connection electrode for connecting with the pad metal of the data pad part is simultaneously performed.

According to the liquid crystal display device and the manufacturing method thereof according to the present invention, by forming a dummy pattern on the lower portion of the protective film, even if a scratch occurs on the protective film, the triplet film than the probability of exposing the pad metal because only the gate insulating film is located under the protective film The dummy pattern and the gate insulating film are positioned to reduce the probability of exposing the pad metal, and furthermore, it is possible to prevent disconnection of the pad metal.

Hereinafter, exemplary embodiments will be described in detail with reference to the accompanying drawings.

1 is a plan view of a liquid crystal display device according to the present invention.

As shown in FIG. 1, the liquid crystal display device of the present invention is largely a flexible printed circuit (FPC) 140 and the FPC 140 connected to the liquid crystal panel 100 and the pad portion 114 of the liquid crystal panel 100. It comprises a system (not shown) connected to.

The liquid crystal panel 100 is divided into a display area 112 where display is performed and a non-display area 116 around the display area, and a driving circuit 180 is formed at a lower end of the non-display area 116. Pad portion 114 is defined.

The liquid crystal panel 100 includes a thin film transistor substrate 110 having a thin film transistor array formed thereon, a color filter substrate 120 and a thin film transistor substrate 110 formed thereon, the color filter array being formed thereon. It includes a liquid crystal layer (not shown) filled between the color filter substrate 120.

Of the thin film transistor substrate 110 and the color filter substrate 120 constituting the liquid crystal panel 100, the thin film transistor substrate 110 is formed to be relatively larger than the color filter substrate 120. The area to be defined is defined by the pad portion 114.

A plurality of gate lines 102 and a data line 104 are formed in the display area 112 to vertically cross each other to define a pixel area, and a pixel electrode 105 is formed in the pixel area. A thin film transistor TFT is formed in an intersection area between the gate line 102 and the data line 104. The thin film transistor TFT may include a gate electrode protruding from the gate wiring 102, a source electrode protruding from the data wiring 104, a drain electrode spaced apart from the gate electrode, and an interlayer between the gate electrode and the source / drain electrode. It is formed of a semiconductor layer (not shown) formed.

Meanwhile, a driving circuit (drive IC) 180 that applies a signal to the gate wiring 102, the data wiring 104, and the like is formed in the pad part 114, and the driving circuit 180 includes the display area 112. The gate lines 102 and the data lines 104 of the plurality of gate lines 102 and the data lines 104 and the non-display area 116 are connected through the gate link lines 131 and the data link lines 132, respectively. Gate pads and data pads are formed at ends of the data link wiring 132.

On the other hand, in the case of a small liquid crystal display device used for a mobile phone monitor or the like, in order to minimize the size of the pad portion area, the gate pad portion and the data pad portion may be collectively disposed on the pad portion formed at the bottom of the liquid crystal panel, or the pad portion of the liquid crystal panel may be disposed. Although only the data pad portion is formed on the gate pad portion and the gate pad portion may be formed inside the liquid crystal panel, the liquid crystal display device according to the embodiment of the present invention forms only the data pad portion on the pad portion formed at the bottom of the liquid crystal panel, and the gate pad portion. The part is formed inside the liquid crystal panel. In this case, the data pad part is formed in the same structure as the gate pad part, and the connection pad is further provided to be connected to the data line 104 and the data link line 132.

As shown in FIG. 2, the pad metal 12b is formed on the substrate 10, and the gate insulating layer 13 and the passivation layer are formed on the pad metal 12b. 20 is formed, and is formed between the gate insulating film 13 and the protective film 20, and the dummy pattern 30 for protecting the pad metal 12b is further provided.

However, the gate pad portion and the data pad portion have the same structure, but the data pad portion and the pad metal 12b exposed through the contact hole 22b penetrating through the gate insulating layer 13 and the passivation layer 20 and the data wiring line. A connection wiring 24b is further provided to connect the 104 and the data link wiring 132.

The dummy pattern 30 is formed by stacking the data metal 18c and the semiconductor patterns 14b and 16c formed simultaneously with the formation of the drain electrode and the semiconductor layer of the thin film transistor, and having no connection relationship with the adjacent metal. ) Pattern.

As such, by forming the dummy pattern 30 under the passivation layer 20, even if a scratch occurs on the passivation layer, the dummy pattern 30 of the triple layer is less than the probability that only the gate insulating layer is positioned under the passivation layer to expose the pad metal. And the gate insulating layer is located to reduce the probability of exposing the pad metal, it is possible to further prevent the disconnection of the pad metal.

A method of manufacturing such a liquid crystal display device will be described in more detail with reference to the accompanying drawings.

3A and 4A to 3F and 4F are flowcharts illustrating a method of manufacturing a liquid crystal display device according to the present invention.

3A to 3F illustrate cross-sectional views of thin film transistor (TFT) regions to which four masks are applied, and FIGS. 4A to 4F illustrate cross-sectional views of data pad region to which four masks are applied.

First, as shown in FIGS. 3A and 4A, a first metal film is deposited on the substrate 10, and then patterned by photolithography using a first mask (not shown). The gate electrode 12a is formed in the thin film transistor region. And a pad metal 12b is formed in the gate pad portion and the data pad portion region.

3B and 4B, an insulating material is entirely deposited on the substrate 10 on which the gate electrode 12a and the data pad 12b are formed to form a gate insulating layer 13.

3C and 4C, an amorphous silicon film, an impurity amorphous silicon film, and a second metal film are deposited on the gate insulating film 13, and then a second mask (not shown) is applied. By patterning through etching, the semiconductor layer 14a, the ohmic contact layer 16a, the source electrode 18a and the drain electrode 18b are formed in the thin film transistor region, and the semiconductor pattern is formed in the gate pad portion and the data pad portion region. The dummy pattern 30 in which the data metals 18c formed of the 14b and 16c and the second metal film are stacked is formed.

3D and 4D, the protective film 20 is entirely deposited on the substrate 10 on which the source and drain electrodes 18a and 18b are formed.

3E and 4E, a portion of the passivation layer 20 on the drain electrode 18b and the pad metal 12b of the data pad portion may be selectively etched through a third mask (not shown). A drain contact hole 22a and a data pad contact hole 22b exposing a part of the drain electrode 18b and the pad metal 12b of the data pad part are formed.

3F and 4F, the transparent electrode material is deposited on the passivation layer 20 and then patterned through a fourth mask (not shown) to form the pixel electrode 24a and the connection electrode 24b. A pixel electrode 24a is connected to the drain electrode 18b through the drain contact hole 22a, and a connection electrode 24b is connected to the data pad 12b through the data pad contact hole 22b. This process is completed by forming so that it may connect to.

As such, by forming the dummy pattern 30 under the passivation layer 20, even if a scratch occurs on the passivation layer, the dummy pattern 30 of the triple layer is less than the probability that only the gate insulating layer is positioned under the passivation layer to expose the pad metal. And the gate insulating layer is located to reduce the probability of exposing the pad metal, it is possible to further prevent the disconnection of the pad metal.

Although the present invention has been described with reference to the embodiments illustrated in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

1 is a plan view of a liquid crystal display device according to the present invention

2 is in accordance with the present invention

2A and 3A to 2F and 3F are flowcharts showing a method of manufacturing a liquid crystal display device according to the present invention.

Claims (7)

A display area including a plurality of gate wires and data wires defining a plurality of pixels vertically crossing each other and a thin film transistor provided in each pixel, a non-display area formed at a periphery of the display area, and the non-display area A pad portion formed at a lower end of the substrate; a data link wiring and a gate link wiring extending from the data wiring and the gate wiring; and a data pad and data formed at ends of the data link wiring and the gate link wiring. In the liquid crystal display device comprising a pad, The data pad and the gate pad Pad metal, A gate insulating film and a protective film laminated on the pad metal; And a dummy pattern formed between the gate insulating film and the protective film to protect the pad metal. The method of claim 1, wherein the dummy pattern A liquid crystal display device characterized in that a data metal and a semiconductor layer pattern are laminated. The pattern metal and semiconductor layer pattern of claim 2, wherein And at the same time as forming the drain electrode and the semiconductor layer of the thin film transistor. The method of claim 1, wherein the data pad is And a connection wiring connecting the pad metal and the data link wiring through contact holes penetrating through the gate insulating film and the protective film. Forming and patterning a first metal film on the substrate, forming a gate electrode in the thin film transistor region, and forming a pad metal in the gate pad portion and the data pad region; Forming a gate insulating film on the substrate on which the gate electrode and the pad metal are formed; An amorphous silicon film, an impurity amorphous silicon film, and a second metal film are formed on the substrate on which the gate insulating film is formed, and then patterned to form a semiconductor layer, an ohmic contact layer, a source electrode, and a drain electrode in the thin film transistor region. Forming a dummy pattern in which a semiconductor pattern and a data metal are stacked in the gate pad part and the data pad part region; Forming a protective film on the substrate on which the source and drain electrodes are formed; Forming a drain contact hole exposing the drain electrode by removing the passivation layer on the pad metal of the drain electrode and the data pad part; And forming and patterning a third metal film on the passivation layer to form a pixel electrode connected to the drain electrode through the drain contact hole. 6. The method of claim 5, And forming a data pad contact hole exposing the pad metal of the data pad part during the process of forming the drain contact hole exposing the drain electrode. 6. The method of claim 5, And forming a connection electrode connected to the pad metal of the data pad part through the data pad contact hole during the pixel electrode formation step.

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