KR20110001464A - Signal processing method and apparatus for synthesis of signals - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wireless communication system. In the process of combining a plurality of signals, at least one of phase, delay, and power of a signal may be controlled to reduce a peak to average power ratio (PAPR) of a specific signal section. A signal processing method and apparatus for synthesizing possible signals.

In the signal processing device for synthesizing the signals, the signal processing device according to an embodiment of the present invention performs signal control and frequency up-conversion to have at least one of a different phase, power, and delay for at least two transmission signals. A signal controller to perform; And a combiner for synthesizing the output signals of the signal controller and outputting the combined signals.

Description

Method and apparatus for signal processing for combining multi signals

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wireless communication system. In the process of combining a plurality of signals, at least one of phase, delay, and power of a signal may be controlled to reduce a peak to average power ratio (PAPR) of a specific signal section. A signal processing method and apparatus for synthesizing possible signals.

In a wireless communication system, research is being conducted to provide a stable data transmission speed to users. One of these proposals includes orthogonal frequency division multiplexing (OFDM) and orthogonal frequency division multiple access (OFDMA). An Institute of Electrical and Electronics Engineers (IEEE) 802.16e system has been proposed.

In a wireless communication system based on the IEEE 802.16e system, orthogonality between a plurality of transmission signals (carriers) is maintained through the OFDM scheme, and a plurality of transmission signals are combined to transmit high speed data transmission performance. You can get it.

In a transmitter of a wireless communication system based on the IEEE 802.16e system, when synthesizing a plurality of signals having the same frequency band, a frequency shift is performed to prevent the frequency bands from overlapping each other. The frequency shift is performed through the analog up-converter or the digital up-converter. The frequency range of the input signal is shifted by multiplying the frequency of the input signal by a complex value consisting of cosine and sine for a predetermined frequency. Let's do it.

The plurality of signals shifted in the frequency band are combined into one output signal in the combiner. In this case, when the frequency band of the signal is shifted through the analog up-converter, the frequency component for determining the cosine and sine values is easily controlled through an oscillator, but the phase component is not easy to control. In general, after frequency shifting is performed through a digital up-converter, a plurality of signals are synthesized through a combiner.

1 is a diagram illustrating each signal to be synthesized for a plurality of signals according to the prior art divided into I and Q signals in the time domain. 1 shows three signals, each of which is a signal output by performing four times over-sampling of an OFDM signal generated by a 1024-FFT, and is a downlink signal conforming to the IEEE 802.16e standard. In FIG. 1, each of a plurality of signals (signal # 1 to signal # 3) is divided into an I signal and a Q signal in a downlink period of a frame, and then a power value of a preamble signal on a time axis The power value of the data signal is shown.

Referring to FIG. 1, a frame of a wireless communication system based on the IEEE 802.16e system includes an uplink to which data to be transmitted from a terminal to a base station is allocated, and data to be transmitted from a base station to a terminal. It consists of downlink. The downlink is mainly composed of a preamble section including channel information and a data section to which control signals and bursts are allocated.

In an example of a wireless communication system based on the IEEE 802.16e standard, a 0 to 4607 sample interval corresponds to a preamble interval in one frame, and a portion after the 4607 sample includes data including control signals and data. It is a section.

The frame starts with a preamble, which is a value that is recognized between the transmitter (base station in the downlink) and the receiver (terminal in the downlink) and is synchronized, channel estimation, and signal to signal (SNR). It is used for various purposes such as noise ratio measurement. In the IEEE 802.16e standard, the root mean square (RMS) power of the preamble is about 3.9 dB greater than the RMS power of the data section, but is not larger than the signal amplitude of the data section.

FIG. 2 is a diagram illustrating a power distribution of signals in which signals are synthesized according to the related art in a preamble interval and a data burst interval in a complementary cumulative distribution function (CCDF) graph. In FIG. 2, three transmission signals are used, and the power of the preamble section and the power of the data section are shown based on the total RMS power of the same frame.

Referring to FIG. 2, the peak power of the first to third signals (signal # 1 to signal # 3) in the preamble section is about 7.6 dB to 7.9 dB greater than the total RMS power of the frame. It can be seen that 10.0 dB to 11.4 dB is large. Therefore, it can be seen that the signal of the preamble section is smaller than the amplitude of the signal of the data section. In FIG. 2, the vertical axis represents a distribution ratio of a signal having a corresponding power value. Referring to the distribution of the maximum power value of the first signal (signal # 1) as an example, a signal having a large 7.6bB relative to the total RMS power of the frame may be 10 ^-3 , i.e. 0.1% present.

FIG. 3 is a diagram illustrating a power distribution of a signal obtained by synthesizing three signals into a CCDF graph by dividing the power distribution into a preamble section and a data burst section.

Referring to FIG. 3, a power distribution of a signal output by synthesizing the first to third signals (signal # 1 to signal # 3) respectively output from three transmitters included in the transmitter is a complementary cumulative signal. Distribution Function)

As shown in FIG. 2, when three signals of about 7.6 dB to 7.9 dB greater than the total RMS power of the frame are larger and 10.0 dB to 11.4 dB higher than the RMS power are synthesized in the data section, as shown in FIG. 3. The maximum power value in the preamble section is about 12.3 dB, and the maximum power value in the data section is about 10.4 dB.

Note that when synthesizing a plurality of signals, the amplitude of the signal does not increase in the data period but the amplitude of the signal in the preamble period increases. This is because the signal of the data section and the signal of the preamble section have different characteristics.

Since the waveform of the signal of the data section is randomly distributed over the entire data section, such as Gaussian white noise, a large amplitude (Crest Factor) waveform is also randomly distributed. Therefore, even when synthesizing a plurality of signals, the probability of overlapping a large amplitude crest waveform is low. Therefore, the random characteristics of the signal are maintained even after the synthesis of the signals, and thus have similar amplitude characteristics before and after the signal synthesis. That is, the plurality of signals in the data interval have a very low probability of increasing the amplitude of the signal after synthesis.

However, the signal of the preamble section is designed to have a constant pattern for synchronization, channel estimation, and signal to noise ratio (SNR) measurement. Therefore, when the signals of the preamble section having a predetermined pattern are synthesized, the amplitude of the signal may be increased by overlapping the Crest Waveforms of the respective signals. That is, when synthesis is performed on a plurality of signals, a problem may occur in that a peak to average power ratio (PAPR) of a preamble section is increased.

Typically, PAPR is used among the criteria for determining the characteristics of a signal, which is defined as the ratio between the average power of the signal and the maximum power of the signal. When the PAPR is increased, when the signal is amplified by the power amplifier in the transmitter, it may be outside the linear operating range of the power amplifier. In this case, in order to obtain the maximum output of the power amplifier, the power amplifier must be operated in a nonlinear region, which causes distortion in the signal amplified by the power amplifier.

Also, in order to prevent distortion of the output signal generated by increasing PAPR, the transmitter needs to apply a high output power amplifier, a high efficiency signal processor, a DAC, an RF mixer, etc. There is an increasing problem.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to provide a signal processing apparatus and method for synthesizing a plurality of improved signals.

An object of the present invention is to provide a signal processing method and apparatus for synthesizing signals capable of reducing a peak to average power ratio (PAPR) in a specific area in synthesizing a plurality of signals in a wireless communication system.

The present invention provides a signal processing method and apparatus for synthesizing signals that can reduce a system implementation cost by preventing PAPR of the synthesized signal in synthesizing a plurality of signals in a wireless communication system.

In the signal processing device for synthesizing the signals, the signal processing device according to an embodiment of the present invention performs signal control and frequency up-conversion to have at least one of a different phase, power, and delay for at least two transmission signals. A signal controller to perform; And a combiner for synthesizing the output signals of the signal controller and outputting the signal as one signal.

According to an aspect of the present invention, there is provided a signal processing apparatus comprising: a plurality of transmitters for outputting a plurality of transmission signals; An up converter for performing frequency up-conversion of the transmission signals and selectively performing phase control on the transmissions; A power controller configured to selectively perform power control of a specific section on the transmission signals; A signal delay controller for selectively controlling a signal delay with respect to the transmission signals; And a combiner for synthesizing a plurality of transmission signals including at least one transmission signal on which at least one of phase control, power control, and signal delay are performed, and outputting the combined signals as one signal.

In the signal processing method according to an embodiment of the present invention, in the signal processing method for synthesizing signals, control and frequency up-conversion are performed to have at least one of a different phase, power, and signal delay for at least two transmission signals. Performing; And synthesizing the controlled transmission signals into one signal.

The present invention according to an embodiment provides a signal processing apparatus and method for synthesizing a plurality of signals. In addition, the present invention according to the embodiment of the present invention in synthesizing a plurality of transmission signals in a wireless communication system, to reduce the performance of the system by reducing the peak to average power ratio (PAPR) of a specific region (for example, preamble interval) Can improve.

According to an embodiment of the present invention, in synthesizing a plurality of transmission signals (carriers) in a wireless communication system using an OFDM scheme, an increase in a peak to average power ratio (PAPR) of a specific region signal is prevented, thereby reducing the cost of implementing the system. You can.

Hereinafter, a signal processing method and apparatus for synthesizing signals according to an embodiment of the present invention will be described with reference to the accompanying drawings. Matters not described in detail in the present invention may refer to the Institute of Electrical and Electronics Engineers (IEEE) 802.16 standard document and the WiMAX Forum Network Working Group (NWG) standard document.

The signal processing method and apparatus for synthesizing signals according to embodiments of the present invention control at least one of a phase, a delay, and a power of a signal in synthesizing a plurality of signals, thereby performing a specific signal interval (eg, a preamble interval). ) Can reduce the Peak to Average Power Ratio (PAPR).

4 is a diagram illustrating a signal processing apparatus for synthesizing signals according to an embodiment of the present invention, and FIG. 5 is a diagram illustrating a system controller of a signal processing apparatus for synthesizing signals according to an embodiment of the present invention.

4 and 5, a signal processing apparatus for synthesizing signals according to an exemplary embodiment of the present invention may include a signal controller 100, a plurality of transmitters 110, 112, and 114, a system controller 160, and a combine. You 150. Here, the signal controller 100 includes a digital up converter 120, a power controller 130 corresponding to the plurality of transmitters 110, 112, and 114, and a signal delay controller 140.

Each of the plurality of transmitters 110, 112, and 114 outputs an OFDM signal, and generates data and control signals to be transmitted to the digital up-converter 120 of the signal controller 100. do.

When synthesizing a plurality of signals, the system controller 160 generates control information for controlling at least one of phase, delay, and power of a signal on which synthesis is performed, in order to prevent the signals from overlapping and increasing the PAPR. Thereafter, the generated control information is provided to the signal controller 100. Here, the control information includes phase control information for phase control, power control information for power control, and delay control information for signal delay. As an example, the system controller 160 provides the phase control information to the digital up converter 120, provides the power control information to the power control unit 130, and provides the delay control information to the signal delay control unit 140. do.

The digital up converter 120 shifts the frequency band of each of the transmission signals output from the plurality of transmitters 110, 112, and 114, and based on the phase control information input from the system controller 160, the plurality of transmitters 110, 112 and 114 control the phase of each signal inputted and output. Here, when the phase control value of the phase control information from the system controller 160 is set to 0, the digital up converter 120 does not change the phase of the corresponding signal.

The power controller 130 may include a plurality of power controllers 130a, 130b, and 130c to control power of each of the transmission signals output from the plurality of transmitters 110, 112, and 114. The power controller 130 may control the power of each of the plurality of transmission signals input via the digital up converter 120 based on the power control information provided from the system controller 160. For example, when three transmission signals are output from the first to third transmitters 110, 112, and 114, the signal power of a specific section is reduced at a predetermined rate for each of the plurality of transmission signals. The power of each of the plurality of transmission signals may be controlled by subtracting a predetermined value from the signal power of a specific section with respect to each of the plurality of signals.

The signal delay control unit 140 may be configured with a plurality of delay controllers 140a, 140b, and 140c so as to control signal delay of each of the transmission signals output from the plurality of transmitters 110, 112, and 114. The signal delay controller 140 may control the delay of each of the plurality of signals input from the digital up converter 120 based on the delay control information provided from the system controller 160. For example, when three signals are output from the first to third transmitters 110, 112, and 114, each signal may be delayed according to the delay control information. Specifically, as shown in FIG. 6, the first signal may be delayed, the second signal may be delayed by 3 samples, and the third signal may be delayed by 2 samples and output.

The power control in the power control unit 130 and the signal delay control in the signal delay control unit 140 may both be performed on at least one signal among a plurality of signals, and power control or signal on the at least one signal. Only delay control may be performed. The plurality of transmission signals via the digital up converter 120, the power controller 130, and the signal delay controller 140 are input to the combiner 150.

The combiner 150 synthesizes a plurality of transmission signals output through the digital up converter 120, the power control unit 130, and the signal delay control unit 140, and signals the synthesized signal from the plurality of transmission signals. Output to the processor.

Here, the signal output from the combiner 150 may be a signal obtained by combining a plurality of transmission signals including a signal whose phase is controlled with respect to at least one of the plurality of transmission signals. In addition, a plurality of transmission signals including a signal whose delay is controlled with respect to at least one of the plurality of transmission signals may be a synthesized signal. In addition, a plurality of transmission signals including a signal whose power is controlled with respect to at least one of the plurality of transmission signals may be a synthesized signal. In addition, a plurality of transmission signals including a signal in which at least one of phase, delay, and power are controlled with respect to at least one of the plurality of transmission signals may be synthesized.

Referring to FIG. 5, referring to a signal processing process for synthesizing a plurality of transmission signals, the digital up-converter 120 of the signal controller 100 is applied to each of the signals output from the plurality of transmitters 110, 112, and 114. The phase control is performed on at least one of the plurality of signals based on the frequency band shift and the phase control information provided from the system controller 160.

Thereafter, the power control unit 130 performs power control on at least one of the plurality of signals based on the power control information provided from the system controller 160. The signal delay controller 140 performs delay control on at least one of the plurality of signals based on the delay control information provided from the system controller 160.

Thereafter, the combiner 150 performs a synthesis of a plurality of signals including at least one signal in which at least one of phase, power, and delay is controlled. Through this, the waveforms of the synthesized plurality of signals may be randomly distributed, thereby preventing the PAPR from being increased by preventing the Crest Waveform having a large amplitude from overlapping.

Here, since phase control, power control, and signal delay of each transmission signal are performed based on the control information, when a control value (phase control value, power control value, signal delay value) for a specific signal is 0, At least one of phase, power, and signal delay may not be controlled. The control information provided by the system controller 160 may be changed every frame, or fixed control information may be applied to a plurality of frames.

The signal processor performs a CFR (Crest Factor Reduction) on a signal input through the digital up-converter 120 and the signal controller 100, and reduces the distortion caused when the signal is amplified by the power amplifier. Perform digital pre-distortion and output to digital-to-analog converter (DAC).

A digital-to-analog converter (DAC) converts a digital signal input from a signal processor into an analog signal and outputs it to an RF mixer.

The RF mixer includes components such as a filter and a front end unit. The RF mixer performs RF processing to transmit a signal output from the digital-to-analog converter (DAC) on an actual air, and then Output to the amplifier (Power Amp).

The power amplifier amplifies the input signal in a linear section to prevent distortion of the signal, and transmits the amplified signal on the air through a Tx antenna.

Hereinafter, a signal processing method for synthesizing signals and a power distribution of a signal in which a plurality of transmission signals are synthesized and output will be described with reference to FIGS. 7 to 9.

In the signal processing method for synthesizing signals according to the first embodiment of the present invention, the digital up converter 120 may perform at least one signal from among a plurality of signals based on the phase control information output from the system controller 160. After changing the phase, the combiner 150 performs the synthesis.

As an example, of the three transmission signals shown in FIG. 1, the phase of the first signal signal # 1 is changed by 75 °, and the phase of the second signal signal # 2 is not changed to 0 °, After changing the phase of the third signal (signal # 3) by 225 °, the combiner 130 synthesized the three signals. As described above, the RMS of the output signal by synthesizing the phases of the signals may be obtained as shown in FIG. 7.

3 and 7, after changing the phase of two of the three transmission signals, and then combining the three transmission signals, it was about 12.3dB when the three transmission signals were synthesized without phase control. It can be seen that the RMS of the signal in the preamble period is reduced to about 11.7 dB. That is, when the phase is changed with respect to at least one signal of a plurality of transmission signals, and then the synthesis of the signals is performed, a peak to average power (PAPR) in a specific section (for example, a preamble section) of the output synthesized signal is performed. Ratio can be reduced.

Subsequently, in the signal processing method for synthesizing signals according to the second embodiment of the present invention, a plurality of digital up-converters 120 of the signal controller 100 may be configured based on phase control information output from the system controller 160. After controlling the phase with respect to at least one of the signals and controlling the phase, the signal delay control unit 140 delays at least one of the plurality of signals, and then combines the signals with the combiner 150. Perform the synthesis

As an example, of the three transmission signals shown in FIG. 1, the phase of the first signal signal # 1 is changed by 75 °, and the phase of the second signal signal # 2 is not changed to 0 °, After changing the phase of the third signal (signal # 3) by 225 °, delaying the third signal by 3 samples, and combining the three transmission signals through the combiner 130.

As described above, as a result of synthesizing the signals by controlling the phases of the signals and controlling the delay with respect to at least one signal, the RMS of the output signal may be as shown in FIG. 8.

3 and 8, it can be seen that due to the synthesis of the three transmission signals, the RMS of the signal in the preamble section is reduced from about 12.3 dB to about 10.6 dB. That is, when the phase is controlled with respect to at least one signal among a plurality of signals, the delay is controlled with respect to at least one signal among a plurality of signals, and the synthesis of the plurality of signals is performed, It is possible to reduce the peak to average power ratio (PAPR) in a specific section (eg, preamble section).

Next, in the signal processing method for synthesizing signals according to the third embodiment of the present invention, at least one of a plurality of signals in the digital up-converter 120 is based on the phase control information output from the system controller 160. After the phase is controlled with respect to the signal, the signal controller 100 controls the delay with respect to at least one of the plurality of signals, and controls the power with respect to at least one of the plurality of signals, then the combiner 150. ), The synthesis is performed.

Here, the phase, delay, and power control of the signal may be all performed on one signal among a plurality of signals, and at least one of phase, delay, and power control may be selectively performed on some signals of the plurality of signals. have.

As an example, of the three transmission signals shown in FIG. 1, the phase of the first signal signal # 1 is changed by 75 °, and the phase of the second signal signal # 2 is not changed to 0 °, The phase of the third signal (signal # 3) is varied by 225 ° and the third signal is delayed by three samples. After controlling power by -0.4dB with respect to the signals of the preamble section with respect to the three transmission signals, the three signals were synthesized through the combiner 130.

As described above, the phase is controlled with respect to at least one of the plurality of signals, and the power of a signal of a specific section (for example, a preamble section signal) is performed together with the delay control with respect to at least one of the plurality of signals. After controlling by -0.4dB, as a result of synthesizing the signals, the RMS of the output signal can be obtained as shown in FIG.

3 and 9, due to the synthesis of the three transmission signals, it can be seen that the RMS of the signal in the preamble section is reduced from about 12.3 dB to about 10.2 dB. That is, after controlling a phase with respect to at least one of the plurality of signals, controlling a delay with respect to at least one of the plurality of signals, and controlling power with respect to at least one of the plurality of signals, When the synthesis of the plurality of transmission signals is performed, a peak to average power ratio (PAPR) may be reduced in a specific section (eg, a preamble section) of the output synthesized signal.

In the above description with reference to FIGS. 4 and 5, the power control and the delay control are performed after the phase control is performed in the signal processing apparatus. However, in another embodiment of the present invention, the signal controller 100 may be applied as shown in FIGS. 10 and 11 to perform signal processing in the signal processing apparatus.

10 is a diagram illustrating a signal processing apparatus for synthesizing signals according to another embodiment of the present invention, and FIG. 11 is a signal controller and signal processing method of a signal processing apparatus for synthesizing signals according to another embodiment of the present invention. It is a figure which shows.

10 and 11 are the same as in the exemplary embodiment with reference to FIGS. 4 and 5 except for performing operations according to phase control, power control, and delay control in the signal controller 100. Description of matters not related to the signal controller 100 will be omitted.

10 and 11, the signal controller 100 may include a power controller 130, a signal delay controller 140, and a digital up converter 120, and include a plurality of transmitters 110, 112, and 114. After performing power control on the plurality of transmission signals outputted from the apparatus, signal delay and phase control may be performed.

When signals output from the plurality of transmitters 110, 112, and 114 are input to the signal controller 100, the power controller 130 is based on the power control information provided from the system controller 160. Control power of at least one of the plurality of transmission signals output from the plurality of first and second transmission signals 112, 114.

The signal delay control unit 140 delays and outputs at least one of the plurality of transmission signals output from the plurality of transmitters 110, 112, and 114 based on the delay control information provided from the system controller 160. .

The power control in the power control unit 130 and the signal delay control in the signal delay control unit 140 are selectively performed for each of the plurality of signals based on the power control information and the delay control information input from the system controller 160. Can be performed. As an example, at least one of signal delay control and power control may be performed on at least one of the plurality of signals. As another example, power control or signal delay control may be selectively performed on the at least one signal.

The digital up converter 120 shifts the frequency band of the plurality of transmission signals and controls the phase of at least one of the plurality of transmission signals based on phase control information input from the system controller 160. do.

The combiner 150 synthesizes a plurality of signals input via the power controller 130, the signal delay controller 140, and the digital up converter 120, and outputs the synthesized signal to the signal processor.

Referring to FIG. 11, referring to a signal processing process for synthesizing a plurality of transmission signals, a power control unit of the signal controller 100 may perform at least one signal among signals output from the plurality of transmitters 110, 112, and 114. Based on the power control information provided from the system controller 160 at 130, power control of the signal is performed.

Thereafter, the delay control is performed on at least one of the plurality of signals based on the delay control information provided from the system controller 160 in the signal delay control unit 140. In addition, frequency band shift is performed in the digital up-converter 120, and phase control is performed on at least one of a plurality of signals based on the phase control information provided from the system controller 160.

Thereafter, the combiner 150 performs a synthesis of a plurality of signals including at least one signal in which at least one of phase, power, and delay is controlled. Through this, the waveforms of the synthesized plurality of signals may be randomly distributed, thereby preventing the PAPR from being increased by preventing the Crest Waveform having a large amplitude from overlapping.

Here, since phase control, power control, and signal delay of each transmission signal are performed based on the control information, when a control value (phase control value, power control value, signal delay value) for a specific signal is 0, At least one of phase, power, and signal delay may not be controlled.

In the above description, it has been described that phase control, power control, and signal delay are performed on a plurality of transmission signals output from the plurality of transmitters 110, 112, and 114. However, this is an exemplary embodiment. The signal controller 110 may be included in the circuit, or as illustrated in FIG. 12, some components of the signal controller 100 may be integrated and implemented. In this case, a transmission signal in which at least one of phase control, power control, and signal delay is performed in the plurality of transmitters 110, 112, and 114 may be output.

As illustrated in FIG. 12, when the power control unit 130 and the signal delay control unit 140 are integrated and implemented in the transmitters 110, 112, and 114, power control is performed from the control information generated by the system controller 160. The information and the delay control information may be input to the respective transmitters 110, 112, and 114 through which the corresponding transmission signal under control is output.

The transmitters 110, 112, and 114 perform at least one of power control and delay control on at least one of a plurality of signals to be output based on the power control information and the delay control information provided from the system controller 160. Can transmit a transmission signal.

The digital up-converter 120 may perform phase control on at least one of the transmission signals output from the transmitters 110, 112, and 114 based on the phase control information from the system controller 160.

The combiner 150 synthesizes a plurality of signals input via the transmitters 110, 112, and 114 and the digital up converter 120, and outputs the synthesized signal to the signal processor. Through this, the waveforms of the synthesized plurality of signals may be randomly distributed, thereby preventing the PAPR from being increased by preventing the Crest Waveform having a large amplitude from overlapping.

The signal processing method for synthesizing signals according to the embodiment of the present invention described above may be performed through various computer means. In addition, the signal processing device for synthesizing the signals according to an embodiment of the present invention may be composed of one or more software modules or hardware.

On the other hand, those skilled in the art will understand that the present invention described above may be implemented in other specific forms without changing the technical spirit or essential features. Therefore, it is to be understood that the embodiments described above are exemplary in all respects and not restrictive.

The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention. do.

1 is a diagram illustrating three signals to be synthesized divided into I and Q signals in the time domain.

FIG. 2 is a diagram illustrating three power distributions in which synthesis is performed in a CCDF graph divided into a preamble section and a data burst section. FIG.

3 is a diagram illustrating a power distribution of a signal obtained by synthesizing three signals into a CCDF graph divided into a preamble section and a data burst section;

4 is a diagram illustrating a signal processing apparatus for synthesizing signals according to an exemplary embodiment of the present invention.

5 is a diagram illustrating a signal controller of a signal processing apparatus for synthesizing signals according to an exemplary embodiment of the present invention.

6 is a diagram illustrating a delay control method for synthesizing a plurality of signals in a signal processing method for synthesizing signals according to a second embodiment of the present invention;

7 is a diagram illustrating a power distribution of a signal output through a signal processing method for synthesizing signals according to a first embodiment of the present invention in a CCDF graph divided into a preamble section and a data burst section;

FIG. 8 is a diagram illustrating a power distribution of a signal output through a signal processing method for synthesizing signals according to a second embodiment of the present invention in a CCDF graph divided into a preamble section and a data burst section; FIG.

9 is a diagram illustrating a power distribution of a signal output through a signal processing method for synthesizing signals according to a third embodiment of the present invention in a CCDF graph by dividing the power distribution into a preamble section and a data burst section;

10 illustrates a signal processing apparatus for synthesizing signals according to another embodiment of the present invention.

11 is a diagram illustrating a signal controller of a signal processing apparatus for synthesizing signals according to another exemplary embodiment of the present disclosure.

12 illustrates a signal processing apparatus for synthesizing signals according to another embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

100: signal control unit 110, 112, 114: transmitter

120: digital up converter 130: power control unit

140: signal delay control unit 150: combiner

160: system controller

Claims (18)

In the signal processing apparatus for the synthesis of signals, A signal controller configured to perform signal control and frequency up-conversion such that at least one of a phase, a power, and a delay is applied to at least two transmission signals; And a combiner for synthesizing the output signals of the signal controller and outputting the combined signals as a single signal. The method of claim 1, wherein the signal control unit An up converter for performing the frequency up-conversion; And control means for controlling at least one of said power and said delay with respect to an output of said up converter. The method of claim 2, The up converter performs the phase control. The method of claim 1, wherein the signal control unit A plurality of transmission means for outputting a plurality of transmission signals, And control means for controlling at least one of the power and the delay with respect to the plurality of transmission means. The method of claim 1, wherein the signal control unit A plurality of transmission means for outputting a plurality of transmission signals, An up converter for performing the frequency up-conversion; And control means for controlling at least one of the power and the signal delay. The method of claim 5, The up converter performs the phase control. The method of claim 1, wherein the signal control And outputting at least one signal of the transmission signals by delaying a predetermined sample of an Orthogonal Frequency Division Multiplexing (OFDM) frame. The method of claim 1, wherein the signal control unit And a preamble section of the transmission signal. In the signal processing apparatus for the synthesis of signals, A plurality of transmitters for outputting a plurality of transmission signals; An up converter for performing frequency up-conversion of the transmission signals and selectively performing phase control on the transmissions; A power controller configured to selectively perform power control of a specific section on the transmission signals; A signal delay controller for selectively controlling a signal delay with respect to the transmission signals; And a combiner for synthesizing a plurality of transmission signals including at least one transmission signal on which at least one of phase control, power control, and signal delay are performed, and outputting the combined signals as one signal. 10. The method of claim 9, wherein the power control unit And between the plurality of transmitters and the digital up-converter, power control on at least one of the plurality of signals. 10. The method of claim 9, wherein the power control unit And between the digital up converter and the combiner to perform power control on at least one of the plurality of signals. The signal delay controller of claim 9, wherein And controlling a delay of at least one of the plurality of signals between the plurality of transmitters and the digital up-converter. The signal delay controller of claim 9, wherein And a delay of at least one of the plurality of signals between the digital up converter and the combiner. In the signal processing method for the synthesis of signals, Performing control and frequency up-conversion for at least two transmission signals to have at least one of different phase, power, and signal delay; And Synthesizing the controlled transmission signals and outputting the synthesized signals as one signal. 15. The method of claim 14 wherein the signal delay is And delaying at least one of the at least two transmission signals by a predetermined sample of an Orthogonal Frequency Division Multiplexing (OFDM) frame. 15. The method of claim 14 wherein the control of power is And controlling signal power in a specific section with respect to at least one of the at least two transmission signals. 15. The method of claim 14 wherein the control of power is The signal processing method according to claim 1, wherein a predetermined value is subtracted from a signal power of a specific section for at least one of the at least two transmission signals, or the power of the specific section signal is reduced at a predetermined rate. 15. The method of claim 14 wherein the control of power is And a preamble section of the transmission signal.

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