KR20090114274A - LCD and its manufacturing method - Google Patents

Abstract

The present invention relates to a liquid crystal display device, and a liquid crystal display device in which the liquid crystal display device can improve ripple noise without adding a process is disclosed.

The disclosed liquid crystal display device has a gate line and a data line defining a pixel region on a substrate, a common voltage supply line formed at an edge of the substrate to supply a common voltage, and spaced apart from the common voltage supply line at a predetermined interval. And a common voltage feedback line for feeding back the common voltage, and a shielding line overlapping the common voltage feedback line to shield an electric field generated from the driving unit of the backlight unit.

Description

Liquid crystal display and its manufacturing method {LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME}

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a method of manufacturing the same that can improve wave noise.

Liquid crystal display devices (liquid crastal display device) is due to the characteristics of light weight, thin, low power consumption driving, the application range is gradually increasing. In accordance with this trend, the liquid crystal display is used in office automation equipment, audio / video equipment, and the like.

The liquid crystal display displays an image by changing an electrical signal into visual information by using a characteristic in which light transmittances of liquid crystals, which are intermediate states of liquid and crystal, vary according to an applied voltage. Conventional liquid crystal display devices are composed of two substrates provided with electrodes and a liquid crystal layer interposed between the two substrates. Such a liquid crystal display device is lighter in weight, smaller in volume, and operates with less power than other display devices having the same screen size.

A liquid crystal display device displays an image by selectively transmitting light generated from a light source at a rear side to each pixel of a liquid crystal display panel at a front side as a kind of light switch. That is, the conventional cathode ray tube (CRT) controls the brightness by adjusting the intensity of the electron beam, whereas the LCD displays the screen by controlling the intensity of light generated from the light source.

In the completed liquid crystal display, display defects such as wave noise frequently occur during display.

The wave noise is caused by the electric field generated by the driving unit of the backlight unit disposed at the edge of the liquid crystal display panel to affect the common voltage supplied to the common voltage lines formed at the edge of the liquid crystal display panel. Since the common voltage is a reference when the liquid crystal display is driven, there is a problem that a malfunction of the liquid crystal display (waveform noise, etc.) occurs due to an electric field generated from the backlight unit. Here, the electric field means an unnecessary electromagnetic signal or electromagnetic noise, causing malfunction of precision electronic devices including digital technology and semiconductor technology and adversely affecting a living body such as a human body.

It is an object of the present invention to provide a liquid crystal display device and a method of manufacturing the same which can improve ripple noise without adding a process.

Liquid crystal display device according to an embodiment of the present invention,

A gate line and a data line defining a pixel area on the substrate; A common voltage supply line formed at an edge of the substrate to supply a common voltage; A common voltage feedback line spaced apart from the common voltage supply line at a predetermined interval and for feeding back the common voltage; And a shielding line overlapping the common voltage feedback line to shield an electric field generated from the driving unit of the backlight unit.

In addition, the manufacturing method of the liquid crystal display device according to another embodiment of the present invention,

Forming a gate electrode, a common voltage supply line and a shield line on the substrate; Forming a gate insulating film on the substrate including the gate electrode, a common voltage supply line, and a shielding line; Forming a semiconductor layer on the gate insulating layer corresponding to the gate electrode; Forming a source / drain electrode on the semiconductor layer; And forming a common voltage feedback line on the gate insulating layer corresponding to the shielding line.

The present invention forms a shielding line formed to overlap with the common voltage feedback line corresponding to the electric field generated by the driving unit of the backlight unit, thereby shielding the electric field, thereby preventing malfunction of the liquid crystal display.

In addition, the present invention can reduce the defective rate of the liquid crystal display device such as ripple noise by shielding the electric field generated from the backlight unit without adding a separate process. That is, the present invention has the effect of improving the yield of the liquid crystal display device.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a schematic view of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a plan view of a thin film transistor substrate illustrating region A of FIG. 1.

1 and 2, in the liquid crystal display according to the exemplary embodiment, gate lines GL1 to GLn and data lines DL1 to DLm cross each other, and the gate lines GL1. Driving the liquid crystal cell Clc at intersections of the common voltage lines VL1 to VLn formed at a predetermined interval from the gate lines GLn to the GLn and the gate lines GL1 to GLn and the data lines DL1 to DLm. The liquid crystal display panel 110 includes a thin film transistor (TFT).

The LCD device includes a data driver 120 for supplying a data signal to the data lines DL1 to DLm of the liquid crystal display panel 110, and gate lines GL1 to GLn of the liquid crystal display panel 110. A gate driver 130 for supplying a low scan signal, a backlight unit 190 for providing light to the liquid crystal display panel 110, a data driver 120, a gate driver 130, and a backlight unit 190. The controller further includes a timing controller 150 to control the common voltage generator 170 to generate a common voltage Vcom.

The liquid crystal display panel 110 is a switching element for each liquid crystal cell, and a thin film transistor TFT is formed. The gate electrode of the thin film transistor TFT is connected to the gate lines GL1 to GLn, the source electrode is connected to the data lines DL1 to DLm, and the drain electrode is the pixel electrode 140 of the liquid crystal cell Clc. And one electrode of the storage capacitor Cst. The common voltages Vcom are supplied to the common voltage lines VL1 to VLn of the liquid crystal cell Clc, and the storage capacitor Cst is provided from the data lines DL1 to DLm when the thin film transistor TFT is turned on. Charges the supplied data voltage to keep the voltage of the liquid crystal cell Clc constant.

When the scan pulse is sequentially supplied to the gate lines GL1 to GLn, the thin film transistor TFT is turned on to form a channel between the source electrode and the drain electrode to convert the voltage on the data lines DL1 to DLm into the liquid crystal cell. It is supplied to the pixel electrode 140 of (Clc). In this case, the liquid crystal molecules of the liquid crystal cell Clc modulate incident light by changing an arrangement by an electric field between the pixel electrode 140 and a common electrode (not shown).

The data driver 120 supplies a data signal to the data lines DL1 to DLm in response to the data driving control signal DDC supplied from the timing controller 150. In addition, the data driver 120 samples and latches the image data Data R, G, and B input from the timing controller 150, and then liquid crystals based on the gamma reference voltage supplied from a gamma reference voltage generator (not shown). The liquid crystal cell Clc of the display panel 110 is converted into an analog data voltage capable of expressing grayscale and supplied to the data lines DL1 to DLm.

The gate driver 130 sequentially scans the scan pulses, that is, the gate driver 130 sequentially generates the scan pulses by the gate driving control signal GDC supplied from the timing controller 150. To supply.

The timing controller 150 uses a vertical / horizontal sync signal (Vsync / Hsync), a data enable signal (DE), a clock signal (clk), and a data signal (Data R, G, B) supplied from the outside. In operation 120, a gate / data driving control signal GDC / DDC for controlling the gate driver 130 is generated.

The gate driving control signal GDC input from the timing controller 150 to the gate driver 130 may be a gate shift clock (GSC), a gate start pulse (GSP), a gate output enable (GOE), or a modulation gate output enable (MGOE). The data driving control signal DDC input to the data driver 120 may include a source sampling clock (SSC), a source start pulse (SSP), a source out put enable (SOE), a polarity reverse (POL), and the like. do.

The common voltage generator 170 may include a common voltage supply line 171 connected in parallel with the common voltage lines VL1 through VLn to supply a common voltage Vcom to the common voltage lines VL1 through VLn. A common voltage feedback line 173 is provided to feedback and compensate the common voltage Vcom supplied to the common voltage lines 171.

A driving unit of the backlight unit 190 is disposed under the liquid crystal display panel 110 corresponding to the common voltage feedback line 173, and a lower surface of the common voltage feedback line 173 of the backlight unit 190. A shielding line 180 is formed to shield the electric field generated from the driver.

The shield line 180 is formed at the same time when the gate electrodes, the gate lines GL1 to GLn, the common voltage lines VL1 to VLn, and the common voltage supply line 171 are formed, and the common voltage feedback line 173. Overlap.

The shielding line 180 has a larger area or the same area as the common voltage feedback line 173.

The shielding line 180 shields the electric field so that the common voltage Vcom F / B fed back to the common voltage feedback line 173 is not affected by the electric field generated from the driving unit of the backlight unit 190. The malfunction of the liquid crystal display device can be improved by the electric field generated from 190.

3 is a cross-sectional view of a thin film transistor substrate cut along lines II ′ and II-II ′ of FIG. 2, and FIGS. 4A to 4E are views illustrating a manufacturing process of the thin film transistor substrate of the present invention.

As shown in FIG. 3, in the thin film transistor substrate according to the exemplary embodiment, a gate electrode 111, a common voltage supply line 171, and a shield line 180 are formed on a mother substrate. A gate insulating layer 112 is formed on the mother substrate including the 111, the common voltage supply line 171, and the shielding line 180.

The common voltage supply line 171 and the shielding line 180 are formed at predetermined intervals.

On the gate insulating layer 112, a semiconductor layer including an active layer 113 and an ohmic contact layer 114 is formed in a region corresponding to the gate electrode 111.

Source / drain electrodes 115 and 116 are formed on the semiconductor layer, and a common voltage feedback line 173 is formed on the gate insulating layer 112 corresponding to the shielding line 180.

Here, the source / drain electrodes 115 and 116 are separated from each other by forming a first contact hole 160a.

The passivation layer 117 is formed on the gate insulating layer 112 including the source / drain electrodes 115 and 116 and the common voltage feedback line 173.

A second contact hole 160b is formed in the passivation layer 117 so that the drain electrode 116 is exposed, and the third and fourth are exposed so that the common voltage supply line 171 and the common voltage feedback line 173 are exposed. Contact holes 160c and 160d are formed.

The pixel electrode 140 is formed on the passivation layer 117 to be electrically connected to the drain electrode 116 through the second contact hole 160b.

In addition, a connection electrode 141 is formed on the protective layer 117 to electrically connect the common voltage supply line 171 and the common voltage feedback line 173 through the third and fourth contact holes 160c and 160d. do.

The liquid crystal display according to the exemplary embodiment described above forms a shielding line 180 formed to overlap the common voltage feedback line 173 corresponding to the electric field generated by the driving unit of the backlight unit to shield the electric field. There is an effect that can prevent the malfunction.

Therefore, the present invention can reduce the defective rate of the liquid crystal display by shielding the electric field generated from the backlight unit without adding a separate process.

A manufacturing process of the thin film transistor substrate of the present invention will be described with reference to FIGS. 4A to 4E.

Referring to FIG. 4A, a first conductive material is formed on a mother substrate through a deposition method such as sputtering, and a gate electrode 111, a common voltage supply line 171, and shielding are formed by a photolithography process and an etching process using a mask. Line 180 is formed.

The gate electrode 111, the common voltage supply line 171, and the shielding line 180 may be at least one of Al, Mo, Cu, MoW, MoTa, MoNb, Cr, and AlNb.

The gate insulating layer 112 is formed over the entire surface of the mother substrate including the gate electrode 111, the common voltage supply line 171, and the shielding line 180.

Here, the gate insulating layer 112 may be any one of a silicon oxide film, a silicon nitride film, or a laminated film thereof formed through any one of chemical vapor deposition and sputtering.

Referring to FIG. 4B, a semiconductor layer including an active layer 113 and an ohmic contact layer 114 is formed on the gate insulating layer 112 corresponding to the gate electrode 111.

After forming an amorphous silicon layer and an impurity amorphous silicon layer on the gate insulating layer 112, it is formed by a photolithography process and an etching process using a mask.

Referring to FIG. 4C, a second conductive material is formed on the gate insulating layer 112 including the semiconductor layer, and a common voltage is formed between the source / drain electrodes 115 and 116 by a photolithography process and an etching process using a mask. The feedback line 173 is formed. Here, the source / drain electrodes 115 and 116 are separated from each other to form a first contact hole 160a.

The common voltage feedback line 173 overlaps the shielding line 180 and has an area smaller than or equal to the shielding line 180.

Referring to FIG. 4D, a protective layer 117 is formed on the gate insulating layer 112 including the semiconductor layer, the source / drain electrodes 115 and 116, and the common voltage feedback line 173.

The second contact hole 160b exposing the drain electrode 116 is formed in the passivation layer 117 by patterning a photolithography process and an etching process using a mask.

In addition, third and fourth contact holes 160c and 160d exposing the common voltage supply line 171 and the common voltage feedback line 173 are formed in the protective layer 117.

Referring to FIG. 4E, the pixel electrode 140 and the connection electrode 141 are formed by forming and patterning a transparent conductive film over the entire surface of the blister layer 117 including the second to fourth contact holes 160b, 160c, and 160d. Is formed.

In more detail, a transparent conductive film such as ITO or IZO is formed on the protective layer 117 including the second to fourth contact holes 160b, 160c, and 160d, and a photolithography process and an etching process using a mask. The pixel electrode 140 and the connection electrode 141 are formed by patterning.

The connection electrode 141 electrically connects the common voltage supply line 171 and the common voltage feedback line 173.

The liquid crystal display of the present invention described above forms a shielding line 180 formed to overlap the common voltage feedback line 173 corresponding to the electric field generated by the driving unit of the backlight unit, thereby shielding the electric field to prevent malfunction. It can be effective.

Therefore, the present invention can reduce the defective rate of the liquid crystal display by shielding the electric field generated from the backlight unit without adding a separate process. That is, the present invention can improve the yield of the liquid crystal display device.

 Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a view schematically illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a plan view of a thin film transistor substrate illustrating region A of FIG. 1.

3 is a cross-sectional view of a thin film transistor substrate cut along lines II ′ and II-II ′ of FIG. 2.

4A to 4E are views illustrating a manufacturing process of the thin film transistor substrate of the present invention.

Claims (7)

A gate line and a data line defining a pixel area on the substrate; A common voltage supply line formed at an edge of the substrate to supply a common voltage; A common voltage feedback line spaced apart from the common voltage supply line at a predetermined interval and for feeding back the common voltage; And And a shielding line overlapping the common voltage feedback line to shield an electric field generated from the driving unit of the backlight unit. According to claim 1, The shielding line is formed on the same layer as the gate line and the common voltage supply line. According to claim 1, And the common voltage feedback line corresponds to the shielding line and is formed on a gate insulating layer formed on the shielding line. According to claim 1, And the shielding line has an area greater than or equal to the common voltage feedback line. Forming a gate electrode, a common voltage supply line and a shield line on the substrate; Forming a gate insulating film on the substrate including the gate electrode, a common voltage supply line, and a shielding line; Forming a semiconductor layer on the gate insulating layer corresponding to the gate electrode; Forming a source / drain electrode on the semiconductor layer; And Forming a common voltage feedback line on the gate insulating layer corresponding to the shielding line. The method of claim 5, And the common voltage supply line and the shielding line are spaced apart from each other by a predetermined interval. The method of claim 5, And the shielding line is formed to have an area equal to or larger than that of the common voltage feedback line.

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