KR20090106913A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PURPOSE: A semiconductor device and a manufacturing method thereof are provided to control the thickness of a capping layer using an electroplating process. CONSTITUTION: A semiconductor device includes a semiconductor substrate(200) and a bump(154). The semiconductor substrate has an electrode pad(120). The bump is contacted with the electrode pad and is electrically connected to the semiconductor substrate. The bump is coated with a capping layer(156). The bump includes a recess region(114) dispersing the stress applied to the bump. The recess region includes a concave surface to the bump between the end of the capping layer and the electrode pad.

Description

Semiconductor device and manufacturing method therefor {SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME}

The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly, to a semiconductor device having a bump and a manufacturing method thereof.

As the demand for high performance and high speed of semiconductor devices increases, the number of input / output pins of semiconductor chips increases. For this reason, the existing wire bonding method used in the semiconductor device package manufacturing process has reached its limit. Therefore, in recent years, a flip chip (F / C) method that can replace the wire bonding method has attracted attention. The flip chip method is a technique of bonding using a bump instead of a bonding wire.

The bumps electrically and physically connect the semiconductor chip and the wiring board. In other words, the bumps serve as movement paths and electrical junctions of electrical signals. In order to improve the bonding strength, the space between the semiconductor chip and the wiring board is generally filled with an underfill material. The underfill material not only improves the electrical / physical reliability of the semiconductor device package, but also acts as a reinforcement material for thermal stress caused by the difference in thermal expansion coefficient of the semiconductor chip and the wiring board according to temperature change. In order to maximize the advantages of the flip chip method, a study on the material and structure of the bumps.

An object of the present invention is to provide a semiconductor device and a method of manufacturing the same, which can improve physical and electrical reliability by providing bumps with improved materials and structures.

Provided is a semiconductor device for solving the above technical problems. The apparatus includes a semiconductor substrate having electrode pads; And a bump covered with a capping layer in contact with the electrode pad and electrically connected to the semiconductor substrate, wherein the bump includes a recessed region for dispersing stress applied to the bump.

According to an embodiment of the present invention, the recess region may have a concave surface facing the inside of the bump between the electrode pad and the end of the capping layer.

According to an embodiment of the present invention, an under bump metal layer between the electrode pad and the bump; It may be further included. The under bump metal layer may have an end part surface that is part of a concave surface of the recess region. The under bump metal layer may include a seed metal layer that is the same type as the bump and an adhesive layer between the seed metal layer and the electrode pad.

According to an embodiment of the present invention, a wiring board having a bonding pad mounted to the bump by mounting the semiconductor substrate; And an underfill material layer provided between the semiconductor substrate and the wiring substrate to fill the recess region.

Provided are a method of manufacturing a semiconductor device for solving the above technical problems. The method provides a semiconductor substrate having an electrode pad; Forming a mask film having an opening that exposes the electrode pad on the semiconductor substrate; Forming a bump filling the opening; Selectively removing the mask layer to form a mask pattern exposing a part of the bumps; Performing a plating process on the exposed bumps to form a capping film; Removing the mask pattern to expose a bump between the electrode pad and an end of the capping layer; And removing a portion of the exposed bumps to form a recessed region; It may include.

According to an embodiment of the present invention, before the bump is formed, it may further include forming an under bump metal layer on the electrode pad.

In example embodiments, the forming of the recess region may further include removing a portion of an end bump metal layer between the electrode pad and an end portion of the capping layer.

According to an embodiment of the present invention, there is provided a wiring board having a bonding pad; Disposing the bumper on the wiring board such that the bumper is aligned with the bonding pad; The method may further include filling the recess region by providing an underfill material layer between the wiring substrate and the semiconductor substrate after coupling the bump with the bonding pad.

According to an embodiment of the present invention, an electroplating process may be used, so that the seed film of the capping film may not be necessary. Accordingly, the production cost can be reduced in manufacturing the semiconductor device, and the manufacturing process of the semiconductor device can be simplified. In addition, the electroplating process can freely adjust the thickness of the capping film as compared with the electroless plating process.

According to an embodiment of the present invention, thermal stress generated by a stress applied to a bump, for example, a difference between thermal expansion coefficients of a semiconductor chip and a wiring board according to temperature change, may be dispersed as compared with no recess region. Can be. Accordingly, cracks and cutting of bumps can be minimized, thereby improving physical / electrical reliability of the semiconductor device.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein and may be embodied in other forms. Rather, the embodiments introduced herein are provided to ensure that the disclosed subject matter is thorough and complete, and that the spirit of the present invention to those skilled in the art will fully convey. Portions denoted by like reference numerals denote like elements throughout the specification.

1 is a cross-sectional view illustrating a semiconductor device in accordance with an embodiment of the present invention.

Referring to FIG. 1, a semiconductor device according to an exemplary embodiment may include a wiring substrate 200 and a semiconductor substrate 100 having a first insulating layer 140 exposing the electrode pads 120 and an exposed electrode pad 120. The bump 154 and the underfill material layer 260 filling the wiring substrate 200 and the semiconductor substrate 100 may be included. The semiconductor device according to the present invention may be, for example, a flip chip package.

The wiring board 200 may include, for example, a printed circuit board. The wiring board 200 may have a bonding pad 220 and a second insulating layer 240 exposing the bonding pad 220. The bonding pad 220 may be a metal having excellent conductivity. The bonding pads 220 may be printed or transferred onto the wiring board 200.

The semiconductor substrate 100 may be, for example, a silicon substrate. The electrode pad 120 may be electrically connected to conductive materials (not shown) such as a circuit pattern formed on the semiconductor substrate 100. The electrode pad 120 may include, for example, a metal material such as aluminum (Al). The first insulating layer 140 may include two layers. The first insulating layer 140 may be, for example, a photo sensitive polyimide layer 140a covering the electrode pad 120 and a silicon nitride layer 140b covering the polyimide layer. The first insulating layer 140 may be a silicon nitride film as one film.

The bump 154 is disposed between the electrode pad 120 and the bonding pad 220. The bump 154 is an electrical medium that electrically connects the electrode pad 120 and the bonding pad 220. The bump 154 may include at least one selected from copper, nickel, and tin. The capping film 156 covers the bump 154. The capping layer 156 may include, for example, a highly conductive material such as gold or silver. The capping layer 156 may be formed by performing an electrolytic plating process. The bump 154 may include a recessed region 114 between the electrode pad 120 and the end 156e of the capping layer 156. The recessed area 114 may have a concave surface into the bump 154.

An under bump metal (UBM) layer 152 may be further interposed between the electrode pad 120 and the bump 154. The under bump metal layer 152 may include an adhesive layer 152b between the seed metal layer 152a and the seed metal layer 152a and the electrode pad 120. The seed metal film 152a may be a metal film of the same type as the bump 154. The adhesive film 152b may improve the adhesion between the bump 154 and the electrode pad 120. The adhesive film 152b may serve to prevent diffusion of copper. The adhesive film 152b may include, for example, one selected from titanium (Ti), titanium tungsten (TiW), and titanium nitride (TiN). The recessed region 114 may extend to an end part of the under bump metal layer 152. An end surface of the under bump metal layer 152 may be a part of a concave surface facing the inside of the bump 154 between the electrode pad 120 and the end 156e of the capping layer 156.

An underfill material layer 260 is provided between the wiring substrate 200 and the semiconductor substrate 100 to fill the recessed region 114 of the bump 154.

According to the exemplary embodiment of the present invention, the recess region 114 filled with the underfill material layer 260 may be formed by a stress applied to the bump 154, for example, due to a difference in thermal expansion coefficient between the semiconductor chip and the wiring board according to temperature change. Thermal stresses that occur may be dispersed as compared to the absence of the recessed regions 114. Accordingly, cracks and cutting of bumps can be minimized, thereby improving physical / electrical reliability of the semiconductor device.

2A through 2H are schematic views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment.

Referring to FIG. 2A, a semiconductor substrate 100 having an insulating layer 140 exposing the electrode pads 120 may be provided. The electrode pad 120 may be electrically connected to conductive materials (not shown) such as a circuit pattern formed on the semiconductor substrate 100. The electrode pad 120 may include, for example, a metal material such as aluminum (Al). The insulating layer 140 may be, for example, a photo sensitive polyimide layer 140a covering the electrode pad 120 and a silicon nitride layer 140b conformally covering the polyimide layer 140a. The insulating layer 140 may be formed of only a silicon nitride film which is a passivation film.

Referring to FIG. 2B, a seed metal layer 152a may be formed on the adhesive layer 152b and the adhesive layer 152b in contact with the electrode pad 120. The adhesive layer 152b and the seed metal layer 152a may be partially extended onto the insulating layer 140 adjacent to the electrode pad 120. That is, the seed metal layer 152a and the adhesive layer 152b may have ends on the insulating layer 140.

The adhesive film 152b may improve the wetting property of the electrode pad 120. The adhesive film 152b may include, for example, one selected from titanium (Ti), titanium tungsten (TiW), and titanium nitride (TiN). The seed metal layer 152a may be, for example, a seed layer of the bump 154 to be subsequently formed. The seed metal layer 152a may include, for example, one selected from copper, nickel, and tin alloys. When the seed metal layer 152a includes copper, the adhesive layer 152b may serve to prevent diffusion of copper. The adhesive film 152b and the seed metal film 152a may form an under bump metal layer (UBM layer) 152.

Referring to FIG. 2C, a mask film 108 having an opening 109 exposing the seed metal film 152a is formed. The mask film 108 may be, for example, a photoresist film.

A bump metal film is grown from the seed metal film 152a to form a bump 154 filling the opening 109. The bump 154 may include at least one selected from copper, nickel, and tin. The bump 154 may be formed by performing an electroplating process or an electroless plating process, for example.

Referring to FIG. 2D, the mask layer 108 is selectively recessed to form a mask pattern 108a exposing a part of the bump 154. The recess process may be, for example, a dry etching process. The recess process may be performed until the seed metal layer 152a and the adhesive layer 152b are not exposed. Accordingly, the mask pattern 108a may cover end portions of the seed metal layer 152a and the adhesive layer 152b.

Referring to FIG. 2E, an exposed bump 154 may be covered with a capping layer 156 by performing an electroplating process. The capping layer 156 may cover a portion of the upper surface and the side surface of the bump 154. An end part 156e of the capping layer 156 may contact an upper surface of the mask pattern 108a. The capping layer 156 may improve conductivity of the bump 154. The capping layer 156 may have an etch selectivity with respect to the seed metal layer 152a and the bump 154. The capping layer 156 may include, for example, a highly conductive material such as gold or silver.

Meanwhile, when the capping film is formed by performing an electroless plating process, a seed film of the capping film may be required. According to an embodiment of the present invention, an electroplating process may be used, so that a seed film of a capping film may not be required. Accordingly, the production cost can be reduced in the manufacture of the semiconductor device. Since the seed film of the capping film is not formed, the manufacturing process of the semiconductor device can also be simplified. In addition, the electroplating process can freely adjust the thickness of the capping film as compared with the electroless plating process.

Referring to FIG. 2F, the mask pattern (108a of FIG. 2E) is removed to form the side surface of the bump 154 under the end portion 156e of the capping layer 156, the end portion of the seed metal layer 152a and the adhesive layer 152, And the insulating layer 140 may be exposed. The mask pattern 108a may be removed, for example, by performing an ashing process.

The exposed bump 154 and the seed metal layer 152a may be removed to form a recessed region 114 between the end portion 156e of the capping layer 156 and the electrode pad 120. The removal process may be, for example, a wet etching process. For example, when the capping film 156 includes gold and the seed metal film 152a and the bump 154 include copper, the etching solution selectively etches the seed metal film 152a and the bump 154. It may include ammonia water or hydrogen peroxide water. In addition, the exposed adhesive layer 152b may be removed to extend the recessed region 114. For example, when the adhesive film 152b includes titanium, the etching solution may include hydrogen fluoride (HF) for selectively etching the adhesive film 152b.

Referring to FIG. 2G, a wiring board 200 having a bonding pad 220 is provided. The bonding pads 220 may be printed or transferred onto the wiring board 200. The bonding pad 220 may be a metal having excellent conductivity. The wiring board 200 may include a wiring insulating layer 240 exposing the bonding pads 220. The bumps 154 may be arranged to be aligned with the bonding pads 220 on the wiring board 200.

Referring to FIG. 2H, after the bumps 154 are compressed and bonded to the bonding pads 220, the bumps 154 may be provided by providing an underfill material layer 260 between the wiring board 200 and the semiconductor substrate 100. The recessed region 114 of is filled with the underfill material film 260. Thus, a semiconductor device, such as a flip chip package, is completed.

According to the exemplary embodiment of the present invention, the recess region 114 filled with the underfill material layer 260 may be formed by a stress applied to the bump 154, for example, due to a difference in thermal expansion coefficient between the semiconductor chip and the wiring board according to temperature change. Thermal stresses that occur may be dispersed as compared to the absence of the recessed regions 114. Accordingly, cracks and cutting of bumps can be minimized, thereby improving physical / electrical reliability of the semiconductor device.

The description of the above embodiments is merely given by way of example with reference to the drawings in order to provide a more thorough understanding of the present invention and should not be construed as limiting the invention. In addition, various changes and modifications are possible to those skilled in the art without departing from the basic principles of the present invention.

1 is a cross-sectional view illustrating a semiconductor device in accordance with an embodiment of the present invention.

2A to 2H are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment.

Claims (10)

A semiconductor substrate having electrode pads; A bump coated with a capping layer, the bump being in contact with the electrode pad and electrically connected to the semiconductor substrate, The bump includes a recess region for dispersing the stress applied to the bump. The method of claim 1, And the recess region has a concave surface facing the inside of the bump between the electrode pad and an end of the capping film. The method of claim 2, An under bump metal layer between the electrode pad and the bump; A semiconductor device further comprising. The method of claim 3, wherein And the under bump metal film has an end part surface that is part of a concave surface of the recess region. The method of claim 4, wherein The under bump metal film includes a seed metal film of the same type as the bump and an adhesive film between the seed metal film and the electrode pad. The method of claim 1, A wiring board on which the semiconductor substrate is mounted and has a bonding pad in contact with the bumps; And And an underfill material layer provided between the semiconductor substrate and the wiring substrate to fill the recess region. Providing a semiconductor substrate having electrode pads; Forming a mask film having an opening that exposes the electrode pad on the semiconductor substrate; Forming a bump filling the opening; Selectively removing the mask layer to form a mask pattern exposing a part of the bumps; Performing a plating process on the exposed bumps to form a capping film; Removing the mask pattern to expose a bump between the electrode pad and an end of the capping layer; And Removing a portion of the exposed bumps to form a recessed region; The manufacturing method of the semiconductor device containing. The method of claim 1, Before forming the bumps, A method of manufacturing a semiconductor device, further comprising forming an under bump metal film on the electrode pad. The method of claim 8, Forming the recessed region is: And removing a portion of an under bump metal film between the electrode pad and an end of the capping film. The method of claim 7, wherein Providing a wiring board having a bonding pad; Disposing the bumper on the wiring board such that the bumper is aligned with the bonding pad; And Coupling the bump with the bonding pad, and then providing an underfill material film between the wiring substrate and the semiconductor substrate to fill the recess region.

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