KR20080078486A - One Chip Type RF Integrated Module - Google Patents

Abstract

One-chip RF integrated module according to an embodiment of the present invention includes a front end module for separating and filtering the RF transmission and reception signals; A power amplification module for amplifying a transmission signal and transmitting the amplified signal to the front end module; A transceiver which receives a reception signal from the front end module and outputs a transmission signal to the power amplifier module; And a matching circuit unit for matching impedances between the respective components, and packaged on a single substrate, wherein the pin pattern of the transceiver and the pin pattern of the front end module are formed at different ends of the substrate, respectively.

According to the embodiment of the present invention, since each circuit element can be integrated in the form of a package chip in a bare chip state, there is an effect of minimizing the size of the communication module. In addition, when other circuit modules are mounted together in a mobile communication terminal product, each module can be mounted in a slim housing, and the phenomenon that an interference signal is generated between pin patterns can be suppressed, resulting in signal degradation and oscillation. It is possible to prevent the signal from being distorted.

Description

Radio chip integrated module of one chip type

1 is a top view schematically illustrating a form in which components of a general WLAN RF module are mounted on a board;

Figure 2 is a top view schematically showing a form in which the components of the win chip-type RF integrated module packaged according to an embodiment of the present invention.

<Explanation of symbols for main parts of drawing>

100: RF integrated module 110: FEM (Front End Module)

120: matching circuit unit 130: PAM (Power Amplifier Module)

140: transceiver 150: substrate

B: Tx / Rx I / Q Pin Pattern C: RF_In / Out Pin Pattern

D: first power pin pattern E: second power pin pattern

F: Clock Signal Pin Pattern

The present invention relates to an RF module.

The communication module is implemented as a single module in which circuit elements for processing radio signals used on the mobile communication terminal as RF signals and baseband signals are mounted on a single board.

Meanwhile, as high-speed data transmission technology through a wireless channel is developed, various electronic communication devices used in daily life are connected through a network, and more convenient services are provided. Such wireless network technology includes a wireless local area network (WLAN). An example is technology.

Using the WLAN technology, a network of several Mbps to several tens of Mbps can be configured using an inductrial, scientific and medical (ISM) band region of 2.4 GHz band without a license, and a direct sequence spread spectrum (DSSS) method. The high speed 802.11 standard allows various communication systems to be networked.

The WLAN device includes an access point (AP), a wireless LAN card, and the like, which are essentially provided with a single module RF module.

FIG. 1 is a top view schematically illustrating a form in which components of a general WLAN RF module 10 are mounted on a substrate A. As shown in FIG.

Referring to FIG. 1, the WLAN RF module 10 includes a front end module (FEM) 11, a matching circuit unit 12, a power amplifier module (PAM) 13, and a transceiver (Tranceiver). 14) and an oscillator (OSC) 15, each component having a form mounted on the substrate A as a separate package element.

The transceiver 14 converts the transmission signal from the baseband signal region to the RF signal region and transfers it to the power amplifier module 13 through an output line.

The power amplification module 13 amplifies the transmission signal, and the switch of the front end module 11 separates the transmission signal and transfers it to a filter (BPF) that removes spurious components generated during amplification. The front end module 11 is connected to the antenna terminal.

On the other hand, the received signal input to the front-end module 11 through the antenna terminal is input to the transceiver 14 through a filter (suppresses the out-of-band signal; usually, the transmission and reception filter is implemented as a single element) and a switch . The oscillator 15 supplies a clock signal to the transceiver 14, and the transceiver 14 processes the received signal in the baseband signal region.

Such components 11, 12, 13, 14, and 15 are discretely mounted as package elements as described above, thus increasing the arrangement area.

For example, when the front end module 11, the matching circuit unit 12, the power amplification module 13, and the transceiver 14 are individually mounted on a board, they occupy an area of more than a dozen mm ² , which is a mobile communication terminal product. It is recognized as a big limitation in miniaturization.

In particular, the recent mobile communication terminal products are also equipped with other modules, such as a camera module, a short-range communication module such as Bluetooth, a Digital Multimedia Broadcasting (DMB) communication module, so that the four block structure described above has its own arrangement This affects not only the design but also the mounting structure of other modules.

In addition, the general RF module is designed to arrange the chip inside the substrate and to design a pin map according to the position of the chip, so interference occurs between the pin patterns.

For example, there is a high probability that interference occurs between the baseband signal of the transceiver 14 and the pin pattern for inputting and outputting the RF signal of the front end module 11, and between the power supply pin pattern and the pin pattern of the clock signal. Such interference may cause problems such as degradation and oscillation in the signal processing characteristics of the chip device.

That is, if the signal is distorted in the process of transmitting the signal inside the RF module, even if a normal signal is received, the transceiver 14 or the digital signal processing terminal (connected to the transceiver 14 and located outside the module) cannot interpret the signal. Therefore, since the transmission and reception quality of the mobile communication terminal is deteriorated, there is an urgent need for improvement.

An embodiment of the present invention provides a one-chip RF integrated module in which each circuit device for processing an RF signal and a baseband signal is integrated into a one-chip package device in a bare chip state, and a pin pattern is arranged so that interference does not occur. .

One-chip RF integrated module according to an embodiment of the present invention includes a front end module for separating and filtering the RF transmission and reception signals; A power amplification module for amplifying a transmission signal and transmitting the amplified signal to the front end module; A transceiver which receives a reception signal from the front end module and outputs a transmission signal to the power amplifier module; And a matching circuit unit for matching impedances between the respective components, and packaged on a single substrate, wherein the pin pattern of the transceiver and the pin pattern of the front end module are formed at different ends of the substrate, respectively.

Hereinafter, the one-chip RF integrated module according to the present invention will be described in detail with reference to the accompanying drawings. In the embodiment of the present invention, the one-chip RF integrated module will be a communication module for processing a WLAN signal.

2 is a top view schematically showing a form in which the components of the one-chip RF integrated module 100 according to the embodiment of the present invention are packaged.

Referring to FIG. 2, the one-chip RF integrated module 100 according to an embodiment of the present invention may include a front end module (FEM) 110, a matching circuit 120, and a power amplifier module. A power amplifier module (PAM) 130 and a transceiver 140 are formed on a single substrate 150, and a plurality of input / output pin patterns are formed on an end side of the substrate 150.

In an exemplary embodiment of the present invention, the fin pattern includes a total of 68 fins, and the rectangular copper foil regions spaced / arranged along the periphery of the substrate 150 (other regions are removed from the copper foil region and a solder resist is applied). Is formed.

In addition, a die bonding pattern, a wire bonding pattern, a line pattern, etc. may be formed on the substrate 150 such that each component is mounted on the substrate 150 and the input / output signal lines and the pin patterns of the component may be electrically connected.

In particular, the pin pattern is a pin pattern (C; hereinafter referred to as "RF-In / Out pin pattern") connected to the front-end module 110, a pin pattern (B; hereinafter, "connected to the transceiver 140) Tx / Rx I / Q pin pattern ”), power supply pin patterns (D, E), and clock signal pin patterns (F). These pin patterns serve as a passage for inputting and outputting signals to and from external circuit devices. As a pin pattern, many interference phenomena occur.

According to the present invention, each component including the front end module 110, the matching circuit unit 120, the power amplification module 130, and the transceiver 140 is mounted on a single substrate 150 in a chip state and molded. In addition to implementing win chip type (package chip type) RF integrated modules, it is also another object to suppress the occurrence of interference between pin patterns by designing a new pin pattern structure (pin map). .

Therefore, in the description of the pin pattern structure according to the embodiment of the present invention, the RF-In / Out pin pattern (C), Tx / Rx I / Q pin pattern (B), the power source is greatly affected by the interference signal The pin patterns D and E and the clock signal pin pattern F will be mainly described.

The substrate 150 may be provided as a multi-layered substrate such as a metal core printed circuit board (MCPCB), and each of the components 110, 120, 130, and 140 may have a top layer (eg, a top layer) of the substrate 150. Top layer) and may be electrically connected to an inner layer through a via hole.

For example, an inner layer of the substrate 150 may include an electro-static discharge (ESD) device, a temper-compensated X-tal oscillator (TCXO) circuit, and a microstrip line that suppress electrostatic discharge from occurring due to parasitic components. The distribution element may be located, and the top and bottom parts 110, 120, 130, and 140 of the top layer may have other electronic elements in the inner layer (via an electronic device not related to the technical spirit of the present invention) through via holes that transmit electrical signals between layers. May be electrically connected).

The transceiver 140 is mounted on the upper right side of the substrate 150, and the front end module 110 is mounted on the lower right side. The power amplifier module 130 is mounted on the upper left side of the substrate 150, and the matching circuit unit 120 is mounted on the lower left side.

The mounting positions of the components 110, 120, 130, and 140 are not only considering interference between devices (eg, the front end module 110 and the power amplification module 130 are spaced apart as much as possible), It is determined in consideration of the structure.

The front end module 110 may include a transmission filter, a reception filter (all may be provided as “BPF (Band Pass Filter)”), a signal separation unit (eg, “Single Pole Double Throw” (SPDT), “Duplexer”, etc.). It may be provided with the same device), etc., through the RF-In / Out pin pattern (C) outputs a transmission signal to an external antenna or receives a reception signal from the antenna.

The received signal transmitted from the external antenna is suppressed out-of-band signal through the reception filter of the front end module 110, and is transmitted to the transceiver 140 through the signal separation unit.

The transceiver 140 processes the received signal transmitted from the front end module 110 from the analog (RF) signal area to the digital (baseband) signal area, and processes the processed signal into a Tx / Rx I / Q pin pattern (B). ) To an external main operation unit (for example, a processor such as a DSP).

In addition, the transceiver 140 processes the transmission signal from the digital signal region to the analog signal region, and transmits the processed transmission signal to the power amplifier module 130.

The power amplification module 130 amplifies the transmission signal to a power level that can be transmitted through the antenna, and transmits the amplified signal to the signal separation unit of the front end module 110.

The signal separation unit separates the transmission signal from the reception signal and transmits the transmission signal to the transmission filter, and the transmission filter extracts only the transmission signal of the corresponding band by suppressing signals of noise components such as a slewus signal and an interference signal generated in the amplification process. .

The extracted transmission signal may be transmitted to an external antenna through the RF-In / Out pin pattern (C).

The matching circuit unit 120 performs a function of matching the impedance between the power amplifier module 130 and the transceiver 140, the front end module 110, and the transceiver 140.

The matching circuit unit 120 may be implemented with passive elements such as microstrip lines, capacitors, inductors, and resistors.

When the components 110, 120, 130, and 140 operated as described above are mounted on a single substrate in a bare chip state, and after a circuit is formed and molded and packaged, the one-chip RF integrated module 100 is about 13.5 mm × It can be implemented in a small size of 9.2mm.

Meanwhile, the pin pattern of the one-chip RF integrated module 100 according to the present invention will be described. In the case of the Tx / Rx I / Q pin pattern B, the side end of the substrate 150 adjacent to the transceiver 140 is defined. It is formed at the right end of the substrate 150.

The Tx / Rx I / Q pin pattern B includes an input pin pattern Rx_QN of an Rx Q signal, an output pin pattern Rx_QP of an Rx Q signal, an input pin pattern Rx_IN of an Rx I signal, and an Rx I signal. Output pin pattern (Rx_IP), Tx Q signal input pin pattern (Tx_QN), Tx Q signal output pin pattern (Tx_QP), Tx I signal input pin pattern (Tx_IN), Tx I signal output pin pattern (Tx_IP) It includes.

Ground pin patterns may be formed at both ends of the Rx_QN pin patterns to the Tx_IP pin patterns, respectively, to suppress the influence of signals input and output from the transceiver 140 on adjacent devices or pin patterns.

According to the present invention, the Tx / Rx I / Q pin pattern (B) and the RF-In / Out pin pattern (C) are formed at the other end of the substrate 150, and the RF-In / Out pin pattern (C) Is formed on the lower side of the front end module 110, that is, the lower side end of the substrate 150.

The RF-In / Out pin pattern (C) is a pin pattern connected to an external antenna, and similar to the Tx / Rx I / Q pin pattern (B), ground pin patterns are formed on both sides to block the electromagnetic signal. have.

In addition, the power pin pattern includes a first power pin pattern D (WLAN_3.3V_R) and a second power pin pattern E (WLAN_3.3V), where the first power pin pattern D has a current value of about 300 mA. It has a power supply to the power amplification module (130).

In addition, the second power pin pattern E has a current value of about 600 mA and supplies power to the transceiver 140.

The first power pin pattern D is formed on the lower left end of the substrate 150, that is, the left side of the RF-In / Out pin pattern C, and the second power pin pattern E is formed on the substrate 150. It is formed below the left side end.

The ground pattern is formed on both sides of the first power pin pattern D to suppress the influence of electromagnetic fields generated by the second power pin pattern E and the RF-In / Out pin pattern C.

The enable signal pin pattern LDO_EN of the local oscillation circuit (included in the transceiver 140), the enable signal pin pattern PA_PE of the power amplifier module 130, and the second power pin pattern E, respectively. The battery connection pin pattern VBAT is sequentially formed, and a ground pin pattern is formed next to the second power source pin pattern E to the battery connection pin pattern VBAT to block the electromagnetic interference signal.

The clock signal pin pattern F is formed above the left end of the substrate 150. Thus, the clock signal pin pattern F, the power pin patterns D and E, and the Tx / Rx I / Q pin pattern B are formed. And the RF-In / Out pin pattern C is formed at the other end of the substrate 150 and spaced apart by the ground pin pattern, thereby preventing an electrical interference problem from occurring.

In the case of the WLAN communication module, the clock signal pin pattern F receives a clock signal of about 40 MHz, and the clock signal is particularly a Tx / Rx I / Q pin pattern B and a MAC / BBP control pin pattern (substrate 150). The pins formed on the upper side of the side have a lot of influence, but electrical interference can be minimized by the ground pin patterns formed on both sides.

Each component 110, 120, 130, 140 is mounted on the one-chip RF integrated module 100 according to the present invention and the pin pattern is formed, and then molded into a synthetic resin material to protrude to the outside when produced as a single package product. The pin (leg) is electrically connected to the pin pattern.

Although the present invention has been described above with reference to the embodiments, these are only examples and are not intended to limit the present invention, and those skilled in the art to which the present invention pertains may have an abnormality within the scope not departing from the essential characteristics of the present invention. It will be appreciated that various modifications and applications are not illustrated. For example, each component specifically shown in the embodiment of the present invention can be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

According to the one-chip RF integrated module according to an embodiment of the present invention, circuit elements such as a front end module, a matching circuit unit, a power amplification module, and a transceiver can be integrated in the form of a package chip in a bare chip state, thereby minimizing the size of the communication module. It can work.

In addition, according to an embodiment of the present invention, in the case of mounting other circuit modules such as a camera module, a near field communication module, and a DMB receiving module together in a mobile communication terminal product, each module may be mounted in a slim housing, Freedom is effective.

In addition, according to an embodiment of the present invention, it is possible to suppress the phenomenon that the interference signal is generated between the pin pattern, thereby preventing the signal distortion such as signal degradation and oscillation phenomenon, and the transmission and reception quality of the mobile communication terminal There is an effect to improve.

Claims (8)

A front end module for separating and filtering an RF transmission / reception signal; A power amplification module for amplifying a transmission signal and transmitting the amplified signal to the front end module; A transceiver which receives a reception signal from the front end module and outputs a transmission signal to the power amplifier module; And a matching circuit unit for matching impedances between the respective components, and packaged on a single substrate. And a pin pattern of the transceiver and a pin pattern of the front end module are formed on the other end of the substrate, respectively. The method of claim 1, A clock signal pin pattern and a power supply pin pattern, The clock signal pin pattern and the power pin pattern is a one-chip RF integrated module formed on the pin pattern of the transceiver and the pin pattern of the front end module and the other side of the substrate. The method of claim 1, And a ground pin pattern formed at both ends of at least one of the pin pattern of the transceiver and the pin pattern of the front end module. The method of claim 2, And a ground pin pattern formed at both ends of at least one of the clock signal pin pattern and the power pin pattern. The method of claim 2, wherein the power pin pattern is A first power pin pattern and a second power pin pattern; The first chip pin pattern and the second pin pin pattern is a one-chip RF integrated module formed on the other end of the substrate, respectively. The method of claim 2, The pin pattern of the transceiver is formed on the right end of the substrate, The pin pattern of the front end module is formed on the lower end of the substrate, The clock signal pin pattern is formed above the left end of the substrate, The power pin pattern is a one-chip RF integrated module formed below the left end of the substrate. The method of claim 5, The first power pin pattern is formed on the lower end of the substrate, The second power pin pattern is a one-chip RF integrated module formed on the left end of the substrate. The method of claim 1, wherein the pin pattern of the transceiver Rx Q signal input pin pattern, Rx Q signal output pin pattern, Rx I signal input pin pattern, Rx I signal output pin pattern, Tx Q signal input pin pattern, Tx Q signal output pin pattern, Tx I A one-chip RF integrated module including at least one pin pattern of the input pin pattern of the signal, the output pin pattern of the Tx I signal.

Images