KR20080060363A - Pattern formation method of semiconductor device - Google Patents

Abstract

The present invention relates to a pattern forming technology of a semiconductor device, the present invention comprising the steps of forming a polysilicon hard mask containing carbon or fluorine atoms on the etching layer; Forming a photoresist pattern on the hard mask; Etching the hard mask using the photoresist pattern as a mask to form a hard mask pattern; And etching the etched layer using the hard mask pattern as a mask, wherein the pattern forming method of the semiconductor device according to the present invention comprises forming a hardmask material film having a low etching rate on the etched layer. During the etching process of the etching target layer using the mask pattern, the etching margin of the hard mask pattern may be secured to improve the profile of the etching target layer pattern.

Description

METHODS FOR FORMING A PATTERN IN SEMICONDUCTOR DEVICE

1 is a photograph showing a profile of a pattern formed using a hard mask according to the prior art.

2 is a flowchart illustrating a method of forming a pattern of a semiconductor device according to an embodiment of the present invention.

3A and 3B illustrate a carbon-rich polysilicon hardmask or a florin-rich polysilicon hardmask in accordance with one embodiment of the present invention.

Figure 4 is a photograph showing a profile of a pattern formed using a hard mask according to an embodiment of the present invention.

TECHNICAL FIELD This invention relates to the manufacturing technique of a semiconductor element. Specifically, It is related with the method of pattern formation of a semiconductor element.

As the line width of the required pattern is gradually reduced as the semiconductor device is highly integrated, there is also a demand for reducing the size of the photoresist pattern formed in the photolithography process. With the recent development of exposure technology, the main component of the photoresist has been changed to facilitate patterning, thereby reducing the size of the photoresist pattern.

However, due to the decrease in the photoresist pattern thickness due to the change in the main component of the photoresist pattern and the reduction in the size of the photoresist pattern, there is a lack of an etching margin when the etching layer is etched by a subsequent process using only this photoresist pattern. During the etching of the layer to be etched, the photoresist pattern is also lost, which causes a problem in that a desired pattern cannot be formed.

In order to solve this problem, a hard mask is generally formed between the etched layer and the photoresist pattern, the hard resist pattern is transferred by transferring the photoresist pattern to the hard mask, and the etched layer is etched using the hard mask pattern. Etch margin is secured. The hard mask may be a single film made of a nitride film, a polysilicon film, a tungsten film, an amorphous carbon film, or a multi function hard mask (MFHM) alone, or a multilayer film having at least two films stacked thereon. Here, in order to secure an etching margin, it is advantageous to use a double-layer hard mask made of two kinds of films having different etching selectivity, but two depositions are required in the process and the reliability of the process is secured according to the correlation between the two kinds of films. There is a problem that is difficult. Therefore, in the present specification, only a case of using a single layer hard mask will be considered in order to simplify the process and secure reliability.

However, in the case of using a hard mask made of a single layer, as the integration of semiconductor devices has been further progressed recently, there is a limit in the etching margin when etching a to-be-etched layer using a single layer hard mask. That is, when the etching target layer is etched using a single layer hard mask pattern, since the thickness of the hard mask pattern is thin, the hard mask pattern is lost during the etching of the etching layer, resulting in poor profile of the hard mask pattern. As a result, a problem arises in that the etched layer cannot be formed in a desired pattern. In order to overcome this problem by increasing the thickness of the single-layer hard mask, it can be considered that the photoresist pattern during the etching of the hard mask is increased due to the increase of the hard mask thickness when the hard mask is etched using the photoresist pattern. As a result, it is difficult to secure a desired hard mask pattern, and thus, as before the thickness of the hard mask is increased, the profile of the hard mask pattern becomes poor, which causes a problem that the etching target layer cannot be formed in the desired pattern.

1 is a photograph showing a profile of a pattern formed using a hard mask according to the prior art.

Referring to FIG. 1, it can be seen that the upper part of the pattern is relatively thin compared to the lower part so that its profile is poor. This is because, as described above, the etching margin of the hard mask pattern is insufficient when the etching layer is etched.

Therefore, while maintaining the thickness of the hard mask is required, a technique for improving the profile of the etched layer pattern by securing the etching margin of the hard mask pattern when etching the etched layer using the hard mask pattern.

The present invention is proposed to solve the above problems of the prior art, by forming a material layer for a hard mask having a low etch rate (etch rate) on the etched layer, hard during the etching process of the etched layer using a hard mask pattern It is an object of the present invention to provide a method of forming a pattern of a semiconductor device capable of improving the profile of an etched layer pattern by securing an etching margin of a mask pattern.

The method of forming a pattern of a semiconductor device of the present invention for achieving the above object comprises the steps of: forming a polysilicon hard mask containing carbon or fluorine atoms on the etched layer; Forming a photoresist pattern on the hard mask; Etching the hard mask using the photoresist pattern as a mask to form a hard mask pattern; And etching the etched layer using the hard mask pattern as a mask.

Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

2 is a flowchart illustrating a method of forming a pattern of a semiconductor device according to an embodiment of the present invention.

First, a hard mask made of a single layer is formed on the etched layer (s201). In order to secure an etching margin of the hard mask pattern in the subsequent etching layer etching process (s204), the hard mask should be formed of a material film having a lower etching rate than that of the etching layer. In this specification, as an example, a carbon-rich polysilicon film or a fluorine-rich polysilicon film is used as a material layer for a hard mask having a low etching rate. A method of forming a carbon-rich polysilicon film or a florin-rich polysilicon film will be described in detail below with reference to FIGS. 3A and 3B.

3A illustrates a carbon-rich polysilicon hardmask or a florin-rich polysilicon hardmask according to an embodiment of the present invention. Referring to FIG. 3A, it can be seen that carbon atoms or florin atoms are distributed almost uniformly in the polysilicon film.

The method of forming the carbon-rich or florin-rich polysilicon film shown in FIG. 3A is as follows.

Generally polysilicon films are deposited by pyrolysis of SiH ₄ gas in the chamber. At this time, a carbon-based gas (for example, C _x H _y ) is injected into the chamber together with SiH ₄ gas and pyrolyzed to form a carbon-rich polysilicon film in which Si atoms and C atoms are bonded. SiH ₄ gas and C _x H _y The pyrolysis reaction of the gas can be represented by the following formula.

SiH ₄ → Si + 2H ₂ (One)

C _x H _y → xC + y / ₂ (2)

The C atom is bonded to the Si atom produced by the above formulas (1) and (2). Here, by controlling the amount of C _x H _y by controlling the number (x) of the C atoms bonded to the Si atoms of the polysilicon film The carbon rich can be adjusted.

Similarly, when a Florin-based gas (eg, HF or NF ₃ ) is injected into the chamber together with the SiH ₄ gas and pyrolyzed, a Florin-rich polysilicon film having Si and F atoms bonded thereto is formed. HF or NF ₃ The pyrolysis reaction of the gas can be represented by the following formula.

(HF) _a → aF + a / ₂ (3)

(NF ₃ ) _b → 3bF + b / ₂ (4)

F atom produced by the above formula (3) or (4) is bonded to Si produced by the above formula (1), whereby by controlling the amount of HF or NF ₃ The number of F atoms bonded to Si atoms (a, 3b) is adjusted to control the polysilicon film. You can adjust the amount of Florin Rich.

At this time, by simultaneously injecting a carbon-based gas and a fluorine-based gas, it is also possible to form a carbon-florin-rich polysilicon film containing carbon atoms and fluorine atoms simultaneously in a polysilicon film by combining Si atoms with C or F atoms.

This pyrolysis process for forming a carbon-rich polysilicon film or a florin-rich polysilicon film is preferably carried out under a pressure of 1.0 Torr or less and a temperature condition of 400 degrees or more. In addition, the flow rate of the SiH ₄ gas injected into the chamber during the pyrolysis process is preferably about 500-200 sccm, and the carbon-based gas or the florin-based gas flow rate can be adjusted to a desired degree. At this time, N ₂ gas may be injected together, where N ₂ The flow rate of the gas is preferably about 50 ~ 300sccm.

Figure 3b is a view showing a carbon-rich polysilicon hardmask or florin-rich polysilicon hardmask according to another embodiment of the present invention. Compared with the polysilicon film shown in Fig. 3A, it can be seen that the polysilicon film shown in Fig. 3B contains carbon or florin atoms only on the upper portion thereof.

The method of forming the carbon-rich polysilicon film or the florin-rich polysilicon film shown in FIG. 3B is as follows.

First, a polysilicon film is formed on the etched layer by a general deposition method, and then the surface of the polysilicon film is plasma treated with a carbon-based gas or a florin-based gas so that carbon atoms or florin atoms are contained on the polysilicon film. In more detail, a natural oxide film (SiO ₂ ) is formed on the polysilicon film and then mounted in the plasma chamber. Subsequently, a carbon gas (eg C _x H _y ), a florin gas (eg HF) or a fluorocarbon gas (eg C _x H _x F _y ) is injected into the plasma chamber. , C _x H _y Gas, HF Gas, C _x H _x F _y A predetermined power, for example, 1000 W or more is applied to bring the gas into a plasma state. The resulting C ⁺ or H ⁺ ions react with SiO _{2 on} top of the polysilicon film to form CO ₂ or H ₂ O and thereby bond C or F atoms to the Si bond, thereby forming the top of the polysilicon film. On the surface, a carbon-rich polysilicon film, a florin-rich polysilicon film, or a carbon-florin-rich polysilicon film is formed.

Subsequently, a photoresist pattern defining an etched region of an etched layer is formed on the carbon-rich polysilicon film or the florin-rich polysilicon film for hard mask formed by the above method (see FIGS. 3A and 3B) ( s202).

Subsequently, the lower hard mask carbon-rich polysilicon film or the florin-rich polysilicon film is etched using the photoresist pattern as a mask (s203).

Subsequently, the etched layer under the etch mask is etched using the etched hard mask carbon-rich polysilicon film or florin-rich polysilicon film (s204). As described above, since the carbon-rich polysilicon film or the florin-rich polysilicon film has a low etching rate, the carbon-rich polysilicon film or the florin-rich polysilicon film may not be removed during the etching process, thereby forming the etching target layer in a desired pattern.

4 is a photograph showing a profile of a pattern formed using a hard mask according to an embodiment of the present invention.

Referring to FIG. 4, it can be seen that the profile is improved compared to the pattern shown in FIG. 1. This is because the hard mask according to the present invention is made of a carbon-rich or florin rich polysilicon film having a low etching rate. Therefore, when the subsequent etching process is performed using this hard mask, the etching margin of the hard mask pattern can be secured and the profile of the layer to be etched can be improved.

Although the technical spirit of the present invention has been specifically recorded in accordance with the above-described preferred embodiments, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

According to the method for forming a pattern of a semiconductor device according to the present invention, by forming a material layer for hard mask having a low etching rate on the etched layer, the etching margin of the hard mask pattern is secured during the etching process of the etched layer using the hard mask pattern. This can improve the profile of the etched layer pattern.

Claims (15)

Forming a polysilicon hard mask containing carbon or fluorine atoms on the etched layer; Forming a photoresist pattern on the hard mask; Etching the hard mask using the photoresist pattern as a mask to form a hard mask pattern; And Etching the etched layer using the hard mask pattern as a mask Pattern forming method of a semiconductor device comprising a. The method of claim 1, The hard mask forming step, Carried out by a pyrolysis reaction of a gas containing a SiH ₄ gas and a carbon-based gas Pattern formation method of a semiconductor device. The method of claim 1, The hard mask forming step Carried out by pyrolysis of a gas comprising a SiH ₄ gas and a florin-based gas Pattern formation method of a semiconductor device. The method of claim 2, The carbon-based gas is a C _x H _y- based gas Pattern formation method of a semiconductor device. The method of claim 3, The florin-based gas is HF or NF ₃ gas Pattern formation method of a semiconductor device. The method according to claim 2 or 3, The hard mask forming step, Which is carried out further comprising N ₂ gas Pattern formation method of a semiconductor device. The method according to claim 2 or 3, The hard mask forming step, SiH ₄ gas flow at a pressure of 1.0 Torr or less and a temperature of 400 degrees or more is carried out under the conditions in the range of 500-200 sccm Pattern formation method of a semiconductor device. The method of claim 6, The hard mask forming step, SiH ₄ gas flow rate 500 ~ 200sccm, N ₂ gas flow rate 50 ~ 300sccm at pressure below 1.0Torr and above 400 degree Pattern formation method of a semiconductor device. The method of claim 1, The hard mask forming step, Forming a polysilicon film on the etched layer; And Plasma treating the surface of the polysilicon film using a carbon-based gas Pattern formation method of a semiconductor device. The method of claim 1, The hard mask forming step, Forming a polysilicon film on the etched layer; And Plasma treating the surface of the polysilicon film using a florin-based gas Pattern formation method of a semiconductor device. The method of claim 1, The hard mask forming step, Forming a polysilicon film on the etched layer; And Plasma treating the surface of the polysilicon film using a fluorocarbon gas Pattern formation method of a semiconductor device. The method of claim 9, The carbon-based gas is a C _x H _y- based gas Pattern formation method of a semiconductor device. The method of claim 10, The florin-based gas is HF gas Pattern formation method of a semiconductor device. The method of claim 11, The fluorocarbon gas is C _x H _x F _y system Gas Inn Pattern formation method of a semiconductor device. The method according to any one of claims 9 to 11, The plasma treatment step, Under the conditions of applying more than 1000W of power Pattern formation method of a semiconductor device.

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