KR20070113673A - Liquid crystal display device and driving method thereof - Google Patents

Abstract

The present invention is to improve the poor image quality that can appear in the liquid crystal display device having a striped structure in the vertical direction, the liquid crystal panel having a plurality of pixels, disposed on both sides of the liquid crystal panel, respectively, the first and second gate line group First and second gate drivers to drive the data drivers to drive the data lines, and a timing controller to control the driving timing, wherein pixels adjacent in the horizontal direction among the plurality of pixels form one horizontal line, and N (N When any color pixel is connected to the first gate line group in the (n) second horizontal line, the liquid crystal display device and the driving method thereof are configured such that the color pixel is connected to the second gate line group in the N + 2th horizontal line. to provide.

Description

Liquid crystal display and method for driving the same {Liquid crystal display and method for driving the same}

1 is a configuration diagram briefly illustrating a liquid crystal display according to the related art.

2 is a schematic diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

3 to 5 are configuration diagrams of a liquid crystal display according to another exemplary embodiment of the present invention.

6 is a flowchart illustrating a method of driving a liquid crystal display according to an exemplary embodiment of the present invention.

7 is a waveform diagram illustrating scan pulses driving the liquid crystal display according to the exemplary embodiment of the present invention.

8 to 11 are reference diagrams for describing some of the steps of FIG. 6.

(Explanation of symbols for the main parts of the drawing)

200: liquid crystal panel 220: first gate driver

230: second gate driver 240: data driver

250: timing controller GL1, GL2, GL3,... Gate line

DL1, DL2, DL3,... Data lines HL1, HL2, HL3,... : Horizontal line

The present invention relates to a liquid crystal display device and a driving method thereof, and more particularly, to a liquid crystal display device having a stripe structure in the vertical direction and a driving method thereof.

The liquid crystal display device forms a liquid crystal layer having anisotropic dielectric constant between the color filter substrate, which is the upper and lower transparent insulating substrates, and the array substrate, and then adjusts the intensity of the electric field formed in the liquid crystal layer to change the molecular arrangement of the liquid crystal material. The display device expresses a desired image by adjusting the amount of light transmitted through the color filter substrate. As the liquid crystal display, a thin film transistor liquid crystal display (TFT LCD) using a thin film transistor (TFT) as a switching element is mainly used.

1 is a configuration diagram briefly illustrating a liquid crystal display according to the related art.

Referring to FIG. 1, the liquid crystal display according to the related art includes a liquid crystal panel 100, gate drivers 121 and 131, and a source driver 141, and includes gate lines GL1, GL2, and the gate lines of the liquid crystal panel 100. A timing controller 150 for controlling driving timings of the first and second gate drivers 120 and 130 and the data driver 140 driving the GL3, ..., and the data lines DL1, DL2, DL3, ..., respectively. And the like.

In the liquid crystal panel 100, the gate lines GL1, GL2, GL3,..., Which form a row, and the data lines that intersect the gate lines GL1, GL2, GL3,..., Which form a column. (DL1, DL2, DL3, ...) are arranged in a matrix type.

The region is divided by the gate lines GL1, GL2, GL3, ... and the data lines DL1, DL2, DL3, ... which are arranged in the vertical direction along the data lines DL1, DL2, DL3, ... and cross each other. The red, green, and blue color pixels R, G, and B form one pixel, and a plurality of pixels adjacent in the horizontal direction form one horizontal line HL1, HL2, HL3, ..., and the horizontal line The fields HL1, HL2, HL3, ... come together to form one frame (screen).

When scan pulses are sequentially applied to the gate lines GL1, GL2, GL3,..., The data voltages are applied to the data lines DL1, DL2, DL3,... In response to the scan pulses, on the liquid crystal panel 100. One frame is displayed.

The liquid crystal display of such a structure has a merit in that the number of data lines is reduced to one third and the structure is simplified compared to the stripe structure in which the red, green, and blue color pixels forming one pixel are formed in the horizontal direction along the gate line. There is this.

When the number of data lines is reduced to 1/3, the number of gate lines must be tripled. Therefore, the overall structure is simplified by applying a gate in panel (GIP) method in which the gate driver is embedded on the liquid crystal panel. It is advantageous.

In this case, as shown in FIG. 1, the gate lines GL1, GL2, GL3,..., Three times as many as the stripe structure in the horizontal direction are disposed in the first gate driver 120 and the second gate driver 130 on both sides of the liquid crystal panel 100. When the interlacing structure is alternately connected to the first and second gate drivers 120 and 130, the color pixels and gate lines GL1, GL2, GL3, Due to the connection structure with…), there is a high possibility that the luminance difference occurs in the three color pixels R, G, and B that share the data lines DL1, DL2, DL3,...

Particularly, in the case of green, the green color pixel G is connected to only one side of the first and second gate drivers 120 and 130 on the left and right sides, and thus, the green color pixel G does not compensate for the output deviation that appears in the left and right sides. In this case, there is a problem in that the balance of the red, green, and blue colors is broken in a specific pattern, resulting in a different color, resulting in a worse image quality.

For example, when gray and black patterns are sequentially displayed in units of horizontal lines HL1, HL2, HL3, ... in one pixel of FIG. 1, the first horizontal line HL1 and the third horizontal line ( The red and blue color pixels R and B of the HL3 are connected only to the first gate driver 120 disposed on the left side of the liquid crystal panel 100 and the second gate driver 130 on the opposite side to the green color pixel G. ) Only.

At this time, when the gate driver 121 constituting the first gate driver 120 on the left side and the gate driver 131 constituting the second gate driver 130 on the right side have a certain amount of output deviation, gray is obtained. In the first and third horizontal lines HL1 and HL3 to be displayed, the red and blue color pixels R and B are all connected to the first gate driver 120, and the green color pixels G are all the second gate driver. It is configured to be connected to (130), there was a lot of concerns that a poor image quality, such as Greenish (Greenish).

Therefore, the technical problem to be achieved by the present invention is to change the connection structure of the gate driver and the color pixels formed on both sides of the liquid crystal panel, even if the output deviation occurs in both gate driver, the liquid crystal to compensate for this spatially so as not to appear as a poor image quality It is to provide a display device.

Another object of the present invention is to provide a method of driving a liquid crystal display device capable of efficiently driving such a liquid crystal display device.

Technical problems to be achieved by the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned above will be clearly understood by those skilled in the art from the following description. Could be.

In the liquid crystal display according to the exemplary embodiment of the present invention, data lines vertically intersecting with the first and second gate line groups in the horizontal direction and the first and second gate line groups are formed. A liquid crystal panel including a plurality of pixels composed of red, green, and blue color pixels in a vertical direction, a first gate driver disposed on one side of the liquid crystal panel to drive the first gate line group, and an opposite side of the liquid crystal panel A plurality of pixels disposed in the second gate driver to drive the second gate line group, a data driver to drive the data lines, and a timing controller to control driving timing of the data driver and the gate driver; Horizontally adjacent pixels form one horizontal line, and the N (N is a natural number) random line If the color pixel being connected to the first gate line group, the (N + 2) th horizontal line it is characterized in that the random color pixels is configured to be connected to the second gate line group.

According to an exemplary embodiment of the present invention, a driving method of a liquid crystal display includes supplying red, green, and blue pixel data, a gate control signal and a data control signal for controlling driving timing, and responding to the gate control signal. Supplying first and second scan pulses to horizontal gate lines from both sides of the liquid crystal panel, and corresponding to the pixel data with vertical data lines formed in the liquid crystal panel in response to the data control signal. And a red, green, and blue color pixel in a vertical direction according to the step of supplying a data voltage, the first and second scan pulses supplied to the gate lines, and the data voltages supplied to the data lines. And displaying an image on each pixel of the liquid crystal panel, and corresponding to adjacent pixels in a horizontal direction. For the flat line, if the first scan pulse is applied to any color pixel in an N (N is a natural number) horizontal line, the second scan pulse is applied to the arbitrary color pixel in an N + 2th horizontal line. It is characterized by.

Specific details of other embodiments are included in the detailed description and the drawings. Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. Like reference numerals refer to like elements throughout.

Hereinafter, a liquid crystal display and a driving method thereof according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2 is a schematic diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

2, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel 200, a first gate driver 220, a second gate driver 230, a data driver 240, and a timing controller 250. ), And the like.

The liquid crystal panel 200 includes two transparent insulating substrates facing each other and a liquid crystal layer formed therebetween, and includes a plurality of pixels having red, green, and blue color pixels R, G, and B.

On the lower transparent insulating substrate, the horizontal gate lines GL1, GL2, GL3,... And the vertical data lines DL1, DL2, DL3,... , G, B), and the color pixel R through the switching operation at the intersection of the gate lines GL1, GL2, GL3, ... and the data lines DL1, DL2, DL3, ... , Thin film transistors for driving G, B) are respectively formed.

The red, green, and blue color pixels R, G, and B forming one pixel are formed in the vertical direction along the data lines DL1, DL2, DL3, ... to form a vertical stripe structure. This structure reduces the number of data lines DL1, DL2, DL3,... To one third compared to the horizontal stripe structure, and triples the number of gate lines GL1, GL2, GL3,... Since it is increased, it is preferable to employ a gate-in panel structure in which the first and second gate drivers 220 and 230 are embedded on the liquid crystal panel 200 to simplify the driving circuit.

Here, the gate lines GL1, GL2, GL3,... On the liquid crystal panel 200 are connected to the first gate line group connected to the first gate driver 220 on one side and the second gate driver 230 on the opposite side. It can be classified into a second gate line group.

In the case of Fig. 2, the first gate line group includes the first, fourth, fifth, eighth, ninth, and twelfth gate lines GL1, GL4, GL5, GL8, GL9, GL12, and the like. As the line group, the second, third, sixth, seventh, tenth, and eleventh gate lines (GL2, GL3, GL6, GL7, GL10, GL11) and the like are formed, respectively.

Although not shown, the thin film transistor disposed at the intersection of the data lines DL1, DL2, DL3, ... and the gate lines GL1, GL2, GL3, ... may include a gate electrode, an active layer, a source electrode, It is formed to have a data electrode.

The thin film transistors convert the data voltages on the data lines DL1, DL2, DL3,... In response to the scan pulses applied from the gate lines GL1, GL2, GL3,... ) Will be supplied. For this operation, the gate electrode of the thin film transistor is connected to the gate lines GL1, GL2, GL3, ..., the source electrode is connected to the data lines DL1, DL2, DL3, ..., and the drain electrode is It is configured to be connected to the pixel electrodes of the color pixels R, G, and B.

The first gate driver 220 and the second gate driver 230 are formed on both left and right sides of the liquid crystal panel 200 to drive the first gate line group and the second gate line group, respectively, and the timing controller 250. The thin film transistors formed in the respective color pixels R, G, and B are sequentially switched by supplying scan pulses sequentially to the gate lines GL1, GL2, GL3, ... of the liquid crystal panel 200 under the control of.

Each of the first and second gate drivers 220 and 230 includes a plurality of gate drivers 221 and 231, respectively, a shift register sequentially generating scan pulses, and a voltage of the scan pulses of the color pixels R and G. And a level shifter for shifting to a level suitable for driving of B).

The data driver 240 includes a plurality of source drivers 241, and the data lines DL1, DL2, DL3,... Of the liquid crystal panel 200 with the thin film transistor turned on under the control of the timing controller 250. Supply the data voltage.

More specifically, the source driver 241 constituting the data driver 240 may include a shift register for sampling the clock CLK, a register for temporarily storing red, green, and blue pixel data, and a clock from the shift register. A latch for storing the pixel data line by line in response to the signal, and simultaneously outputting the stored pixel data for each line line, and a digital for selecting the positive / negative gamma voltage corresponding to the digital data value from the latch. Analog converter, multiplexer, multiplexer and data lines (DL1, DL2) for selecting data lines (DL1, DL2, DL3, ...) to which data voltages converted by positive / negative gamma voltages are supplied , DL3, ...) is connected to the output buffer and the like.

The timing controller 250 rearranges the red, green, and blue pixel data input from the outside and transmits the pixel data to the data driver 240, generates a gate control signal and a data control signal, and generates the first and second gate drivers 220,. 230 and the driving timing of the data driver 240.

The red, green, and blue pixel data rearranged by the timing controller 250 are stored for each of red, green, and blue data in the line memory 251 formed in the timing controller 250. Each red, green, and blue data stored in each line memory 251 is input to the data driver 240.

In addition, the timing controller 250 may include a gate control signal and a data driver 240 for controlling the first and second gate drivers 220 and 230 using the vertical / horizontal synchronization signals Vsync and Hsync and the clock CLK. To generate a data control signal for controlling.

The gate control signal includes a gate start pulse (GSP), a gate shift clock (GSC), a gate output enable (GOE) signal, and the data control signal includes a source. A source pulse (SSP), a source shift clock (SSC), a source output enable (SOE), a polarity signal (POL), and the like are included.

In such a liquid crystal display, pixels adjacent in the horizontal direction among the plurality of pixels form one horizontal line (HL1, HL2, HL3, ...), and any color pixel is formed in the N (N is a natural number) horizontal line. When connected to the first gate line group, the color pixel is configured to be connected to the second gate line group in the N + 2th horizontal line.

For example, as illustrated in FIG. 2, in the first horizontal line HL1, the red color pixel R is connected to the first gate line GL1 belonging to the first gate line group, and the green and blue color pixels are connected. (G, B) are connected to the second and third gate lines GL2 and GL3 respectively belonging to the second gate line group.

On the other hand, in the third horizontal line HL3, the red color pixel R is connected to the seventh gate line GL7 belonging to the second gate line group, and the green and blue color pixels G and B are connected to the first. The eighth and ninth gate lines GL8 and GL9 belong to the gate line group, respectively.

At this time, the structure in which the color pixels R, G, and B of the Nth horizontal line and the first and second gate line groups are connected, is based on the horizontal direction, and the color pixels of the N + 1th horizontal line ( R, G, and B) are configured to be symmetrical with the structure connected to the first and second gate line groups.

For example, the connection structure of the color pixels R, G, and B of the second horizontal line HL2 and the gate lines GL4, GL5, and GL6 is connected to the first horizontal line HL1. When the color pixels R, G, and B of the first horizontal line HL1 are connected to the first, second, and second gate line groups, respectively, so as to be symmetrical with each other, the color pixels of the second horizontal line HL2. (R, G, B) are formed so as to be connected to the first, first and second gate line groups, respectively.

If the same connection structure is repeated between the color pixels and the gate lines in two adjacent horizontal lines, deterioration in image quality such as crosstalk may occur, so this connection structure is to be avoided.

3 to 5 are configuration diagrams of a liquid crystal display according to another exemplary embodiment of the present invention.

In FIG. 2, when N = 1, the red color pixel R of the Nth horizontal line is connected to the first gate line GL1 that is the first gate line group, and the green and blue color pixels G of the Nth horizontal line are connected. And B) are configured to be connected to second and third gate lines GL2 and GL3 which are second gate line groups.

In this case, in the N + 2th horizontal line, the red color pixel R is connected to the seventh gate line GL7 which is the second gate line group, and the green and blue color pixels G and B are the first gate line group. It is configured to be connected to the eighth and ninth gate lines GL8 and GL9.

As such, in the Nth, N + 1st, and N + 2th horizontal lines, specific color pixels R, G, and B are connected only to the first gate driver 220 or only to the second gate driver 230. By avoiding the structure, the color pixels R, G, B and the gate lines GL1, GL2, GL3,... Even if a certain amount of output deviation occurs in the first and second gate drivers 220, 230. Through the connection structure of the output deviation can be compensated spatially.

3 to 5 illustrate liquid crystal display devices according to another exemplary embodiment of the present invention, which can satisfy these conditions.

Referring to FIG. 3, when N = 1, the red and green color pixels G of the N-th horizontal line are connected to the first and second (GL1, GL2), which are the first gate line group, and the blue of the N-th horizontal line. The color pixel B is configured to be connected to the third gate line GL3 which is the second gate line group.

On the other hand, the red and green color pixels G of the N + 2th horizontal line are connected to the 7, 8th (GL7, GL8) which are the second gate line group, and the blue color pixels B of the N + 2th horizontal line are connected. It is comprised so that it may be connected to the 9th gate line GL9 which is a 1st gate line group.

Referring to FIG. 4, when N = 1, the red color pixel R of the Nth horizontal line is connected to the first gate line GL1, which is the second gate line group, and the green and blue color pixels of the Nth horizontal line. It is comprised so that (G, B) may be connected to the 2nd, 3rd gate lines GL6 and GL7 which are 1st gate line groups.

On the other hand, the red color pixel R of the N + 2th horizontal line is connected to the seventh gate line GL7 of the first gate line group, and the green and blue color pixels G and B of the N + 2th horizontal line are connected. It is comprised so that it may be connected to the 8th, 9th gate lines GL8 and GL9 which are 2nd gate line groups.

Referring to FIG. 5, when N = 1, the red and green color pixels R and G of the Nth horizontal line are connected to the first and second gate lines GL1 and GL2 that are the second gate line group, and N +. The blue color pixel B of the second horizontal line is connected to the third gate line GL3 which is the first gate line group.

On the other hand, the red and green color pixels R and G of the N + 2th horizontal line are connected to the 7, 8th gate lines GL7 and GL8 which are the first gate line group, and the blue color pixels of the N + 2th horizontal line. (B) is configured to be connected to the ninth gate line GL9 which is the second gate line group.

The red and green color pixels R and G of the N-th horizontal line are connected to the second gate line group, and the blue color pixel B of the N-th horizontal line is connected to the first gate line group.

6 is a flowchart illustrating a method of driving a liquid crystal display according to an exemplary embodiment of the present invention.

6 is a flowchart illustrating a method of driving a liquid crystal display according to an exemplary embodiment of the present invention, and illustrates a driving method commonly applied to the liquid crystal display of FIGS. 2 to 5.

First, in step S200, the timing controller 250 rearranges the red, green, and blue pixel data and transmits the data to the data driver 240, and generates a gate control signal and a data control signal for controlling the driving timing. The first and second gate drivers 220 and 230 and the data driver 240 are respectively supplied.

Next, in operation S210, the first gate driver 220 and the second gate driver 230 may move the gate lines GL1, GL2, GL3,... In the horizontal direction from both sides of the liquid crystal panel 200 in response to the gate control signal. ) Supplies the first and second scan pulses.

Here, the first scan pulse is a signal supplied from the first gate driver 220 disposed on one side of the liquid crystal panel 200 to the first gate line group, and the second scan pulse is disposed on the opposite side of the liquid crystal panel 200. The signal is supplied from the second gate driver 230 to the second gate line group.

At this time, when a first scan pulse is applied to an arbitrary color pixel in the N (N is a natural number) horizontal line with respect to the horizontal line corresponding to the pixels adjacent in the horizontal direction, the N + 2th horizontal line corresponds to the corresponding color pixel. Allow a second scan pulse to be applied.

The first and second scan pulses are applied to the color pixels R, G, and B of the Nth horizontal line, and the color pixels R, G, and B of the N + 1th horizontal line are applied. The order in which the first and second scan pulses are applied is preferably such that they are symmetrical to each other.

Next, in step S220, the data driver 240 is connected to the data lines DL1, DL2, DL3,... In the vertical direction formed in the liquid crystal panel 200 in response to the data control signal from the timing controller 250. Data voltages corresponding to the green and blue pixel data are supplied.

Next, in step S230, the first and second scan pulses supplied from the first and second gate drivers 220 and 230 to the gate lines GL1, GL2, GL3,..., And the data lines DL1, DL2, An image is displayed on each pixel of the liquid crystal panel 200 in accordance with the data voltage supplied to DL3, ...).

7 is a waveform diagram illustrating an example of a scan pulse driving a liquid crystal display according to an exemplary embodiment of the present invention.

7 illustrates a waveform diagram of a liquid crystal display according to embodiments of the present disclosure, assuming that the first to fourth clock signals CLK1, CLK2, CLK3, and CLK4 that are sequentially shifted are used as first and second scan pulses. It is for explaining the driving method of the display device more easily.

Hereinafter, the driving method of the present invention will be described on the assumption that the first to fourth clock signals CLK1, CLK2, CLK3, and CLK4 are used as the first scan pulse or the second scan pulse.

8 to 11 are reference diagrams for describing some of the steps of FIG. 6 and illustrate driving methods corresponding to the liquid crystal display devices of FIGS. 2 to 5.

Hereinafter, for convenience of explanation, a structure in which each of the color pixels R, G, and B are connected to the first gate line group disposed on one side of the liquid crystal panel 200 may be arranged on the opposite side of the liquid crystal panel 200. The structure connected to the second gate line group will be referred to as "R".

For example, in FIG. 8, when comparing the first horizontal line HL1 and the third horizontal line HL3, the red, green, and blue color pixels R, G, and B of the first horizontal line HL1 may be viewed. The L, R, and R structures are formed, and the red, green, and blue color pixels R, G, and B of the third horizontal line HL3 are formed of the R, L, and L structures.

That is, referring to the case of FIG. 8, when the red, green, and blue color pixels R, G, and B of the first horizontal line HL1 have L, R, and R structures, the third horizontal line HL3 may have a structure. Red, green, and blue color pixels R, G, and B are formed in R, L, and L structures.

In addition, even in adjacent adjacent first and second horizontal lines HL1 and HL2, the second horizontal line HL2 is symmetrical to the L, R, and R structures in order to minimize image degradation due to repetition of the same connection structure. , Formed into an R structure.

8, when N = 1, the first scan pulse is applied to the red color pixel R of the Nth horizontal line, and is applied to the green and blue color pixels G and B of the Nth horizontal line. The second scan pulse is applied.

When the first to fourth clock signals CLK1, CLK2, CLK3, and CLK4 are applied as scan pulses, the scan pulses are sequentially shifted from the first gate line GL1, so that the first clock signal CLK1 and the fourth clock signal are sequentially shifted. The clock signal CLK4 becomes a first scan pulse supplied from the first gate line group, and the second scan pulse from which the second clock signal CLK2 and the third clock signal CLK3 are supplied from the second gate line group do.

That is, the first and fourth gate lines GL1 and GL4 are formed of a first gate line group connected to the first gate driver 220, and the second and third gate lines GL2 and GL3 are second gates. The second gate line group is connected to the driver 230.

In addition, the timing controller 250 controls the first gate driver 220 and the second gate driver 230 to sequentially shift the first to fourth clock signals CLK1, CLK2, CLK3, and CLK4. The fourth gate lines GL1, GL2, GL3, and GL4 are sequentially applied.

Referring to FIG. 9, when N = 1, a first scan pulse is applied to the red and green color pixels R and G of the Nth horizontal line and a second is applied to the blue color pixel B of the Nth horizontal line. Scan pulses are applied.

Referring to FIG. 10, when N = 1, a second scan pulse is applied to the red color pixel R of the Nth horizontal line, and the first scan pulse is applied to the green and blue color pixels G and B of the Nth horizontal line. Scan pulses are applied.

Referring to FIG. 11, when N = 1, a second scan pulse is applied to the red and green color pixels R and G of the Nth horizontal line and the first color is applied to the blue color pixel B of the Nth horizontal line. Scan pulses are applied.

As described above, in the case of the liquid crystal display device having the vertical stripe structure, the output variation of the gate driver may appear as a bad image quality depending on the connection state of the gate driver and the color pixels. In addition, it is possible to efficiently drive the liquid crystal display of the improved structure to prevent poor image quality.

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that.

Therefore, since the embodiments described above are provided to completely inform the scope of the invention to those skilled in the art, it should be understood that they are exemplary in all respects and not limited. The invention is only defined by the scope of the claims.

According to the exemplary embodiment of the present invention, the liquid crystal display according to the exemplary embodiment of the present invention changes the connection structure between the gate driver and the color pixels formed on both sides of the liquid crystal panel, thereby spatially compensating even if an output deviation occurs in both gate drivers. The poor image quality can be improved.

The driving method of the liquid crystal display according to the preferred embodiment of the present invention can efficiently drive such a liquid crystal display.

Claims (14)

A liquid crystal including a plurality of pixels including first and second gate line groups in a horizontal direction and data lines perpendicular to the first and second gate line groups, and including red, green, and blue color pixels in a vertical direction. panel; A first gate driver disposed on one side of the liquid crystal panel to drive the first gate line group; A second gate driver disposed on an opposite side of the liquid crystal panel to drive the second gate line group; A data driver driving the data lines; And A timing controller controlling driving timing of the data driver and the gate driver; Pixels adjacent in the horizontal direction among the plurality of pixels form one horizontal line, and when an arbitrary color pixel is connected to the first gate line group in an N (N is a natural number) horizontal line, an N + 2th horizontal line Wherein the arbitrary color pixels are connected to the second gate line group. The method of claim 1, In the structure in which the color pixels of the Nth horizontal line and the first and second gate line groups are connected, the color pixels of the N + 1th horizontal line are connected to the first and second gate line groups based on a horizontal direction. The liquid crystal display device, characterized in that configured to be symmetrical to the connected structure. The method of claim 1, And a red color pixel of the Nth horizontal line is connected to the first gate line group, and a green and blue color pixel of the Nth horizontal line is connected to the second gate line group. . The method of claim 1, And the red and green color pixels of the Nth horizontal line are connected to the first gate line group, and the blue color pixels of the Nth horizontal line are connected to the second gate line group. . The method of claim 1, And the red color pixel of the Nth horizontal line is connected to the second gate line group, and the green and blue color pixels of the Nth horizontal line are connected to the first gate line group. . The method of claim 1, And the red and green color pixels of the Nth horizontal line are connected to the second gate line group, and the blue color pixels of the Nth horizontal line are connected to the first gate line group. . The method of claim 1, And at least one line memory configured to temporarily store red, green, and blue pixel data supplied to the data driver. Supplying red, green, and blue pixel data, a gate control signal and a data control signal for controlling driving timing; Supplying first and second scan pulses to horizontal gate lines from both sides of a liquid crystal panel in response to the gate control signal; Supplying a data voltage corresponding to the pixel data to vertical data lines formed in the liquid crystal panel in response to the data control signal; And An image is displayed on each pixel of the liquid crystal panel including the first and second scan pulses supplied to the gate lines and the red, green, and blue color pixels in a vertical direction according to the data voltages supplied to the data lines. Includes the steps shown, For the horizontal line corresponding to pixels adjacent in the horizontal direction, if the first scan pulse is applied to any color pixel in the N (N is a natural number) horizontal line, the arbitrary color pixel in the N + 2th horizontal line And the second scan pulse is applied to the liquid crystal display. The method of claim 8, The order in which the first and second scan pulses are applied to the color pixels of the Nth horizontal line and the order in which the first and the second scan pulses are applied to the color pixels of the N + 1th horizontal line are symmetric with each other. A method of driving a liquid crystal display device, characterized in that. The method of claim 8, And the first scan pulse is applied to the red color pixels of the Nth horizontal line, and the second scan pulse is applied to the green and blue color pixels of the Nth horizontal line. The method of claim 8, And the first scan pulse is applied to the red and green color pixels of the Nth horizontal line, and the second scan pulse is applied to the blue color pixels of the Nth horizontal line. The method of claim 8, And the second scan pulse is applied to the red color pixels of the Nth horizontal line, and the first scan pulse is applied to the green and blue color pixels of the Nth horizontal line. The method of claim 8, And the second scan pulse is applied to the red and green color pixels of the Nth horizontal line, and the first scan pulse is applied to the blue color pixels of the Nth horizontal line. The method of claim 8, And the first and second scan pulses are any one of first to fourth clock signals sequentially shifted.

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