KR20070071341A - LCD and its test method - Google Patents

Abstract

The present invention relates to a liquid crystal display device having a test point for testing gate and data driving signals in a COG type liquid crystal display device and a test method thereof.

To this end, the present invention is a liquid crystal panel having a gate line and a data line, a plurality of input terminals mounted in the form of a chip-on-glass on the liquid crystal panel, the image signal, a control signal and a power signal are input and the gate of the liquid crystal panel A liquid crystal display having a plurality of output terminals for outputting gate and data driving signals to lines and data lines, the panel driving circuit unit having a dummy bump connected to at least one output terminal, and a test point connected to the dummy bump; It provides a test method for this.

Description

Liquid crystal display and test method thereof {LIQUID CRYSTAL DISPLAY DEVICE AND TEST METHOD THEREOF}

1 is a view schematically showing a conventional liquid crystal display device.

2 is a schematic view of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 3 is an enlarged view of the panel driving circuit unit shown in FIG. 2.

4 is a flowchart sequentially illustrating a test method of a liquid crystal display according to an exemplary embodiment of the present invention.

<Brief Description of Drawings>

100: liquid crystal panel 110: thin film transistor substrate

120: color filter substrate 130: panel driving circuit unit

131: terminal connection line 140: output terminal

150: input stage 160: dummy bump

170: timing controller 180: power supply

200: test point 210: connection line

250: flexible printed circuit

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having a test point for testing gate and data driving signals in a COG type liquid crystal display device and a test method thereof.

Conventional liquid crystal display devices display an image by adjusting the light transmittance of a liquid crystal having dielectric anisotropy using an electric field. To this end, the liquid crystal display includes a liquid crystal display panel in which liquid crystal cells are arranged in a matrix and a driving circuit for driving the liquid crystal display panel.

In a liquid crystal display panel, liquid crystal cells display an image by adjusting light transmittance according to a pixel signal.

1 is a view schematically showing a conventional liquid crystal display device.

Referring to FIG. 1, a liquid crystal display device includes a liquid crystal panel 10, a panel driver circuit unit 20 driving the liquid crystal panel 10, a power supply unit and a timing controller for supplying a driving circuit power signal and a control signal, and a power supply unit. And a flexible printed circuit 30 mounted with the timing controller and connected to the liquid crystal panel.

Specifically, the liquid crystal panel 10 includes a color filter substrate 12 and a thin film transistor substrate 11 bonded together with a liquid crystal interposed therebetween. The liquid crystal panel 10 includes a plurality of liquid crystal cells Clc arranged in a matrix at the intersection of the data line DL and the gate line GL. The thin film transistor TFT formed in each of the liquid crystal cells Clc charges the liquid crystal cell Clc with an image signal supplied from the data line DL in response to a scan signal supplied from the gate line GL. The liquid crystal cell Clc drives a liquid crystal having dielectric anisotropy according to a charged image signal to adjust light transmittance.

The panel driving circuit unit 20 includes a gate driving chip and a data driving chip mounted on the thin film transistor substrate 11 by a chip on glass (COG) method. The gate driving chip supplies a scan signal to the gate line GL, and the data driving chip supplies an image signal to the data line DL.

The timing controller generates red, green, and blue digital video data and control signals input from the outside and supplies them to the panel driver circuit unit 20.

The power supply unit supplies a power signal to the panel driving circuit unit 20 and the timing controller.

When the data signal, the control signal, and the power signal input from the timing controller and the power unit are supplied to the panel driver circuit unit 20, the panel driver circuit unit 20 supplies the gate-on voltage supplied to the gate line GL of the liquid crystal panel 10. Von) and a gate-off voltage Voff are generated and sequentially supplied to the gate line GL, and an image signal is supplied to the data line in response to the scan signal supplied to the gate line GL. At this time, the data signal supplied to the liquid crystal panel is tested by the panel driver circuit.

However, in order to measure the pattern of the data signal and the level of the data signal, the space is narrow, so that the liquid crystal panel is partially damaged and the data signal needs to be tested. In addition, the gate line and the data line supplied from the panel driver circuit unit to the liquid crystal panel are formed adjacent to each other, so that it is difficult to test the data signal output from the data line, and the reliability of the measured value is inferior.

Accordingly, an object of the present invention is to provide a liquid crystal display device and a test method thereof having a test point formed on a FPC for testing gate and data driving signals in a COG type liquid crystal display device.

In order to achieve the above object, the present invention provides a liquid crystal panel in which a gate line and a data line are formed, a plurality of input terminals mounted in chip-on-glass form on the liquid crystal panel, and receiving image signals, control signals, and power signals. A plurality of output stages for outputting gate and data driving signals to gate lines and data lines of the liquid crystal panel, the panel driving circuit unit having a dummy bump connected to at least one output terminal, and a test point connected to the dummy bumps Provided is a liquid crystal display device.

A flexible printed circuit connected to the liquid crystal panel is further provided.

The test point is characterized in that formed on the flexible printed circuit.

The dummy bump may be connected to any one of the output terminals through the inside of the panel driving circuit unit.

The flexible printed circuit may further include a timing controller for supplying a data signal and a control signal to the panel driver circuit and a power supply unit for supplying a power signal to the panel driver circuit and the timing controller.

It characterized in that it further comprises a connection line for connecting the test point and the dummy bump.

The test point may be connected to an output terminal through which the gate driving signal of the panel driving circuit is output, via the dummy bump and the connection line.

The test point is connected to an output terminal through which the data driving signal of the panel driving circuit is output, via the dummy bump and the connection line.

In order to achieve the above object, supplying an image signal, a control signal and a power signal to the panel driving circuit unit, connecting a probe of the measurement equipment to the test point, the gate driving signal generated from the panel driving circuit unit Or it provides a test method of the liquid crystal display device comprising the step of detecting at least one signal of the data driving signal.

Other features of the present invention will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, specific embodiments of the present invention will be described with reference to FIGS. 2 to 4.

FIG. 2 is a schematic view of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 3 is an enlarged view of the panel driving circuit unit shown in FIG. 2.

2 and 3, the liquid crystal display of the present invention is mounted on the liquid crystal panel 100 having the gate line GL and the data line DL, and chip-on-glass on the liquid crystal panel 100. A plurality of input terminals 150 through which image signals, control signals, and power signals are input, and a plurality of output terminals 140 outputting gate and data driving signals to gate lines GL and data lines DL of the liquid crystal panel 100. And a panel driving circuit unit 130 having a dummy bump 160 connected to at least one output terminal 140, and a test point 200 connected to the dummy bump 160.

The flexible printed circuit 250 on which the timing controller 170 and the power supply unit 180 are mounted is connected to the liquid crystal panel 100.

Specifically, the liquid crystal panel 100 includes a color filter substrate 120 and a thin film transistor substrate 110 bonded together with a liquid crystal interposed therebetween. The liquid crystal panel 100 includes a plurality of liquid crystal cells Clc arranged in a matrix at the intersection of the data line DL and the gate line GL. The thin film transistor TFT formed in each of the liquid crystal cells Clc charges the liquid crystal cell Clc with an image signal supplied from the data line DL in response to a scan signal supplied from the gate line GL. The liquid crystal cell Clc drives a liquid crystal having dielectric anisotropy according to a charged image signal to adjust light transmittance.

The panel driving circuit unit 130 includes a gate driving chip and a data driving chip mounted on the thin film transistor substrate 110 by a chip on glass (COG) method. The gate driving chip sequentially supplies a gate on voltage and a gate off voltage to the gate line GL, and the data driving chip supplies an image signal to the data line DL.

As shown in FIG. 3, the panel driving circuit unit 130 is provided with a plurality of input terminals 150 and a plurality of output terminals 140 so that image signals, control signals, and power signals are input through the input terminals 150, and output terminals. The gate driving signals of the gate-on voltage Von and the gate-off voltage Voff are sequentially supplied to the gate line GL and the data line DL through the 140, and the image data voltage is supplied to the data line DL. Supply. The input terminal 150 and the output terminal 140 are formed fine pitch. In this case, the panel driving circuit unit 130 includes at least one dummy bump 160. The dummy bump is connected to the output terminal 140 in the panel driving circuit unit 130. In other words, the output terminal 140 and the dummy bumps 160 correspond one-to-one, and are connected through the terminal connection line 131 in the panel driving circuit unit 130, and at least one dummy bump 160 is formed. .

In the flexible printed circuit 250, a timing controller 170 and a power supply unit 180 are mounted. In addition, a test point 200 is connected to a dummy bump 160 in a predetermined region of the flexible printed circuit 250 to detect a gate driving signal or a data driving signal. In addition, a connection line 210 is further formed to connect the dummy bump 160 and the test point 200 formed in the panel driving circuit unit.

The timing controller 170 includes red, green, and blue digital video data inputted from the outside, a clock signal CK, a signal for selecting a next gate line (CPV), a gate start pulse (GPS), and an output control signal ( A control signal for controlling the panel driver circuit unit 130 such as OE) is generated and supplied to the panel driver circuit unit 130 through signal lines connected to a plurality of input terminals.

The power supply unit 180 supplies the digital driving voltage VDD and the analog driving voltage AVDD to the panel driving circuit unit 130, and supplies the digital driving voltage VDD to the timing controller 170.

The test point 200 is connected to the dummy bump 160 formed in the panel driving circuit unit 130 described above through the connection line 210. The test point 200 is formed to have a predetermined area and is exposed to the outside and the probe of the tester or measuring equipment is in contact. The connection line 210 is preferably formed so as not to overlap a plurality of signal lines formed on the flexible printed circuit 250.

The flexible printed circuit 250 is connected to the liquid crystal panel 100 by an anisotropic conductive film (ACF).

For example, the dummy bump 160 connected to any one of the output terminals 140 of the data driving signal is connected to the test point 200 formed on the flexible printed circuit 250 through the connection line 210. The test point 200 connects a probe of a tester or measuring equipment to detect a data driving signal. Signal characteristics such as waveforms and voltage levels of the data driving signals are measured. The waveform of the data drive signal generally represents a rectangular waveform alternately around a common voltage. At this time, the operation characteristics of the panel driving circuit unit are tested by measuring whether the signal waveform is distorted and the timing of alternating peak levels around the common voltage.

Similarly, the gate drive signal can be measured through the measurement equipment at the test point connected to the output terminal of the gate drive signal. The peak voltage and the voltage waveform of the gate-on voltage while the gate-on voltage is supplied among the gate driving signals may be measured to test the operation characteristics of the panel driver circuit 130 through the characteristics of the gate driving signal.

4 is a flowchart sequentially illustrating a test method of a liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 4, a test method of a liquid crystal display according to an exemplary embodiment of the present invention includes supplying an image signal, a control signal, and a power signal to a panel driving circuit unit (S1), and connecting a probe of a measurement device to a test point. And (S3) detecting at least one of a gate driving signal and a data driving signal generated by the panel driving circuit unit.

Specifically, a plurality of input terminals for inputting image signals, control signals, and power signals, and a plurality of output terminals for outputting gate and data driving signals to gate lines and data lines of the liquid crystal panel, and connected to at least one output terminal. A liquid crystal panel mounted with a bump formed panel driving circuit is provided. The dummy bumps are connected to test points formed in the flexible printed circuit. At this time, the dummy bump and the test point are connected to each other through a connection line. Here, the dummy bumps and the connection line are connected to each other by connecting the liquid crystal panel and the flexible printed circuit through the ACF.

In the flexible printed circuit, a timing controller and a power supply unit are mounted, and the red, green, and blue digital video data input from the outside to the panel driving circuit unit, a clock signal CK, a signal for selecting the next gate line (CPV), and a gate start. The panel driver circuit unit 130 is supplied to the panel driver circuit unit 130 through signal lines connected to a plurality of input terminals for controlling the panel driver circuit unit 130 such as a pulse GPS and an output control signal OE. The power supply unit supplies the digital driving voltage VDD and the analog driving voltage AVDD to the panel driving circuit portion, and supplies the digital driving voltage VDD to the timing controller.

When the image signal, the control signal, and the power signal are supplied in this way, the panel driving circuit unit supplies the gate driving signal to the gate line and the data driving signal to the data line.

Next, a probe of a tester or measuring device for detecting the data driving signal is connected to a test point connected to the output terminal of the data driving signal.

Next, signal characteristics such as waveforms and voltage levels of the data driving signals are measured. The waveform of the data drive signal generally represents a rectangular waveform alternately around a common voltage. At this time, whether the signal waveform is distorted and the timing of alternating peak levels around the common voltage is measured to test whether the panel driving circuit unit generates a normal data signal.

Similarly, the gate drive signal can be measured through the measurement equipment at the test point connected to the output terminal of the gate drive signal. The peak voltage and the voltage waveform of the gate-on voltage while the gate-on voltage is supplied among the gate driving signals are measured to test the operation characteristics of the panel driving circuit unit through the characteristics of the gate driving signal.

As described above, the liquid crystal display device and the test method thereof according to the present invention can facilitate the test by forming a test point for testing the gate and data driving signal on the FPC in the liquid crystal display device of the COG type.

This may prevent damage to the liquid crystal panel in measuring the driving signal.

The present invention described above will be capable of various substitutions, modifications and changes by those skilled in the art to which the present invention pertains. Therefore, the present invention should not be limited to the above-described embodiments and the accompanying drawings, and the rights thereof should be determined by the claims.

Claims (9)

A liquid crystal panel on which gate lines and data lines are formed; A chip-on-glass is mounted on the liquid crystal panel and includes a plurality of input terminals for inputting image signals, control signals, and power signals, and a plurality of output terminals for outputting gate and data driving signals to gate lines and data lines of the liquid crystal panel. A panel driving circuit unit including a dummy bump connected to at least one output terminal; And  And a test point connected to the dummy bump. The method of claim 1, And a flexible printed circuit connected to said liquid crystal panel. The method of claim 2, And the test point is formed on the flexible printed circuit. The method of claim 1, And the dummy bump is connected to any one of the output terminals through an inside of the panel driving circuit unit. The method of claim 2, The flexible printed circuit A timing controller supplying a data signal and a control signal to the panel driver circuit; And And a power supply unit supplying a power signal to the panel driving circuit unit and the timing controller. The method of claim 2, And a connection line connecting the test point and the dummy bump. The method of claim 6, And the test point is connected to an output terminal through which the gate driving signal of the panel driving circuit is output, via the dummy bump and the connection line. The method of claim 6, And the test point is connected to an output terminal through which the data driving signal of the panel driving circuit is output, via the dummy bump and the connection line. Supplying an image signal, a control signal and a power signal to the panel driver circuit; Connecting a probe of the measuring instrument to the test point; And detecting at least one of a gate driving signal and a data driving signal generated by the panel driving circuit unit.

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