KR20070034766A - Full Layer Inner Via Printed Circuit Board Using Peel Plating and Its Manufacturing Method - Google Patents

Abstract

The present invention uses a photosensitive insulating resin as a material of the insulating layer to form a via hole by an image forming process, and at this time, the hardened portion is used as the insulating layer, and the plating is performed on the via hole to the unmounted surface of the insulating layer. The present invention relates to a full-layer inner via hole printed circuit board using peel plating to form a full-layer inner via hole printed circuit board by forming a circuit layer.

Photosensitive Insulation Resin, Fill Plating, Via Hole, Insulation Layer

Description

All-layer inner via hole printed circuit board using peel plating and its manufacturing method {ALL LAYER INNER VIA HALL PRINTED CIRCUIT BOARD AND THE MANUFACTURING METHOD THAT UTILIZE THE FILL PLATING}

1A to 1E illustrate a process of forming a via hole by using a laser drill as an example of a method of forming a fine via hole in a conventional printed circuit board.

2 is a cross-sectional view of a full-layer inner via hole printed circuit board using peel plating according to an embodiment of the present invention.

3A to 3G are process diagrams illustrating a process of preparing a core substrate on which circuits are formed on both surfaces used in an embodiment of the present invention.

Figures 4a to 4h is a process diagram of a method for manufacturing a full-layer inner via hole printed circuit board using peel plating according to an embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a full-layer inner via hole printed circuit board using peel plating and a method of manufacturing the same. More specifically, the via hole is formed by an image forming process using a photosensitive insulating resin as a material of the insulating layer, and the cured portion is A full layer inner via hole printed circuit board using a peel plating to be used as an insulating layer and to form a full layer inner via hole printed circuit board by peeling the via hole and plating the unmounted surface of the insulating layer and forming a circuit layer thereon. And to a method for producing the same.

Recently, due to the rapid digitalization and networking of the electronics industry, electronic devices are required to be miniaturized, light weighted, thinned and highly functional, and according to such a flow, parts of electronic devices are also highly integrated and ultra-thin.

Accordingly, the problem is that the printed circuit board on which the highly integrated and ultra-thin components are mounted is also required to be thin. To satisfy this, the degree of freedom of circuit design of the board must be increased, and various new technologies such as microvia and build-up have been adopted to solve this problem.

In particular, the microvia hole has attracted attention as a method for coping with the demand for high integration and minute excretion pitch according to the current trend of increasing the degree of integration of semiconductor devices.

1A to 1I show an example of a manufacturing method using the ALIVE method according to Japanese Patent Laid-Open No. 6-268345, which shows a process diagram of a full-layer IVH manufacturing method by batch lamination.

As shown in FIG. 1A, the porous base material 111 which impregnated the thermosetting epoxy resin in the nonwoven fabric of aramid fiber as a raw material of a board | substrate is formed. This aramid nonwoven raw material is made of a porous material, and has a strong heat resistance property, but because it is semi-cured into a B-stage, it has a property of easily shrinking when laminated.

Referring to FIG. 1B, the cover film 115 is laminated on both surfaces of the porous substrate 111. The cover film 115 generally uses polyester (PET), which is to protect the porous substrate 111 and is a release film.

Referring to FIG. 1C, a via hole 117 is formed at a predetermined position of the porous substrate 111 by a CO ₂ laser processing method.

Referring to FIG. 1D, the conductive paste 119 is filled in the via hole 117 formed by the CO ₂ laser processing method. In the filling method, the porous substrate 111 having the via holes 117 is installed on the table of the screen printing machine, and the conductive paste 119 is directly printed on the cover film 115. In this case, the cover film 115 of the printing surface serves as a printing mask and prevention of contamination of the surface of the porous substrate 111.

Referring to FIG. 1E, the cover film 115, which is a release film attached to both surfaces of the porous substrate 111 filled with the conductive paste 119, is removed.

Referring to FIG. 1F, the copper foil 121 is attached to both surfaces of the porous substrate 111 from which the cover film 115 is removed. By heating and pressurizing in this state, the porous base material 111 is compressed and its thickness becomes thin. At this time, the conductive paste 119 in the via hole 117 is also compressed, and the binder component in the conductive paste 119 is extruded, so that the bonding between the conductive components and the conductive component and the copper foil 121 is firm, and the conductive paste 119 The conductive material of) enables electrical connection between the layers. Then, the thermosetting resin and the conductive paste 119 which are components of the porous substrate 111 are cured.

Referring to Figure 1g, the raw material formed as described above is coated with a dry film or a liquid photoresist, and then covered with a photomask and irradiated with ultraviolet rays, to form a circuit pattern through development, etching, peeling.

In addition, referring to FIG. 1H, a separate insulating substrate 110 formed by the process of FIGS. 1A to 1E is placed in the center, and the double-sided wiring board 120 is overlapped with each other on both sides thereof, and then the whole is overlapped. Multilayered by heating and pressing to form a multilayer printed circuit board as shown in FIG. 1I.

Such a manufacturing method enables via hole connection of a very small diameter because a via hole is formed using a laser and electrical connection between copper foil layers is made using a fluid conductive paste.

However, the method of forming the via hole with the laser as described above has become a factor in which the RCC technology cannot be widely used due to expensive equipment such as laser equipment, and although not shown, expensive press by forming the insulating layer by press There is a problem in that the equipment is required, and if the conditions of use of the press are not met, a deviation may occur in the insulation layer distance, which may affect the impedance.

In addition, when the press is applied to the existing CCL when forming the printed circuit board as described above, there is a problem that short defects occur when forming a fine pattern due to the thick overall copper thickness.

The present invention has been made to solve the above problems, by forming a via hole in the photosensitive insulating resin applied to the core circuit layer through an image forming process to form the via hole without the need for expensive equipment such as laser equipment. An object of the present invention is to provide a full-layer inner via hole printed circuit board using peel plating and a method of manufacturing the same.

Another object of the present invention is to form an insulating layer without the need for expensive press equipment by forming an insulating layer without forming a separate press by forming a hardened portion as an insulating layer when forming a via hole through an image forming process. An object of the present invention is to provide a full-layer inner via hole printed circuit board using a peel plating.

Still another object of the present invention is to fill the via hole, but the entire surface of the photosensitive insulating resin exposed to the outside to be plated to form a circuit pattern thereon to reduce the thickness of the entire layer using a peel plating capable of forming a fine pattern An object of the present invention is to provide an inner via hole printed circuit board and a method of manufacturing the same.

In order to achieve the above object, the entire layered inner via hole printed circuit board using the peel plating of the present invention includes: (a) a core substrate having circuit patterns formed on both surfaces of the insulating layer and having a plurality of via holes which are plated; (b) a first substrate which is coated on both surfaces of the core substrate, has a plurality of via holes that are peel-plated, a circuit pattern is formed, and the insulating layer is formed of a photosensitive insulating resin; And (c) a second substrate formed on both surfaces of the first substrate and having a plurality of via holes, which are peeled from each other, having a circuit pattern formed thereon, and the insulating layer being made of photosensitive insulating resin. do.

Method of manufacturing a full-layer inner via hole printed circuit board using the peel plating of the present invention,

(a) preparing a core substrate having at least one via hole pre-plated with an insulating layer and having circuit patterns formed on both surfaces thereof; (b) applying a first insulating layer to a surface on which the circuit of the core substrate is formed; (c) forming a via hole in the first insulating layer by using an image forming process and performing a peel plating thereto; (d) forming a first substrate by forming a circuit on the peeled first insulating layer; (e) applying a second insulating layer to the surface of the circuit on the first substrate; (f) forming a via hole in the second insulating layer by using an image forming process and performing a peel plating thereto; And (g) forming a circuit on the peeled second insulating layer to form a second substrate.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a cross-sectional view of a full-layer inner via hole printed circuit board using peel plating according to an exemplary embodiment of the present invention.

As shown in FIG. 2, in the full-layer inner via hole printed circuit board of the present invention, circuit patterns 213a and 213b are formed on both surfaces of the insulating layer 212, and the plurality of via holes 211 are peeled from each other. The core substrate 210 and the core substrate 210 are coated on both surfaces of the core substrate 210, and have a plurality of via holes 222 that are peeled off, a circuit pattern 223 is formed, and the insulating layer 221 is formed. A circuit pattern 233 is formed on the first substrate 220 made of the photosensitive insulating resin and on one surface of the first substrate 220, and has a plurality of via holes 232 that are peeled from each other. The layer 231 includes a second substrate 230 made of photosensitive insulating resin.

The core substrate 210 uses a copper clad laminate, although not shown, the surface thereof is suitable for smoothing various chemical and physical treatments during the manufacturing process and for improving adhesion to the first substrate 220 bonded to a later process. Roughness is formed.

In addition, the via hole 211 of the core substrate 210 is peel plated so that the entire via hole 211 is completely filled. The peel plating is plated so that the copper is filled in the via hole 211 using a plating solution in which the plating inhibiting action of the reveller as the plating liquid additive and the promoting action of the polishing agent are maximized.

 The insulating layers 221 and 231 of the first substrate 220 and the second substrate 230 are formed of a cured portion of the photosensitive insulating resin as a result of the image forming process formed when the via holes 222 and 232 are formed. The photosensitive insulating resin may be a photosensitive film or a liquid, and the photosensitive liquid, which is a light sensitive material, is applied to a printed circuit board. The photosensitive liquid applied to the core substrate 210 may have a negative photosensitive liquid in which a part not receiving light is melted. There is a positive photosensitive liquid in which the light-receiving part melts, and in the present invention, either may be used.

The via holes 222 and 232 of the first substrate 220 and the second substrate 230 are peeled of copper similarly to the via holes 211 of the core substrate 210.

The circuit patterns 223 and 233 of the first substrate 220 and the second substrate 230 are configured to be plated to the entire surface of the unmounted surface during the peel plating of the via holes 222 and 232 through a circuit forming process. As a result, the via holes 222 and 232 may be formed of the same material as the fill holes.

In addition, although shown is formed of five layers, more is possible.

3A to 3G are process diagrams illustrating a process of preparing a core substrate having circuits formed on both surfaces thereof used in an embodiment of the present invention.

As shown in FIG. 3A, a copper clad laminate 310 is prepared. At this time, the first copper foil 312a and the second copper foil 312b mounted on the insulating layer 311 of the copper clad laminate 310 have an unclad circuit board to be smoothly subjected to various chemical and physical treatments during the manufacturing process and to be bonded to a later process. It is preferable that an appropriate roughness is formed to improve the adhesive strength of the adhesive.

Referring to FIG. 3B, a window 313 is formed on one surface of the copper clad laminate 310 through an etching process. The window 313 is formed at a point where the via hole is to be located when forming the via hole by using a laser drill, which will be described later. The window 313 may be formed at a predetermined position of the first copper foil 312a through a general image forming process.

Referring to FIG. 3C, a via hole 314 is formed in the copper clad laminate 310. The via hole 314 is formed where the window 313 is formed. In this case, the via hole 314 is formed to penetrate the copper-clad laminate 310 finely, and for this purpose, it is preferable to use a laser drill.

Referring to FIG. 3D, plating resists 320a and 320b are coated on both surfaces of the copper clad laminate 310. In this case, the plating resists 320a and 320b may use a solder or the like as a resist to cover the portions that do not require plating, so that the plating reaction does not occur, and the entire surface of the plating resists 320a and 314 may be applied except for the portions where the via holes 314 are to be formed.

Referring to FIG. 3E, the via hole 314 is peeled after the process. The fill plating is formed to fill the via hole 314 formed above, and the degree of fill plating of the via hole 314 is dependent on the length of time to be immersed in the plating solution, so that the process is performed only until the via hole 314 is completely filled in consideration of the processing time. It is preferable to carry out.

Referring to FIG. 3F, the plating resists 320a and 320b are removed from the copper clad laminate 310 after the peel plating. The plating resists 320a and 320b are preferably removed completely.

Referring to FIG. 3G, a circuit is formed on the copper foils 312a and 312b of the peel-plated copper-clad laminate 310 to form a core substrate 340. In this case, a general image forming process may be used as the process of forming the circuit.

4A to 4H are flowcharts illustrating a method of manufacturing a full-layer inner via hole printed circuit board using peel plating according to an exemplary embodiment of the present invention.

First, as shown in FIG. 4A, at least one via hole 412 is plated on the insulating layer 411 by using the process described with reference to FIGS. 3A to 3G, and the circuits 413a and 413b are provided on both sides. A core substrate 410 is formed.

Fill plating to fill the via hole 412 uses a method of filling with copper using a plating solution that maximizes the plating inhibitory action and the polishing action of the plating agent additive reveller.

Referring to FIG. 4B, first insulating layers 420a and 420b are coated on a surface on which circuits 413a and 413b of the core substrate 410 are formed.

The first insulating layers 420a and 420b use a photosensitive film or liquid photosensitive insulating resin, and may be applied by various methods such as screen printing, curtain coating, roll coating, and spray coating. The photosensitive insulating resin is a photosensitive liquid, which is a light sensitive material, is applied to a printed circuit board. In the present invention, any of the two may be used.

Referring to FIG. 4C, via holes 421 are formed in the first insulating layers 420a and 420b.

In the method of forming the via hole 421, first the first insulating layers 420a and 420b formed of the photosensitive insulating resin are photocured by irradiating ultraviolet rays using a photomask. The photocured first insulating layers 420a and 420b are then developed with an alkaline solution (generally Na ₂ CO ₃ ) to form via holes 421. In this case, the photocured photosensitive insulating resin is not removed to constitute the first insulating layers 420a and 420b.

Referring to FIG. 4D, the fill plating layer 422 is formed by peeling the plated via holes 421 formed in the first insulating layers 420a and 420b so as to plate the entire surface of the unmounted surface.

Since the degree of the fill plating depends on the length of time it is immersed in the plating solution, in order to reduce the processing time and to completely fill the via hole 421 to allow thinning of the substrate, the entire surface of the unmounted surface is plated, but the entire surface is plated. It is desirable to apply plating only until

Referring to FIG. 4E, a circuit 423 is formed by performing an image forming process on the fill plating layer 422 to form a first substrate 420. Subsequently, referring to FIG. 4F, the first substrate 420 is formed. The second insulating layers 430a and 430b are applied to the surface on which the circuit 423 is formed, and the via hole 431 is formed by performing an image forming process again. In this case, the second insulating layers 430a and 430b use photosensitive insulating resins similarly to the first insulating layers 420a and 420b.

Referring to FIG. 4G, the peel plating of the via holes 431 formed in the second insulating layers 430a and 430b may be peeled to be plated to the entire surface of the unmounted surface to form the peel plating layer 432. At this time, the degree and method of peel plating are the same as the method mentioned above at the time of plating the 1st insulating layers 420a and 420b.

Referring to FIG. 4H, a circuit 433 may be formed on the peeled second insulating layers 430a and 430b to manufacture a full-layer inner via hole printed circuit board.

Although shown is shown in five layers, more layers can be constructed in the same manner.

Although the technical spirit of the present invention has been described in detail according to the above-described preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the technical scope of the present invention.

As described above, in the present invention, the via hole is formed in the photosensitive insulating resin applied to the core circuit layer through an image forming process, thereby forming the via hole without the need for expensive equipment such as laser equipment.

In addition, the present invention can form an insulating layer without expensive press equipment by forming an insulating layer without a separate press by configuring the cured portion as an insulating layer when forming a via hole through an image forming process. .

In addition, since the present invention forms a peel plating layer on the entire surface of the insulating resin during via hole peel plating without using the copper foil laminated plate used in the conventional multilayer, it can be used as a copper foil, thereby lowering the thickness of copper compared to conventional CCL. It is possible to thin the circuit board.

Claims (8)

(a) a core substrate having circuit patterns formed on both surfaces of the insulating layer, the core substrate having a plurality of via holes which are peeled from each other; (b) a first substrate which is coated on both surfaces of the core substrate, has a plurality of via holes that are peel-plated, a circuit pattern is formed, and the insulating layer is formed of a photosensitive insulating resin; And (c) a peel formed on both sides of the first substrate, having a plurality of via holes that are peeled off, a circuit pattern being formed, and the insulating layer comprising a second substrate made of photosensitive insulating resin; Full-layered inner via hole printed circuit board using plating. The method of claim 1, The circuit layer formed on at least one of the first substrate and the second substrate is formed by a peel plating layer formed by peel plating formed on the entire surface of the insulating layer. The method of claim 2, A circuit pattern is formed and a plurality of via holes are plated, and an insulating layer is formed by sequentially forming a plurality of substrates of photosensitive insulating resin on both sides of the second substrate to form five or more full-layer inner via holes. Full-layer inner via hole printed circuit board using peel plating. (a) preparing a core substrate having at least one via hole pre-plated with an insulating layer and having circuit patterns formed on both surfaces thereof; (b) applying a first insulating layer to a surface on which the circuit of the core substrate is formed; (c) forming a via hole in the first insulating layer by using an image forming process and performing a peel plating thereto; (d) forming a first substrate by forming a circuit on the peeled first insulating layer; (e) applying a second insulating layer to the surface of the circuit on the first substrate; (f) forming a via hole in the second insulating layer by using an image forming process and performing a peel plating thereto; And (g) forming a circuit board on the peeled second insulating layer to form a second substrate; Method of manufacturing a full-layer inner via hole printed circuit board using a peel plating comprising a. The method of claim 4, wherein The first insulating layer and the second insulating layer is a full-layer inner via hole printed circuit board manufacturing method using a peel plating, characterized in that the photosensitive insulating resin. The method according to claim 4 or 5, The circuit formation of the steps (d) and (e), A method of manufacturing a full-layer inner via hole printed circuit board using peel plating, comprising: forming a fill plating layer by peeling the entire surface of the via hole and the first insulating layer, and forming a circuit through the image forming process. The method of claim 4, wherein after step (g), A circuit pattern is formed with a plurality of via holes formed by using an image forming process, and a plurality of substrates, each having an insulating layer made of photosensitive insulating resin, are sequentially formed on both sides of a second substrate to form five or more layers. Full-layer inner via hole printed circuit board manufacturing method using a peel plating, characterized in that it further comprises the step of.  The method according to claim 4 or 7, Step (a) is, Preparing a copper clad laminate; Forming a window on one surface of the copper-clad laminate through an etching process; Forming a via hole in the copper clad laminate; Coating plating resist on both sides of the copper-clad laminate; Peeling the via hole; Removing the plating resist; And And forming a circuit on the peel-plated copper-clad laminate to form a copper foil substrate.

Images