KR20070005337A - Plasma display panel - Google Patents

Abstract

The present invention relates to a plasma display panel, and more particularly, to a partition structure having a delta partition wall in which two address electrodes are assigned to one pixel instead of a conventional delta partition wall in which three address electrodes are assigned to one pixel. The present invention relates to a plasma display panel having a structure suitable for high definition by increasing the area of the facing portion of the display electrode and improving the ultraviolet light emission efficiency.

Description

Plasma Display Panel

1 is an exploded perspective view of a plasma display panel according to a first embodiment of the present invention;

2A is a plan view of a pixel in which electrodes are disposed according to a first embodiment of the present invention;

2B is a plan view of a pixel in which electrodes are disposed according to a second exemplary embodiment of the present invention.

3A is a plan view of a transparent electrode according to a first embodiment of the present invention;

3B is a plan view of a transparent electrode according to a second embodiment of the present invention.

4 is a cross-sectional view of the plasma display panel according to the first or second embodiment of the present invention.

<Description of Symbols for Major Parts of Drawings>

100-Plasma Display Panel 110-Front Panel

122-first display electrode 122a, 124a-transparent electrode

122b, 124b-Bus electrodes 123, 123 '-Connection

124-second display electrode 125, 125'- extension

130-upper dielectric layer 135-protective layer

140-Back substrate 150-Address electrode

160-Lower dielectric layer 170-Bulkhead

180-phosphor layer 190-pixel

191, 192, 193-discharge cells

The present invention relates to a plasma display panel, and more particularly, to a partition structure having a delta partition wall in which two address electrodes are assigned to one pixel instead of a conventional delta partition wall in which three address electrodes are assigned to one pixel. The present invention relates to a plasma display panel having a structure suitable for high definition by increasing the area of the facing portion of the display electrode and improving the ultraviolet light emission efficiency.

In general, a plasma display panel (hereinafter referred to as a PDP) is a display device that realizes an image by using visible light generated by excitation of a phosphor by vacuum ultraviolet rays (VUV) emitted from a plasma obtained through gas discharge. to be. Such a PDP can realize an ultra-large screen of 60 inches or more with a thickness of only 10 cm or less, and is a self-luminous display device such as a CRT. In addition, since the manufacturing method is simpler than LCD, it has advantages in terms of productivity and cost, and thus, it is being spotlighted as the next-generation industrial flat panel display and home TV display.

Such a conventional PDP generally includes a front substrate having a plurality of display electrodes and a back substrate having a plurality of address electrodes to intersect the display electrodes. In addition, a plurality of partition walls are formed between the front substrate and the rear substrate so as to partition the plurality of discharge regions. There are various structures of such a partition, such as stripe type, matrix type, and delta type.

Among these, in the case of a PDP having a delta partition, three discharge cells are normally adjacent to each other to form one pixel. Each of the discharge cells has a red (R) fluorescent layer, a green (G) fluorescent layer, and a blue (R) fluorescent layer. Three address electrodes are normally assigned to one pixel.

On the other hand, in recent years, as the resolution of the PDP is increased, that is, as the resolution is increased, the number of address electrodes gradually increases and the pitch between the address electrodes is also reduced. However, as is well known, as the pitch between address electrodes decreases, the capacitance value between address electrodes increases, and energy calculated as approximately CV ² f is consumed between the address electrodes. In other words, it is necessary to increase the power consumption of the address electrode to make a high resolution PDP. Since a discharge voltage much larger than that of the display electrode is applied to the address electrode, an increase in power consumption of the address electrode is directly connected to an increase in power consumption of the entire PDP. Here, C is a capacitance value generated between address electrodes, V is a voltage applied to the address electrode, and f is a frequency applied to the address electrode.

As the size of the cell becomes smaller, the amount of phosphor decreases due to the high resolution, which is a major trend of PDP technology. Therefore, since the luminance is reduced, an increase in the discharge voltage is inevitable in order to have an appropriate luminance. In addition, when the resolution is high, the wall charges are not sufficiently formed on the electrodes because there are not enough charged particles in the discharge space. Therefore, the discharge voltage rises. For high efficiency, another main trend of PDP technology, high discharge voltage is required to use high Xe partial pressure gas. In addition to the phenomenon that the discharge voltage rises, the discharge space is insufficient under a high definition, and thus the luminous efficiency is reduced. Therefore, there is a need to propose a barrier rib structure capable of reducing capacitance between address electrodes due to high resolution, and an electrode structure capable of compensating a rise in discharge voltage and narrowing of discharge space due to high resolution.

The present invention has been made to solve the above problems caused by the high resolution of the PDP, and forms a cell structure in which two address electrodes are allocated per pixel for pixels of adjacent R, G, and B subpixels. The purpose of the present invention is to provide a PDP which realizes high efficiency by reducing the discharge voltage and increasing the discharge space by reducing the capacitance between the electrodes and increasing the area of the facing portion of the display electrode.

Plasma display panel of the present invention for achieving the above object, the front substrate and the rear substrate facing each other, formed between the front substrate and the rear substrate, the three adjacent discharge cells for emitting visible light of different colors A partition wall partitioning a space to form one pixel, first display electrodes and second display electrodes formed on a rear side of the front substrate and having a transparent electrode and a bus electrode, and discharge cells divided by the partition wall. Two address electrodes are allocated to one pixel, and the width of the transparent electrode of the first display electrode and the transparent electrode of the second display electrode is greater than that of the other side. In this case, one address electrode may be commonly allocated to two selected discharge cells among the three discharge cells constituting the one pixel, and another address electrode may be allocated to the other discharge cell.

In addition, the transparent electrode may be formed to extend in the direction of the discharge cells on both sides separated by the partition from the upper portion of the partition wall, the bus electrode may be formed to be located below the transparent electrode. In this case, the transparent electrode may be provided with a connection part positioned on the bus electrode and electrically connected to the bus electrode, and an extension part contacting the connection part and extending in the center direction of the discharge cell.

In addition, the expansion portion may be formed larger than the connection portion. In addition, the extension may have a trapezoidal shape in cross section in a direction parallel to the front substrate.

In addition, the bus electrode may be formed in the transverse direction along the partition wall, it may be formed so that the discharge cells coated with phosphors of different colors are in contact with the bus electrode.

In addition, a part of the connection part may exist in an area of the discharge cell, or the connection part may be formed so that all of the connection part exists on the partition wall. In addition, the discharge cells may be hexagonal in shape.

In addition, a plurality of discharge cells are repeatedly arranged along one address electrode, and each discharge cell may be arranged to emit visible light having a different color.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

FIG. 1 is an exploded perspective view of a plasma display panel according to a first embodiment of the present invention, and FIG. 2A is a plan view of a discharge cell in which an electrode according to the first embodiment of the present invention is disposed. 2B is a plan view of a discharge cell in which an electrode according to a second embodiment of the present invention is disposed. 3A is a plan view of a transparent electrode according to a first embodiment of the present invention, and FIG. 3B is a plan view of a transparent electrode according to a second embodiment of the present invention. 4 is a vertical cross-sectional view of the plasma display panel according to the first or second embodiment of the present invention.

In the plasma display panel 100 according to the first embodiment of the present invention, referring to FIG. 1, the back substrate 140, the front substrate 110, the first display electrodes 122, and the second display electrode 124 are described. ) And address electrodes 150. In addition, the first display electrodes 122 and the second display electrodes 124 are covered by the upper dielectric layer 130, and the upper dielectric layer 130 is protected by the protective layer 135. In addition, the address electrodes 150 are covered with a lower dielectric layer 160, and a phosphor layer absorbing vacuum ultraviolet rays and emitting visible light inside discharge cells 191, 192, and 193 partitioned by partition walls 170. 180, filled with a discharge gas for generating vacuum ultraviolet rays by plasma discharge. Hereinafter, the front substrate 110 direction (the + z direction in FIG. 1) will be divided into the upper direction, and the back substrate 140 direction (the -z direction in FIG. 1) will be described in the lower direction.

The back substrate 140 is formed of a material such as glass having a predetermined thickness to form the plasma display panel 100 together with the front substrate 110. The back substrate 140 is an upper surface facing the front substrate 110. The address electrodes 150 disposed in one direction and the lower dielectric layer 160 applied to cover the address electrodes 150 are formed, and the partition wall 170 is formed on the lower dielectric layer 160.

The front substrate 110 is formed of a transparent material such as soda glass, and is formed to face the rear substrate 140. First display electrodes 122 and second display electrodes 124 are arranged side by side under the front substrate 110, and the first display electrodes 122 and the second display electrodes 124 are formed on an upper dielectric layer. Covered by 130, the upper dielectric layer 130 is protected by a protective layer 135. The back substrate 140 and the front substrate 110 may be formed of a substantially flat glass having high heat resistance that does not change in size and shape in various high temperature processes.

The partition wall 170 may be formed to a predetermined thickness on the surface of the lower dielectric layer 160 formed on the rear substrate 140 as shown in FIG. 1, or may be formed separately from the rear substrate 140. The partition wall 170 may be formed in a honeycomb shape in which a plurality of hexagons are densely formed, and maintains a distance between the front substrate 110 and the rear substrate 140 and partitions the discharge cells 191, 192, and 193. . Three discharge cells 191, 192, and 193 that emit visible light of different colors are formed by the partition wall 170, and the discharge cells 191, 192, 193 are adjacent to each other in a triangular form and have one pixel. (190). Here, two address electrodes 150 are allocated to one pixel 190. That is, one address electrode 150 is commonly assigned to two discharge cells 192 and 193 selected from three discharge cells 191, 192, and 193, and another address electrode is assigned to the other discharge cell 191. 150 may be assigned.

The partition wall 170 may be formed by screen printing, sandblasting, lift-off, etching, or the like. In addition, the partition wall 170 may be formed of a glass component including elements such as lead (Pb), boron (B), silicon (Si), aluminum (Al) and oxygen (O), and preferably, oxidation A dielectric that contains fillers such as zirconium (ZrO2), titanium oxide (TiO2), aluminum oxide (Al2O3) and pigments such as chromium (Cr), copper (Cu), cobalt (Co), iron (Fe), etc. Can be formed. However, the method of manufacturing the barrier rib 170 and the components thereof are not limited thereto, but may be formed of various dielectric materials.

The upper dielectric layer 130 includes the first display electrode 122 and the second display electrode 124 to cover the entire lower surface of the front substrate 110. The upper dielectric layer 130 may be formed by uniformly screen printing a paste including a low melting point glass powder on the entire lower surface of the front substrate 110. As is well known, the upper dielectric layer 130 is a transparent material, and acts as a capacitor during discharge, limits current, and performs a memory function. In addition, a protective layer 135 may be further formed on the surface of the upper dielectric layer 130 to reinforce durability and to emit many secondary electrons during discharge. The protective layer 135 may be formed by an electron beam method or sputtering using any one selected from magnesium oxide (MgO) or equivalents thereof, but the material of the protective layer and the method of forming the protective layer 135 are not limited thereto.

The lower dielectric layer 160 covers the entire upper surface of the back substrate 140 including the address electrode 150. The lower dielectric layer 160 may also be formed of a material similar or identical to the upper dielectric layer 130.

The address electrodes 150 are formed on an upper side of the rear substrate 140, that is, facing the upper dielectric layer 130 of the front substrate 110. The address electrode 150 has a predetermined pitch on the top surface of the back substrate 140 and is formed in parallel with each other. The address electrode 150 is formed in a direction substantially perpendicular to the first display electrode 122 and the second display electrode 124 (y direction in FIG. 1). One address electrode 150 is formed to pass through discharge cells 191, 192, and 193 or different fluorescent layers 180 that emit visible light of different colors, respectively. The address electrode 150 may be formed by sputtering, screen printing, photolithography, or the like using Ag paste or the like, but the present invention is not limited to the material and the method of forming the address electrode 150.

The first display electrode 122 and the second display electrode 124 are formed in parallel with each other and have a predetermined pitch on a lower surface of the front substrate 110. The first display electrode 122 and the second display electrode 124 are formed with transparent electrodes 122a and 124a and bus electrodes 122b and 124b. The transparent electrodes 122a and 124a may be formed of ITO (alloy oxide film of In and Sn) having good light transmittance, a nesa film (SnO 2), etc., and are mainly formed by sputtering. The bus electrodes 122b and 124b may be formed of a low resistance metal material, particularly Cr-Cu-Cr or Ag, to compensate for the resistance of the transparent electrodes 122a and 124a to prevent a voltage drop.

Referring to FIG. 4, the transparent electrodes 122a and 124a extend in the upper direction of both discharge cells in contact with the partition wall 170 at the upper part of the partition wall 170, and the bus electrodes 122b and 124b. ) Is positioned under the transparent electrodes 122a and 124b. 2A and 3A, the transparent electrodes 122a and 124a are connected to the bus electrodes 122b and 124b and electrically connected to the bus electrodes 122b and 124b, and are in contact with the connection part 123 in the center direction of the discharge cell. It is formed with an extension 125 is formed to extend. At this time, the expansion portion 125 is formed to have a larger width than the connection portion 123. In order to design a cell with high efficiency, the area of the electrode which causes discharge must be made small, but the area of the part which the 1st display electrode and the 2nd display electrode which contribute to discharge must face. This is because by reducing the capacitor between adjacent electrodes to reduce the reactive power consumed in the panel, the portion of the opposite electrode that contributes to the discharge must be made larger to generate more ultraviolet light.

The expansion portion 125 is formed in a trapezoidal shape in the cross section (xy plane) in a direction parallel to the front substrate 110, preferably formed in an equilateral trapezoidal shape. In the first embodiment of the present invention, referring to FIG. 2A, a part of the connection part 123 exists in the area of the discharge cell. In the second embodiment of the present invention, referring to FIG. 2B, the connection part 123 is used. The entirety of ') is on top of the partition wall 170. Thus, the shape of the transparent electrodes 122a and 124a is basically trapezoidal, and by widening the opposite electrode portions, the discharge path can be extended to lower the initial discharge voltage. After the initial discharge, the discharge spreads long between the opposite electrodes. If the discharge spreads widely, the discharge time can be extended, thereby generating more vacuum ultraviolet rays.

2A or 2B, the bus electrodes 122b and 124b are formed in the transverse direction along the partition wall 170. Therefore, discharge cells coated with phosphors of different colors are contacted with the bus electrodes 122b and 124b as a boundary.

The phosphor layer 180 has a component for generating visible light by receiving ultraviolet rays. The red phosphor layer formed in the red light emitting discharge cell includes a phosphor such as Y (V, P) O4: Eu, and the green light emitting discharge cell. The green phosphor layer formed at includes a phosphor such as Zn 2 SiO 4: Mn, and the blue phosphor layer formed at the blue light emitting discharge cell may include a phosphor layer such as BAM: Eu. Accordingly, the phosphor layer 180 is divided into red, green, and blue light emitting phosphor layers, and is formed in each of the discharge cells 191, 192, and 193 adjacent to each other, and the red, green, and blue light emitting phosphor layers are formed. The formed discharge cells 191, 192, and 193 are combined to form unit pixels for implementing a color image.

Looking at the relationship between the phosphor layer 180 and the address electrode 150, one address electrode 150 is commonly assigned to the red phosphor layer and the green phosphor layer among the phosphor layers 180, and the remaining blue Another address electrode 150 may be allocated to the phosphor layer. Of course, one address electrode 150 may be allocated to the green phosphor layer and the blue phosphor layer of the phosphor layer 180 in common, and the other address electrode 150 may be allocated to the other red phosphor layer. . In addition, one address electrode 150 may be allocated to the blue phosphor layer and the red phosphor layer of the phosphor layer 180 in common, and the other address electrode 150 may be allocated to the other green phosphor layer.

The discharge cells 191, 192, and 193 are defined by the lower dielectric layer 160, the partition wall 170, and the upper dielectric layer 130 on the upper surface of the rear substrate 140. The discharge cells 191, 192, and 193 are filled with a discharge gas (eg, a mixed gas including xenon (Xe), neon (Ne), etc.) to cause plasma discharge. In addition, as described above, the discharge cells 191, 192, and 193 have a phosphor layer 180 that absorbs ultraviolet rays and emits visible light in a predetermined region. The discharge cells 191, 192, and 193 may have different widths or lengths depending on the luminous efficiency of each phosphor. In the discharge cells 191, 192, and 193, electrodes which undergo address discharge and sustain discharge are disposed at the center and the bottom thereof. A plurality of discharge cells 191, 192, and 193 are repeatedly arranged along one address electrode 150, and each discharge cell 191, 192, and 193 is arranged to emit visible light of different colors. have.

In this manner, in the plasma display panel 100 according to the present invention, two address electrodes 150 are allocated to one pixel 190, so that the number of address electrodes 150 is reduced to approximately 2/3 as compared with the related art. Thus, power consumption is also reduced to approximately two thirds. In addition, the power required by one circuit to drive the address electrode 150 is also reduced compared to the conventional, the heat release rate is also significantly smaller than the conventional.

In addition, since the number of address electrodes 150 is reduced in the same area, the pitch between the address electrodes 150 is naturally increased, thereby reducing the capacitance between the address electrodes 150. In other words, it can be seen that the number of address electrodes 150 can be increased in the same area as before, resulting in an advantageous structure for high definition of the PDP.

As described above, the present invention is not limited to the specific preferred embodiments described above, and any person having ordinary skill in the art to which the present invention pertains without departing from the gist of the present invention claimed in the claims. Various modifications are possible, of course, and such changes are within the scope of the claims.

According to the plasma display panel according to the present invention, by forming a partition structure in which two address electrodes are allocated to one pixel, the capacitance between address electrodes can be reduced to reduce power consumption, and the number of address electrodes in the same area can be reduced. Advantageous and opaque bus electrode can be located on the partition wall has the effect of improving the luminous brightness.

In addition, the width of the other side of the first display electrode and the second display electrode is made small, while the width of the facing portion is increased, thereby reducing the capacitance of the electrode, thereby reducing the reactive power consumed in the panel and contributing to the discharge. There is an effect that the luminous efficiency is improved by generating more vacuum ultraviolet rays by increasing the electrode part to be viewed.

Claims (12)

A front substrate and a rear substrate facing each other; A partition wall formed between the front substrate and the rear substrate and partitioning a space such that three adjacent discharge cells emitting visible light of different colors form one pixel; First and second display electrodes formed on a rear surface of the front substrate and including a transparent electrode and a bus electrode; Two address electrodes are allocated to one pixel including discharge cells divided by the barrier ribs, and the widths of the transparent electrodes of the first display electrode and the transparent electrodes of the second display electrode are opposite to each other. Plasma display panel, characterized in that larger than the width. The method of claim 1, And one address electrode is commonly allocated to two selected discharge cells among the three discharge cells constituting the one pixel, and another address electrode is allocated to the other discharge cell. The method of claim 1, And the transparent electrode extends in the direction of both discharge cells separated by the partition from the upper part of the partition wall, and the bus electrode is located below the transparent electrode. The method of claim 3, wherein And the transparent electrode includes a connection part positioned on the bus electrode and electrically connected to the bus electrode, and an extension part contacting the connection part and extending in a center direction of the discharge cell. The method of claim 4, wherein And the extension portion is wider than the connection portion. The method of claim 4, wherein And the extension part has a trapezoidal shape in cross section in a direction parallel to the front substrate. The method of claim 3, wherein And the bus electrode is formed in a transverse direction along the partition wall. The method of claim 7, wherein And a discharge cell coated with phosphors of different colors bordering the bus electrode. The method of claim 4, wherein And wherein the connection part is present in the area of the discharge cell. The method of claim 4, wherein And all of the connection parts are on an upper portion of the partition wall. The method of claim 1, And the discharge cells have a hexagonal shape. The method of claim 1, And a plurality of discharge cells are repeatedly arranged along one address electrode, and each discharge cell is arranged to emit visible light of different colors.

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