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KR20060094575A - Chip On Film Package - Google Patents

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Publication number
KR20060094575A
KR20060094575A KR1020050015673A KR20050015673A KR20060094575A KR 20060094575 A KR20060094575 A KR 20060094575A KR 1020050015673 A KR1020050015673 A KR 1020050015673A KR 20050015673 A KR20050015673 A KR 20050015673A KR 20060094575 A KR20060094575 A KR 20060094575A
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South Korea
Prior art keywords
connection terminal
external connection
flat panel
chip
output unit
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KR1020050015673A
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Korean (ko)
Inventor
박상복
김형호
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신코엠 주식회사
(주) 넥스트코드
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Priority to KR1020050015673A priority Critical patent/KR20060094575A/en
Publication of KR20060094575A publication Critical patent/KR20060094575A/en
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    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F21LIGHTING
    • F21LLIGHTING DEVICES OR SYSTEMS THEREOF, BEING PORTABLE OR SPECIALLY ADAPTED FOR TRANSPORTATION
    • F21L4/00Electric lighting devices with self-contained electric batteries or cells
    • F21L4/02Electric lighting devices with self-contained electric batteries or cells characterised by the provision of two or more light sources
    • F21L4/022Pocket lamps
    • F21L4/027Pocket lamps the light sources being a LED
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F21LIGHTING
    • F21KNON-ELECTRIC LIGHT SOURCES USING LUMINESCENCE; LIGHT SOURCES USING ELECTROCHEMILUMINESCENCE; LIGHT SOURCES USING CHARGES OF COMBUSTIBLE MATERIAL; LIGHT SOURCES USING SEMICONDUCTOR DEVICES AS LIGHT-GENERATING ELEMENTS; LIGHT SOURCES NOT OTHERWISE PROVIDED FOR
    • F21K9/00Light sources using semiconductor devices as light-generating elements, e.g. using light-emitting diodes [LED] or lasers
    • F21K9/20Light sources comprising attachment means
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F21LIGHTING
    • F21VFUNCTIONAL FEATURES OR DETAILS OF LIGHTING DEVICES OR SYSTEMS THEREOF; STRUCTURAL COMBINATIONS OF LIGHTING DEVICES WITH OTHER ARTICLES, NOT OTHERWISE PROVIDED FOR
    • F21V15/00Protecting lighting devices from damage
    • F21V15/01Housings, e.g. material or assembling of housing parts
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F21LIGHTING
    • F21VFUNCTIONAL FEATURES OR DETAILS OF LIGHTING DEVICES OR SYSTEMS THEREOF; STRUCTURAL COMBINATIONS OF LIGHTING DEVICES WITH OTHER ARTICLES, NOT OTHERWISE PROVIDED FOR
    • F21V21/00Supporting, suspending, or attaching arrangements for lighting devices; Hand grips
    • F21V21/40Hand grips
    • F21V21/406Hand grips for portable lighting devices
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F21LIGHTING
    • F21VFUNCTIONAL FEATURES OR DETAILS OF LIGHTING DEVICES OR SYSTEMS THEREOF; STRUCTURAL COMBINATIONS OF LIGHTING DEVICES WITH OTHER ARTICLES, NOT OTHERWISE PROVIDED FOR
    • F21V31/00Gas-tight or water-tight arrangements
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F21LIGHTING
    • F21YINDEXING SCHEME ASSOCIATED WITH SUBCLASSES F21K, F21L, F21S and F21V, RELATING TO THE FORM OR THE KIND OF THE LIGHT SOURCES OR OF THE COLOUR OF THE LIGHT EMITTED
    • F21Y2101/00Point-like light sources
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F21LIGHTING
    • F21YINDEXING SCHEME ASSOCIATED WITH SUBCLASSES F21K, F21L, F21S and F21V, RELATING TO THE FORM OR THE KIND OF THE LIGHT SOURCES OR OF THE COLOUR OF THE LIGHT EMITTED
    • F21Y2115/00Light-generating elements of semiconductor light sources
    • F21Y2115/10Light-emitting diodes [LED]

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Optics & Photonics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Wire Bonding (AREA)

Abstract

본 발명은 패키지 구조의 단순화와 면적을 줄이기 위한 칩 온 필름 패키지에 관한 것이다.The present invention relates to a chip on film package to simplify the package structure and reduce the area.

본 발명에 의한 칩 온 필름 패키지는 플랫(Flat) 패널 구동소자 반도체가 실장되고, 내부배선에 의해 연결되는 외부연결단자 출력부와 외부연결단자의 입력부를 구비하는 칩 온 패키지에 있어서, 상기 플랫(Flat) 패널 구동소자 반도체와 내부배선에 의해 연결되는 외부연결단자 출력부의 3면이 플랫(Flat) 패널 사이즈 내에 위치하도록 구성되어 상기 플랫(Flat) 패널 후면에 접합되어지고, 외부연결단자의 입력부가 플랫(Flat) 패널 구동소자 반도체와 내부배선에 의해 연결되어짐을 특징으로 한다. In the chip-on-film package according to the present invention, a flat panel driving device semiconductor is mounted, and the chip-on package includes an external connection terminal output part connected to each other by an internal wiring and an input part of the external connection terminal. Flat panel drive element Three surfaces of the external connection terminal output portion connected by the semiconductor and the internal wiring are located within the flat panel size and are bonded to the back of the flat panel, and the input portion of the external connection terminal The flat panel driving element is connected to the semiconductor and the internal wiring.

본 발명에 의하면, 플랫(Flat) 패널의 후면에 칩 온 필름 패키지의 외부연결단자의 출력부가 플랫(Flat) 패널 사이즈 내로 위치하게 하여 구조의 단순화 및 면적을 대폭 줄여 원가 절감에 상당한 효과를 기대할 수 있다.According to the present invention, the output portion of the external connection terminal of the chip-on film package is located in the flat panel size on the rear side of the flat panel, so that the structure can be greatly simplified and the area can be significantly reduced, thereby reducing the cost. have.

칩 온 필름 패키지, 액정 디스플레이 소자, 플랫 패널 Chip On Film Packages, Liquid Crystal Display Devices, Flat Panels

Description

칩 온 필름 패키지{Chip On Film Package}Chip On Film Package

도 1은 종래의 칩 온 필름 패키지의 평면도를 도시한 것이다. 1 illustrates a plan view of a conventional chip on film package.

도 2a 내지 도 2d는 본 발명에 의한 칩 온 필름 패키지의 실시예들을 평면도로 도시한 것이다. 2A to 2D show, in plan view, embodiments of a chip on film package according to the present invention.

도 3a 내지 도 3d는 본 발명에 의한 칩 온 필름 패키지의 다른 실시예들를 도시한 것이다3A to 3D show other embodiments of the chip on film package according to the present invention.

본 발명은 씨오에프(COF) 패키지에 관한 것으로, 특히 씨오에프(COF) 패키지 구조의 단순화 및 소형화에 관한 것이다.The present invention relates to a COF package, and more particularly, to the simplification and miniaturization of the COF package structure.

최근 휴대폰의 동향은 기존의 흑백단말기에서 동영상이 구현되는 컬러 휴대폰으로 급속히 전환되고 있다. 특히 IMT-2000 및 CDMA 서비스가 본격화되면서 더욱 더 확대될 것으로 전망하고 있다. 이와 같이 휴대폰의 컬러화가 가속되면서 관련디스플레이 부품도 그와 병행하여 새로운 형태 및 개념을 요구하고 있다.Recently, the trend of mobile phones is rapidly shifting from conventional black and white terminals to color mobile phones with moving images. In particular, IMT-2000 and CDMA services are expected to expand further in earnest. As the colorization of mobile phones is accelerating, related display parts are also demanding new shapes and concepts.

휴대단말기의 경박 단소화 및 제품의 고기능화가 더욱 요구됨에 따라 핵심 부품소재의 하나인 구동소자에 있어서도 기능 및 외형적인 요구조건이 더욱 까다로워지고 있다.As the demand for thinner and shorter portable devices and higher functionalization of products are required, functional and external requirements are becoming more demanding for driving devices, which are one of the key component materials.

기존 흑백단말기에서는 구동소자부품을 주로 티씨피(TCP: Tape Carrier Package)에 의존하여 1개의 TCP로 가능했으나, 컬러 휴대폰에서는 동영상을 구현하기 위해 신호(signal 또는 channel)의 증가와 그 증가에 따른 외부 접속단자의 인접간격이 좁아져 TCP로는 구동소자의 외부단자와 유기필름 상의 내부리드를 접합하는 기술적 한계에 이르고 있다.In the existing black-and-white terminals, the driving device components were mainly possible with one TCP, depending on the Tape Carrier Package (TCP). As the adjacent spacing of the connection terminals is narrowed, the technical limit of joining the external terminal of the driving element and the inner lead on the organic film has been reached with TCP.

TCP에서는 접합가능피치가 45㎛이상이나 최근에 컬러휴대 단말기용으로 개발되는 구동소자는 40㎛ 미만이다. 또한, 고기능성 및 단순화 차원에서 유기필름 위에 수동소자를 탑재하는 것을 요구하고 있어 TCP에서는 대응하기 어렵다. 이러한 기술적 한계 때문에 도입된 것이 씨오에프(COF: Chip On Film) 패키지로 종래의 TCP에서 보다 유기필름과 동박(Cu foil)이 얇아 유연성 및 회로형성이 우수할 뿐만 아니라 수동소자를 함께 탑재할 수 있어 입/출력 신호가 많은 컬러 휴대 단말기에서 많이 쓰이고 있는 추세이다. In TCP, the junction pitch is 45 mu m or more, but recently, the driving element developed for a color portable terminal is less than 40 mu m. In addition, in order to provide high functionality and simplicity, a passive element is required to be mounted on the organic film, which is difficult to cope with TCP. Due to these technical limitations, the chip-on-film (COF) package was introduced, and the organic film and Cu foil are thinner than the conventional TCP, so that flexibility and circuit formation are excellent, and passive devices can be mounted together. Input / output signals are used in many color mobile terminals.

또한, 컬러 휴대 단말기에서는 고기능 및 여러 가지 기술적 제한과 한계 때문에 복수개의 구동소자 부품을 동일한 유기필름 위에 실장하는 것을 요구하고 있으며, 구동소자 반도체의 고집적화 및 출력수의 증가에 따라 COF 패키지의 외부연결단자 출력부의 3면을 이용하여 플랫(Flat) 패널의 외부에서 접착하는 방법을 사용하고 있다. In addition, color portable terminals require mounting of a plurality of driving device components on the same organic film due to high functionality and various technical limitations and limitations.The external connection terminal of the COF package is required due to the high integration of the driving device semiconductor and the increase in the number of outputs. The three sides of the output unit are used to bond outside of the flat panel.

도 1은 종래의 칩 온 필름 패키지의 평면도를 도시한 것이다. 1 illustrates a plan view of a conventional chip on film package.

플랫(Flat) 패널 구동소자 반도체(110)가 장착되고, 플랫(Flat) 패널(120)에 COF 패키지의 외부연결단자 출력부(131,132,133)의 3면이 접합되어지고, 피씨비(PCB) 회로기판(140)에 COF 패키지의 외부연결단자의 입력부(150)의 한 면이 접합되어 있는 상태이다. The flat panel driving device semiconductor 110 is mounted, and the three sides of the external connection terminal output parts 131, 132, 133 of the COF package are bonded to the flat panel 120, and a PCB circuit board ( 140 is a state in which one surface of the input unit 150 of the external connection terminal of the COF package is bonded.

상기 외부연결단자의 출력부(131,132,133)는 제1 외부연결단자 출력부(131), 제2 외부연결단자 출력부(132) 및 제3 외부연결단자 출력부(133)로 나뉘어져서 플랫(Flat) 패널(120)의 3면과 접합되도록 이루어진다. The output parts 131, 132, and 133 of the external connection terminal are divided into a first external connection terminal output part 131, a second external connection terminal output part 132, and a third external connection terminal output part 133 to be flat. It is made to be bonded to the three sides of the panel 120.

여기서, 상기 제1 외부연결단자 출력부(131)와 제2 외부연결단자 출력부(132)는 마주보는 위치에 있으며, 상기 제3 외부연결단자 출력부(133)는 상기 제1 외부연결단자 출력부(131) 및 제2 외부연결단자 출력부(132)와 다른 어느 한 면에 위치한다. Here, the first external connection terminal output unit 131 and the second external connection terminal output unit 132 are in a position facing each other, the third external connection terminal output unit 133 is the first external connection terminal output. Located on the other side of the unit 131 and the second external connection terminal output unit 132.

외부연결단자 입력부(150)는 상기 제3 외부연결단자 출력부(133)의 반대쪽 면에 위치한다. The external connection terminal input unit 150 is located on the opposite side of the third external connection terminal output unit 133.

하지만 도 1에서 상기 플랫(Flat) 패널(120)은 제1 외부연결단자 출력부(131), 제2 외부연결단자 출력부(132) 및 제3 외부연결단자 출력부(133)의 가장자리에 위치하여 접합이 되므로 COF 패키지의 면적이 커지는 단점이 있었다.  However, in FIG. 1, the flat panel 120 is positioned at the edge of the first external connection terminal output unit 131, the second external connection terminal output unit 132, and the third external connection terminal output unit 133. As a result of the bonding, the area of the COF package is increased.

본 발명이 이루고자 하는 기술적 과제는 칩 온 필름 패키지 구조의 단순화와 인쇄회로기판의 사용 면적을 줄이기 위한 칩 온 패키지를 제공하는 것이다.The technical problem to be achieved by the present invention is to provide a chip-on package for simplifying the chip-on-film package structure and reducing the use area of the printed circuit board.

상기 기술적 과제를 해결하기 위한 본 발명에 의한 칩 온 필름 패키지는 플랫(Flat) 패널 구동소자 반도체가 실장되고, 내부배선에 의해 연결되는 외부연결 단자 출력부와 외부연결단자의 입력부를 구비하는 칩 온 패키지에 있어서, 상기 플랫(Flat) 패널 구동소자 반도체와 내부배선에 의해 연결되는 외부연결단자 출력부의 3면이 플랫(Flat) 패널 사이즈 내에 위치하도록 구성되어 상기 플랫(Flat) 패널 후면에 접합되어지고, 외부연결단자의 입력부가 플랫(Flat) 패널 구동소자 반도체와 내부배선에 의해 연결되어짐을 특징으로 한다. Chip on film package according to the present invention for solving the above technical problem is a chip on the flat panel driving device semiconductor is mounted, and provided with an external connection terminal output unit and the input of the external connection terminal connected by the internal wiring In the package, the three sides of the external connection terminal output portion connected by the flat panel driving device semiconductor and the internal wiring is located within the flat panel size and bonded to the back of the flat panel. The input part of the external connection terminal is connected to the flat panel driving device semiconductor by the internal wiring.

또한, 상기 외부연결단자의 출력부는 상기 플랫(Flat) 패널 구동소자 반도체와 연결되는 내부배선이 3면으로 분기되어 제1 외부연결단자 출력부, 제2 외부연결단자 출력부 및 제3 외부연결단자 출력부와 연결되고, 상기 제1 외부연결단자 출력부, 제2 외부연결단자 출력부 및 제3 외부연결단자 출력부가 플랫(Flat) 패널 사이즈를 벗어나지 않는 범위 내에 위치하도록 구성되어 상기 플랫(Flat) 패널 후면의 3면과 접합되도록 이루어짐을 특징으로 한다.In addition, the output of the external connection terminal, the internal wiring connected to the flat panel driving device semiconductor is divided into three planes, the first external connection terminal output unit, the second external connection terminal output unit and the third external connection terminal It is connected to the output unit, the first external connection terminal output unit, the second external connection terminal output unit and the third external connection terminal output unit is configured to be located within the range within the flat panel size so that the flat It is characterized in that it is made to be bonded to the three sides of the back panel.

이하 도면을 참조하여 본 발명을 상세히 설명하기로 한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

도 2a 내지 도2d는 본 발명에 의한 칩 온 필름 패키지의 실시예들을 평면도로 도시한 것이다. 2A to 2D show, in plan view, embodiments of a chip on film package according to the present invention.

플랫(Flat) 패널 구동소자 반도체(210)가 장착되고, 상기 플랫(Flat) 패널 구동소자 반도체(210)와 내부배선에 의해 연결되는 외부연결단자 출력부(231, 232, 233)의 3면이 플랫(Flat) 패널(220) 후면에 접합되어지고, 외부연결단자의 입력부(250)가 플랫(Flat) 패널 구동소자 반도체(210)와 내부배선에 의해 연결되어 있는 상태이다. The flat panel driving device semiconductor 210 is mounted, and the three sides of the external connection terminal output units 231, 232, and 233 connected to the flat panel driving device semiconductor 210 by internal wiring are connected to each other. The flat panel 220 is bonded to the rear surface, and the input unit 250 of the external connection terminal is connected to the flat panel driving device semiconductor 210 by the internal wiring.

상기 칩 온 필름 패키지는 휘어지기 쉬운(flexible) 피씨비(PCB) 회로기판(240)에 의해 구현된다. The chip on film package is implemented by a flexible PCB circuit board 240.

상기 외부연결단자의 출력부(231,232,233)는 플랫(Flat) 패널 구동소자 반도체(210)와 연결되는 내부배선이 3면으로 분기되어 제1 외부연결단자 출력부(231), 제2 외부연결단자 출력부(232) 및 제3 외부연결단자 출력부(233)와 연결되어 구성되고, 상기 제1 외부연결단자 출력부(231), 제2 외부연결단자 출력부(232) 및 제3 외부연결단자 출력부(233)가 플랫(Flat) 패널(210) 사이즈를 벗어나지 않는 범위 내에 위치하도록 구성되어 상기 플랫(Flat) 패널(220) 후면의 3면과 접합된다.The output parts 231, 232, 233 of the external connection terminals have an internal wiring connected to the flat panel driving device semiconductor 210 in three planes to output the first external connection terminal output part 231 and the second external connection terminal output. It is configured to be connected to the unit 232 and the third external connection terminal output unit 233, the first external connection terminal output unit 231, the second external connection terminal output unit 232 and the third external connection terminal output The portion 233 is configured to be positioned within a range not departing from the size of the flat panel 210 to be joined to three surfaces of the rear surface of the flat panel 220.

여기서, 상기 제1 외부연결단자 출력부(231)와 제2 외부연결단자 출력부(232)는 마주보는 위치에 있으며, 상기 제3 외부연결단자 출력부(233)는 상기 제1 외부연결단자 출력부(231)와 제2 외부연결단자 출력부(232)와 다른 어느 한 면에 위치한다. Here, the first external connection terminal output unit 231 and the second external connection terminal output unit 232 are in a position facing each other, the third external connection terminal output unit 233 is the first external connection terminal output. Located on the other side of the unit 231 and the second external connection terminal output unit 232.

상기 외부연결단자 입력부(250)는 상기 제3 외부연결단자 출력부(233)의 반대쪽 면에 위치하여 플랫(Flat) 패널 구동소자 반도체(210)와 내부배선에 의해 연결된다.The external connection terminal input unit 250 is positioned on the opposite side of the third external connection terminal output unit 233 and is connected to the flat panel driving device semiconductor 210 by internal wiring.

도 2b는 상기 외부연결단자(250)가 도 2a와 다른 방향으로 위치하여 플랫(Flat) 패널 구동소자 반도체(210)와 내부배선에 의해 연결된다.2B illustrates that the external connection terminal 250 is positioned in a direction different from that of FIG. 2A and connected to the flat panel driving device semiconductor 210 by an internal wiring.

도 2c는 도 2a에서 제3 외부연결단자 출력부(233)가 없는 상태로 제1 외부연결단자 출력부(231)와 제2 외부연결단자 출력부(232)만으로 모든 신호를 전송할 수 있다.FIG. 2C may transmit all signals using only the first external connection terminal output unit 231 and the second external connection terminal output unit 232 without the third external connection terminal output unit 233 in FIG. 2A.

도 2d는 상기 외부연결단자(250)가 도 2c와 다른 방향으로 위치하여 플랫(Flat) 패널 구동소자 반도체(210)와 내부배선에 의해 연결된다. 2D illustrates that the external connection terminal 250 is positioned in a direction different from that of FIG. 2C and connected to the flat panel driving device semiconductor 210 by an internal wiring.

상기 도 2a 내지 도 2d는 칩 온 패키지의 다양한 형태를 도시한 것으로, 이외에도 다른 형태로도 응용이 가능하다. 2A to 2D illustrate various types of chip-on packages, and other applications may be applied.

도 3a 내지 도 3d는 본 발명에 의한 칩 온 필름 패키지의 다른 실시예들을 도시한 것이다3A to 3D show other embodiments of the chip on film package according to the present invention.

도 2a 내지 도 2d에 의한 칩 온 필름(COF) 패키지를 반으로 접은 형태로서, 플랫(Flat) 패널(320)의 크기로 COF 패키지의 면적을 줄일 수 있다. The chip-on-film package according to FIGS. 2A to 2D is folded in half, and the area of the COF package may be reduced by the size of the flat panel 320.

또한, 상기 칩 온 필름(COF) 패키지는 외부연결단자 입력부(350)를 상기 제1 외부연결단자 출력부(331) 및 제2 외부연결단자 출력부(332)와 같은 측면에 위치하도록 구현할 수 있다. In addition, the chip on film (COF) package may be implemented such that the external connection terminal input unit 350 is positioned on the same side as the first external connection terminal output unit 331 and the second external connection terminal output unit 332. .

이상으로, 본 발명은 도면에 도시된 실시예를 참고로 설명되었으나 이는 예시적인 것에 불과하며, 본 기술 분야의 통상의 지식을 가진 자라면 이로부터 다양한 변형 및 균등한 타 실시예가 가능하다는 점을 이해할 것이다. 따라서, 본 발명의 진정한 기술적 보호 범위는 첨부된 등록청구범위의 기술적 사상에 의해 정해져야 할 것이다.As described above, the present invention has been described with reference to the embodiments illustrated in the drawings, which are merely exemplary, and it should be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. will be. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

본 발명에 의하면, 플랫(Flat) 패널의 후면에 칩 온 패키지의 외부연결단자의 출력부가 플랫(Flat) 패널 사이즈 내로 위치하게 하여 구조의 단순화 및 면적을 대폭 줄여 원가 절감에 상당한 효과를 기대할 수 있다.According to the present invention, the output portion of the external connection terminal of the chip-on package is located in the flat panel size on the rear side of the flat panel, so that the structure can be greatly simplified and the area can be significantly reduced, thereby reducing the cost. .

Claims (5)

플랫(Flat) 패널 구동소자 반도체가 실장되고, 내부배선에 의해 연결되는 외부연결단자 출력부와 외부연결단자의 입력부를 구비하는 칩 온 필름(COF) 패키지에 있어서, In a chip-on-film (COF) package, a flat panel driving element semiconductor is mounted, and includes an external connection terminal output unit connected by an internal wiring and an input unit of an external connection terminal. 상기 플랫(Flat) 패널 구동소자 반도체와 내부배선에 의해 연결되는 외부연결단자 출력부의 3면이 플랫(Flat) 패널 사이즈 내에 위치하도록 구성되어 상기 플랫(Flat) 패널 후면에 접합되어지고, 외부연결단자의 입력부가 플랫(Flat) 패널 구동소자 반도체와 내부배선에 의해 연결되어짐을 특징으로 하는 칩 온 필름 패키지.Three surfaces of the external connection terminal output unit connected to the flat panel driving device semiconductor by the internal wiring are positioned within the flat panel size and are bonded to the back of the flat panel, and the external connection terminal A chip on film package, characterized in that the input portion of the flat panel driving element is connected to the semiconductor and the internal wiring. 제1항에 있어서, 상기 칩 온 필름 패키지는 The method of claim 1, wherein the chip on film package 휘어지기 쉬운 피씨비(PCB) 회로기판에 의해 구현되어 접을 수 있는 패키지임을 특징으로 하는 칩 온 필름 패키지. A chip-on-film package, characterized by a collapsible package implemented by a flexible PCB circuit board. 제1항에 있어서, 상기 외부연결단자의 출력부는 According to claim 1, wherein the output of the external connection terminal 상기 플랫(Flat) 패널 구동소자 반도체와 연결되는 내부배선이 3면으로 분기되어 제1 외부연결단자 출력부, 제2 외부연결단자 출력부 및 제3 외부연결단자 출력부와 연결되고, Internal wiring connected to the flat panel driving device semiconductor is branched into three surfaces and connected to a first external connection terminal output unit, a second external connection terminal output unit, and a third external connection terminal output unit, 상기 제1 외부연결단자 출력부, 제2 외부연결단자 출력부 및 제3 외부연결단자 출 력부가 플랫(Flat) 패널 사이즈를 벗어나지 않는 범위 내에 위치하도록 구성되어 상기 플랫(Flat) 패널 후면의 3면과 접합되도록 이루어짐을 특징으로 하는 칩 온 필름 패키지.The first external connection terminal output unit, the second external connection terminal output unit and the third external connection terminal output unit is configured to be positioned within a range within the flat panel size, so that the three sides of the flat panel rear surface Chip on film package, characterized in that to be bonded to. 제3항에 있어서, 상기 외부연결단자의 출력부는 According to claim 3, wherein the output of the external connection terminal 상기 플랫(Flat) 패널 구동소자 반도체와 연결되는 내부배선이 2면으로 분기되어 제1 외부연결단자 출력부 및 제2 외부연결단자 출력부와 연결되고,Internal wiring connected to the flat panel driving element semiconductor is branched into two surfaces and connected to the first external connection terminal output unit and the second external connection terminal output unit, 상기 제1 외부연결단자 출력부 및 제2 외부연결단자 출력부가 플랫(Flat) 패널 사이즈를 벗어나지 않는 범위 내에 위치하도록 구성되어 상기 플랫(Flat) 패널 후면의 2면과 접합되도록 이루어짐을 특징으로 하는 칩 온 필름 패키The first external connection terminal output unit and the second external connection terminal output chip is configured to be positioned within the range not to escape the flat panel size to be bonded to two surfaces of the rear surface of the flat panel On Film Package 제1항에 있어서, 상기 외부연결단자의 입력부는According to claim 1, wherein the input of the external connection terminal 상기 플랫(Flat) 패널이 위치하는 반대쪽 3면 중에서 어느 하나의 면에 위치하여 상기 플랫(Flat) 패널 구동소자 반도체와 연결되는 내부배선과 연결됨을 특징으로 하는 칩 온 필름 패키지. The chip on film package, characterized in that connected to the internal wiring connected to the flat panel driving device semiconductor is located on any one of the three opposite surface on which the flat panel is located.
KR1020050015673A 2005-02-25 2005-02-25 Chip On Film Package Ceased KR20060094575A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000131673A (en) * 1998-10-23 2000-05-12 Casio Comput Co Ltd Display device
KR20020075951A (en) * 2001-03-26 2002-10-09 엘지.필립스 엘시디 주식회사 packaging method of liquid crystal displays and the structure thereof
JP2004271611A (en) * 2003-03-05 2004-09-30 Pioneer Electronic Corp Flat panel display apparatus
KR20050054022A (en) * 2003-12-03 2005-06-10 삼성전자주식회사 Tape circuit substrate, semiconductor chip package using thereof, and display panel assembly using thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000131673A (en) * 1998-10-23 2000-05-12 Casio Comput Co Ltd Display device
KR20020075951A (en) * 2001-03-26 2002-10-09 엘지.필립스 엘시디 주식회사 packaging method of liquid crystal displays and the structure thereof
JP2004271611A (en) * 2003-03-05 2004-09-30 Pioneer Electronic Corp Flat panel display apparatus
KR20050054022A (en) * 2003-12-03 2005-06-10 삼성전자주식회사 Tape circuit substrate, semiconductor chip package using thereof, and display panel assembly using thereof

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