KR20040056122A - 반도체 패키지 조립방법 및 반도체 패키지 공정의보호테이프 제거장치 - Google Patents
반도체 패키지 조립방법 및 반도체 패키지 공정의보호테이프 제거장치 Download PDFInfo
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- KR20040056122A KR20040056122A KR1020020082672A KR20020082672A KR20040056122A KR 20040056122 A KR20040056122 A KR 20040056122A KR 1020020082672 A KR1020020082672 A KR 1020020082672A KR 20020082672 A KR20020082672 A KR 20020082672A KR 20040056122 A KR20040056122 A KR 20040056122A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68354—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10S156/934—Apparatus having delaminating means adapted for delaminating a specified article
- Y10S156/941—Means for delaminating semiconductive product
- Y10S156/942—Means for delaminating semiconductive product with reorientation means
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/19—Delaminating means
- Y10T156/1978—Delaminating bending means
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
- Y10T29/5313—Means to assemble electrical device
- Y10T29/53174—Means to fasten electrical component to wiring board, base, or substrate
- Y10T29/53178—Chip component
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
- Y10T29/5313—Means to assemble electrical device
- Y10T29/53191—Means to apply vacuum directly to position or hold work part
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Dicing (AREA)
- Die Bonding (AREA)
Abstract
Description
Claims (19)
- 웨이퍼 윗면에 회로영역을 보호할 수 있는 보호테이프를 부착하는 단계;상기 웨이퍼를 하부에 웨이퍼 지지용 접착테이프가 부착된 지그에 부착하는 단계;상기 웨이퍼를 절단하여 단위 칩으로 분리하는 단계;상기 개별 칩을 반도체 패키지 제조용 골격재에 접착시키는 단계;상기 반도체 패키지 제조용 골격재에서 상기 보호테이프의 접착력을 약화시키는 단계; 및상기 보호테이프를 상기 개별 칩으로부터 제거하는 단계를 포함하는 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 제1항에 있어서, 상기 보호테이프를 부착하는 단계 이후에 상기 웨이퍼의 밑면을 연마하는 단계를 더 수행하는 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 제1항에 있어서, 상기 밑면이 연마된 웨이퍼의 두께는 200㎛이하인 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 제1항에 있어서, 상기 반도체 패키지 제조용 골격재는 리드(lead)를 외부연결단자로 사용하는 리드프레임인 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 제1항에 있어서, 상기 반도체 패키지 제조용 골격재는 솔더볼을 외부연결단자로 사용하는 기판인 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 제1항에 있어서, 상기 보호 테이프의 접착력은 자외선에 의하여 약화되는 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 제1항에 있어서, 상기 보호테이프의 접착력은 열에 의하여 약화되는 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 제1항에 있어서, 상기 보호테이프는 상기 칩의 패턴을 인식할 수 있도록 투명한 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 제1항에 있어서, 상기 보호테이프의 두께는 500㎛이하인 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 제9항에 있어서, 상기 보호테이프의 두께는 상기 웨이퍼가 얇아질수록 얇은 것을 사용하는 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 제9항에 있어서, 상기 보호테이프의 두께는 상기 웨이퍼가 두꺼워질수록 두꺼운 것을 사용하는 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 제1항에 있어서, 상기 보호테이프를 개별 칩마다 제거하는 방법은 진공으로 흡착하여 제거하는 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 제1항에 있어서, 상기 보호테이프를 개별 칩마다 제거하는 방법은 접착제가 도포된 릴리즈 테이프를 압착핀으로 압착하여 제거하는 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 제1항에 있어서, 상기 보호 보호테이프를 개별 칩마다 제거하는 방법은 접착제가 도포된 릴리즈 테이프를 평활한 압착면을 가진 압착롤러로 압착하여 제거하는 것을 특징으로 하는 개별 칩으로부터 보호테이프를 제거하는 반도체 패키지 조립방법.
- 보호테이프가 부착된 개별 칩이 탑재된 반도체 패키지 제조용 골격재를 로딩하는 몸체;상기 골격재의 상부에 위치하여 상기 보호테이프를 접착시켜 제거하는 릴리즈테이프;상기 릴리즈테이프를 상기 보호테이프에 부착시키는 압착수단;상기 골격재의 상부에 위치하여 상기 릴리즈테이프를 공급하는 공급롤; 및상기 골격재의 상부에 위치하여 상기 릴리즈테이프를 권취하는 권취롤을 포함하는 것을 특징으로 하는 반도체 패키지 공정의 보호테이프 제거장치.
- 제15항에 있어서, 상기 릴리즈테이프의 일면에는 접착제가 도포된 것을 특징으로 하는 반도체 패키지 공정의 보호테이프 제거장치.
- 제15항에 있어서, 상기 압착수단은 아래로 이동하여 상기 릴리즈테이프에 상기 보호테이프를 압착하는 압착핀인 것을 특징으로 하는 반도체 패키지 공정의 보호테이프 제거장치.
- 제15항에 있어서, 상기 압착수단은 회전하면서 상기 릴리즈테이프에 상기 보호테이프를 압착하는 압착면을 가진 압착롤러인 것을 특징으로 하는 반도체 패키지 공정의 보호테이프 제거장치.
- 제15항에 있어서, 상기 공급롤과 상기 권취롤 사이에 상기 릴리즈테이프의 장력을 유지하기 위한 가이드롤러를 더 구비하는 것을 특징으로 하는 반도체 패키지 공정의 보호테이프장치.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2002-0082672A KR100486290B1 (ko) | 2002-12-23 | 2002-12-23 | 반도체 패키지 조립방법 및 반도체 패키지 공정의보호테이프 제거장치 |
US10/621,576 US7129118B2 (en) | 2002-12-23 | 2003-07-18 | Protective tape removing apparatus and method of assembling semiconductor package using the same |
JP2003417231A JP2004207719A (ja) | 2002-12-23 | 2003-12-15 | 半導体パッケージの組立て方法及び半導体パッケージ工程の保護テープの除去装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2002-0082672A KR100486290B1 (ko) | 2002-12-23 | 2002-12-23 | 반도체 패키지 조립방법 및 반도체 패키지 공정의보호테이프 제거장치 |
Publications (2)
Publication Number | Publication Date |
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KR20040056122A true KR20040056122A (ko) | 2004-06-30 |
KR100486290B1 KR100486290B1 (ko) | 2005-04-29 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR10-2002-0082672A Expired - Fee Related KR100486290B1 (ko) | 2002-12-23 | 2002-12-23 | 반도체 패키지 조립방법 및 반도체 패키지 공정의보호테이프 제거장치 |
Country Status (3)
Country | Link |
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US (1) | US7129118B2 (ko) |
JP (1) | JP2004207719A (ko) |
KR (1) | KR100486290B1 (ko) |
Cited By (4)
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KR100921952B1 (ko) * | 2008-02-28 | 2009-10-15 | 주식회사 힘스 | 반도체칩 카트리지와 이를 이용한 본딩장치 |
US8513793B2 (en) | 2010-07-16 | 2013-08-20 | Samsung Electronics Co., Ltd. | Stacked semiconductor package and method of fabricating the same |
KR101879029B1 (ko) * | 2016-01-22 | 2018-07-16 | 양진석 | 선택적 전사방식에 의한 칩 이송장치 및 이송방법 |
KR102158450B1 (ko) * | 2020-06-08 | 2020-09-22 | (주)네온테크 | 전자부품 분리장치 및 분리방법 |
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KR100532287B1 (ko) * | 2003-09-17 | 2005-11-29 | 삼성전자주식회사 | 휴대용 카메라 모듈의 미세 이물질 제거 장치 및 방법 |
US7265032B2 (en) * | 2003-09-30 | 2007-09-04 | Intel Corporation | Protective layer during scribing |
US7465368B2 (en) * | 2003-12-24 | 2008-12-16 | Intel Corporation | Die molding for flip chip molded matrix array package using UV curable tape |
US6974726B2 (en) * | 2003-12-30 | 2005-12-13 | Intel Corporation | Silicon wafer with soluble protective coating |
US7169691B2 (en) * | 2004-01-29 | 2007-01-30 | Micron Technology, Inc. | Method of fabricating wafer-level packaging with sidewall passivation and related apparatus |
US20050249945A1 (en) * | 2004-05-10 | 2005-11-10 | Wen Kun Yang | Manufacturing tool for wafer level package and method of placing dies |
US20060289966A1 (en) * | 2005-06-22 | 2006-12-28 | Dani Ashay A | Silicon wafer with non-soluble protective coating |
JP4739900B2 (ja) * | 2005-10-13 | 2011-08-03 | リンテック株式会社 | 転着装置及び転着方法 |
US8153464B2 (en) * | 2005-10-18 | 2012-04-10 | International Rectifier Corporation | Wafer singulation process |
JP2007235068A (ja) * | 2006-03-03 | 2007-09-13 | Tokyo Seimitsu Co Ltd | ウェーハ加工方法 |
TW200832532A (en) * | 2007-01-23 | 2008-08-01 | Advanced Semiconductor Eng | Method for cutting a wafer and method for manufacturing semiconductor package by using multiple tape |
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-
2002
- 2002-12-23 KR KR10-2002-0082672A patent/KR100486290B1/ko not_active Expired - Fee Related
-
2003
- 2003-07-18 US US10/621,576 patent/US7129118B2/en not_active Expired - Lifetime
- 2003-12-15 JP JP2003417231A patent/JP2004207719A/ja active Pending
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KR100921952B1 (ko) * | 2008-02-28 | 2009-10-15 | 주식회사 힘스 | 반도체칩 카트리지와 이를 이용한 본딩장치 |
US8513793B2 (en) | 2010-07-16 | 2013-08-20 | Samsung Electronics Co., Ltd. | Stacked semiconductor package and method of fabricating the same |
KR101879029B1 (ko) * | 2016-01-22 | 2018-07-16 | 양진석 | 선택적 전사방식에 의한 칩 이송장치 및 이송방법 |
KR102158450B1 (ko) * | 2020-06-08 | 2020-09-22 | (주)네온테크 | 전자부품 분리장치 및 분리방법 |
Also Published As
Publication number | Publication date |
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US20040121514A1 (en) | 2004-06-24 |
KR100486290B1 (ko) | 2005-04-29 |
JP2004207719A (ja) | 2004-07-22 |
US7129118B2 (en) | 2006-10-31 |
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