[go: up one dir, main page]

KR20020010393A - A Multi-Drop Communication Devices of Full Duplex - Google Patents

A Multi-Drop Communication Devices of Full Duplex Download PDF

Info

Publication number
KR20020010393A
KR20020010393A KR1020000044095A KR20000044095A KR20020010393A KR 20020010393 A KR20020010393 A KR 20020010393A KR 1020000044095 A KR1020000044095 A KR 1020000044095A KR 20000044095 A KR20000044095 A KR 20000044095A KR 20020010393 A KR20020010393 A KR 20020010393A
Authority
KR
South Korea
Prior art keywords
communication
gate
port
output
present
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1020000044095A
Other languages
Korean (ko)
Inventor
정기철
Original Assignee
성주호
(학)창성학원
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 성주호, (학)창성학원 filed Critical 성주호
Priority to KR1020000044095A priority Critical patent/KR20020010393A/en
Publication of KR20020010393A publication Critical patent/KR20020010393A/en
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22Microcontrol or microprogram arrangements
    • G06F9/226Microinstruction function, e.g. input/output microinstruction; diagnostic microinstruction; microinstruction format
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4286Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a handshaking protocol, e.g. RS232C link

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Bidirectional Digital Transmission (AREA)
  • Communication Control (AREA)

Abstract

본 발명은 멀티드롭 통신장치에 관한 것으로, 특히 마이크로 프로세서를 이용하여 소프트웨어적으로 통신경로를 선택함으로서 RS232C와 RS485C의 통신포트를 선택하여 수신전용과 송신전용을 설정하고자 하는 것이다. 따라서, 본 발명은 통신포트를 소프트웨어적으로 선택하여 통신회로의 신뢰성과 신호의 검출을 효과적으로 해결하기 위한 양방향 멀티드롭 통신장치에 관한 것이다. 이를 위해, 프로그램적으로 제어하여 통신의 경로를 설정하는 제어부와; 상기 제어부에 출력되는 컨트롤 비트에 따라 입출력을 제어하는 게이트부와; 및 상기 게이트부의 출력에 따라 통신포트를 설정하고 입출력되는 포트부로 구성되는 것이 특징이다.The present invention relates to a multi-drop communication apparatus, and in particular, to select a communication port of RS232C and RS485C by selecting a communication path by software using a microprocessor to set up a reception-only and a transmission-only. Accordingly, the present invention relates to a bidirectional multidrop communication apparatus for effectively solving communication circuit reliability and signal detection by selecting a communication port in software. To this end, the control unit for controlling the program setting the path of communication; A gate unit controlling input / output according to a control bit output to the controller; And a port unit configured to set a communication port according to the output of the gate unit, and to input / output a gate.

Description

양방향 멀티드롭 통신장치{A Multi-Drop Communication Devices of Full Duplex}A Multi-Drop Communication Devices of Full Duplex}

본 발명은 양방향 멀티드롭 통신장치에 관한 것으로, 보다 상세하게는 통신 경로설정을 소프트웨어적으로 RS232C와 RS485C포트를 선택하여 수신과 송신을 설정하여 처리함으로서 통신포트의 신뢰성과 신호의 검출을 효과적으로 해결하도록 하는 것을 특징으로 하는 양방향 멀티드롭 통신장치에 관한 것이다.The present invention relates to a bi-directional multidrop communication device, and more particularly, by selecting the RS232C and RS485C ports to set the reception and transmission in the communication path setting by software to effectively solve the reliability of the communication port and signal detection. The present invention relates to a bidirectional multidrop communication apparatus.

현재 사용되는 마이크로 콘트롤러는 하나의 통신포터만 적용하여 사용되고 있으나, 이러한 종래의 통신장치로는 RS232C 및 RS484을 선택하기 위해서는 통신포트를 확장하거나 별도의 통신장치를 첨부하여 회로를 설계 하기가 어렵다. 또한, 통신포트의 경로설정이 떨어지고 통신포트를 확장하기가 불가능하여 신뢰성과 신호의 검출이 효과적이지 못하는 문제점 초래된다.The microcontroller currently used is used by applying only one communication port, but it is difficult to design a circuit by extending a communication port or attaching a separate communication device to select RS232C and RS484 as a conventional communication device. In addition, since the routing of the communication port is reduced and the communication port cannot be extended, reliability and signal detection are not effective.

본 발명은 상기와 같은 문제점을 해결코자 하는 것으로, 본 발명의 목적은, 마이크로프로세서를 소프트웨어적으로 통신포트를 선택하는 것으로서 RS232C와 RS485의 통신포트를 선택하여 양방향 송수신을 가능하도록 하는 양방향 멀티드롭 통신장치를 제공하는 것이다.The present invention is to solve the above problems, an object of the present invention is to select the communication port of the microprocessor in software, the two-way multi-drop communication to enable the two-way transmission and reception by selecting the communication port of RS232C and RS485 To provide a device.

상기 목적을 달성하기 위한 구성으로, 프로그램적으로 제어하여 통신의 경로를 설정하는 마이크로프로세서(1)와; 상기 마이크로프로세서(1)에 출력되는 컨트롤 비트에 따라 입출력을 제어하는 게이트부(6)와; 및 상기 게이트부(6)의 출력에 따라 통신포트를 설정하고 입출력되는 포트부(7)로 구성되는 것을 특징으로 하는 양방향 멀티드롭 통신장치에 의해 달성된다.A microprocessor (1) for establishing a path of communication by controlling programmatically in a configuration for achieving the above object; A gate part 6 for controlling input and output according to a control bit output to the microprocessor 1; And a port unit 7 which sets a communication port in accordance with the output of the gate unit 6 and inputs and outputs it.

아울러, 상기 포트부(3)는 RS232포트와 RS485포트인 것이 바람직하다.In addition, the port 3 is preferably an RS232 port and an RS485 port.

본 발명의 그 밖의 목적, 특정한 장점들 및 신규한 특징들은 첨부된 도면들과 연과되어지는 이하의 상세한 설명과 바람직한 실시예들로 부터 더욱 분명해질 것이다.Other objects, specific advantages and novel features of the present invention will become more apparent from the following detailed description and the preferred embodiments which are connected with the accompanying drawings.

도 1은 일실시예에 따른 양방향 멀티드롭 통신장치를 나타내는 구성도이다.1 is a block diagram illustrating a bidirectional multidrop communication apparatus according to an exemplary embodiment.

<도면의 주요부분에 대한 부호의 설명><Description of the symbols for the main parts of the drawings>

1: 마이크로 프로세서 2: 인버터1: microprocessor 2: inverter

3a: 제 1 AND게이트 3b: 제 2 AND게이트3a: first AND gate 3b: second AND gate

3c: 제 3 AND게이트 3d: 제 4 AND게이트3c: third AND gate 3d: fourth AND gate

4: RS232C 5a: 제 1 RS4854: RS232C 5a: 1st RS485

5b: 제 2 RS485 6: 게이트부5b: 2nd RS485 6: gate portion

7: 포트부7: Port part

이하에서 본 발명의 바람직한 실시예를 첨부된 도면에 의거 상세히 설명하기로 한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

도 1은 본 발명의 일실시예에 따른 양방향 멀티드롭 통신장치를 나타나는 구성도이다. 도 1에 도시된 바와 같이, 마이크로프로세서(1)에 출력되는 컨트롤비트는 게이트부(6)의 제 1 AND게이트(3a), 제 2 AND게이트(3b)에 접속되고, 상기 컨트롤비트는 컨버터(2)를 통해 출력되어 제 3 AND게이트(3c), 제 4 AND게이트(3d)에 접속시킨다. 그리고 TXD는 상기 제 1 AND게이트(3a), 상기 제 3 AND게이트(3c)에 입력하며, 상기 RXD는 상기 제 2 AND게이트(3b), 상기 제 4 AND게이트(3d)에 출력되어 접속된다.1 is a block diagram showing a bi-directional multi-drop communication apparatus according to an embodiment of the present invention. As shown in FIG. 1, the control bits output to the microprocessor 1 are connected to the first AND gate 3a and the second AND gate 3b of the gate portion 6, and the control bits are connected to the converter ( It is output through 2) and connected to the 3rd AND gate 3c and the 4th AND gate 3d. TXD is input to the first AND gate 3a and the third AND gate 3c, and the RXD is output to and connected to the second AND gate 3b and the fourth AND gate 3d.

또한, 상기 제 1 AND게이트(3a)의 출력이 포트부(7)의 RS232C(4)와 접속되고, 상기 RS232C(4)는 상기 제 2 AND게이트(3b)의 입력에 접속된다. 그리고, 상기 제 3 AND게이트(3c)의 출력은 제 1 RS485(5a)와 접속되며 제 2 RS485(5b)는 상기 제 4 AND게이트(3d)에 입력된다.Further, the output of the first AND gate 3a is connected to the RS232C 4 of the port portion 7, and the RS232C 4 is connected to the input of the second AND gate 3b. The output of the third AND gate 3c is connected to the first RS485 5a and the second RS485 5b is input to the fourth AND gate 3d.

이하에서는 양방향 멀티드롭의 통신작용을 나타낸다.Hereinafter, a bidirectional multidrop communication operation will be described.

프로그램적으로 제어하여 통신의 경로를 설정하는 마이크로프로세서(1)에서 RS232C를 사용하고자 한다면 컨트롤비트에 1 즉"high"로 주게 된다. 그러면, 제 1 AND게이트(3a)와 마이크프로세서(1)에서 출력되는 TXD신호가 제 1 AND게이트(3a)에서 통과시켜주게 된다. 그리고, 외부에서 입력되는 RDX신호인 RS232C는 제 2 AND게이트(3b)를 거치게 된다. 따라서 컨트롤비트가 1 이면 통신포트는 RS232C 전용포트가 된다.If you want to use RS232C in the microprocessor (1) to programmatically control and set the path for communication, give 1, "high" to the control bit. Then, the TXD signal output from the first AND gate 3a and the microphone processor 1 is passed through the first AND gate 3a. RS232C, which is an RDX signal input from the outside, passes through the second AND gate 3b. Therefore, if control bit is 1, communication port becomes dedicated port of RS232C.

또한, 컨트롤비트가 0이 되면 게이트부(2)의 제 1 AND게이트(3a)와 제 2 AND게이트(3b)는 입력신호에 상관없이 출력이 0으로 만들어 준다. 따라서, 실제적으로 RS232C 포트는 인버터(2)를 통하여 제 3 AND게이트(3c)와 제 4 AND게이트(3b)를 동작시켜 TXD와 RXD로 출력하면 포트부(7)의 제 1 RS485(5a)에서는 송신되고, 제 2 RS485(5b)에서는 수신된다. 그리고, 제 1 RS485와 제 2 RS485는 반가산기로 동작되어 송수신을 동시에 할 수 있다.In addition, when the control bit becomes 0, the output of the first AND gate 3a and the second AND gate 3b of the gate unit 2 is zero regardless of the input signal. Therefore, the RS232C port actually operates the third AND gate 3c and the fourth AND gate 3b through the inverter 2 and outputs the TXD and the RXD to the first RS485 5a of the port 7. Is transmitted, and is received at the second RS485 5b. In addition, the first RS485 and the second RS485 may be operated as a half adder to simultaneously transmit and receive.

이상에서 상술한 바와같이 본 발명에 따른 양방향 멀티드롭 통신장치에 의하면, 프로그램적으로 RS232C와 RS485의 통신포트를 선택함으로서 송수신을 동시에 설정 가능케하는 효과를 얻을 수 있다.As described above, according to the bidirectional multidrop communication apparatus according to the present invention, it is possible to obtain the effect of enabling simultaneous transmission and reception by selecting the communication ports of RS232C and RS485 programmatically.

이러한 본 발명에 의한 양방향 멀티드롭 통신장치은 소프트웨어적으로 효율적으로 포트를 선택하는 것으로, 신뢰성과 신호의 검출을 효과적으로 이끌어낼 수 있는 특징을 가지고 있다.The bidirectional multidrop communication apparatus according to the present invention has a feature of effectively selecting a port by software and effectively inducing reliability and signal detection.

비록, 본 발명이 상기에서 언급한 바람직한 실시예와 관련하여 설명되어졌지만, 본 발명의 요지와 범위로 부터 벗어남이 없이 다른 다양한 수정 및 변형이 가능할 것이다. 따라서, 첨부된 청구의 범위는 본 발명의 진정한 범위내에 속하는 그러한 수정 및 변형을 포함할 것이라고 여겨진다.Although the present invention has been described in connection with the above-mentioned preferred embodiments, various other modifications and variations may be made without departing from the spirit and scope of the invention. Accordingly, it is intended that the appended claims cover such modifications and variations as fall within the true scope of the invention.

Claims (2)

양방향 멀티드롭 통신장치에 있어서,In the bidirectional multidrop communication device, 프로그램적으로 제어하여 통신의 경로를 설정하는 마이크로프로세서(1)와;A microprocessor (1) programmatically controlling and establishing a path of communication; 상기 마이크로프로세서(1)에 출력되는 컨트롤 비트에 따라 입출력을 제어하는 게이트부(6)와; 및A gate part 6 for controlling input and output according to a control bit output to the microprocessor 1; And 상기 게이트부(6)의 출력에 따라 통신포트를 설정하고 입출력되는 포트부(7)로 구성되는 것을 특징으로 하는 양방향 멀티드롭 통신장치.Bidirectional multi-drop communication device characterized in that the communication port is configured to set the communication port in accordance with the output of the gate (6) input and output. 상기 제 1항에 있어서, 상기 포트부(7)는 RS232포트와 RS485포트인 것을 특징으로 하는 양방향 멀티드롭 통신장치.2. The bidirectional multidrop communication device according to claim 1, wherein the port part (7) is an RS232 port and an RS485 port.
KR1020000044095A 2000-07-29 2000-07-29 A Multi-Drop Communication Devices of Full Duplex Ceased KR20020010393A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020000044095A KR20020010393A (en) 2000-07-29 2000-07-29 A Multi-Drop Communication Devices of Full Duplex

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020000044095A KR20020010393A (en) 2000-07-29 2000-07-29 A Multi-Drop Communication Devices of Full Duplex

Publications (1)

Publication Number Publication Date
KR20020010393A true KR20020010393A (en) 2002-02-04

Family

ID=19680832

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020000044095A Ceased KR20020010393A (en) 2000-07-29 2000-07-29 A Multi-Drop Communication Devices of Full Duplex

Country Status (1)

Country Link
KR (1) KR20020010393A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0651881A (en) * 1992-07-28 1994-02-25 Matsushita Electric Works Ltd Communication unit
US5349685A (en) * 1992-05-05 1994-09-20 The United States Of America As Represented By The Secretary Of The Navy Multipurpose bus interface utilizing a digital signal processor
JPH08123745A (en) * 1994-10-25 1996-05-17 Oki Electric Ind Co Ltd Information processor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5349685A (en) * 1992-05-05 1994-09-20 The United States Of America As Represented By The Secretary Of The Navy Multipurpose bus interface utilizing a digital signal processor
JPH0651881A (en) * 1992-07-28 1994-02-25 Matsushita Electric Works Ltd Communication unit
JPH08123745A (en) * 1994-10-25 1996-05-17 Oki Electric Ind Co Ltd Information processor

Similar Documents

Publication Publication Date Title
KR20020010393A (en) A Multi-Drop Communication Devices of Full Duplex
JP2005522938A5 (en)
SE9801674D0 (en) Application specific integrated circuit and transceiver circuit
KR19990065297A (en) Method and device for data transmission between micom and main system
KR100628450B1 (en) Programmable controller
KR100218364B1 (en) Data line sharing circuit
KR0127877Y1 (en) Communication system with rs-485/rs-232 converter
KR100275705B1 (en) Data transmitting/receiving system
KR100493267B1 (en) PSTN, ISDN common interface device
KR100962306B1 (en) Bidirectional Data Communication Device of Embedded System and Its Method
KR100263978B1 (en) Built-in multi modem system
KR100218363B1 (en) Data line sharing circuit
KR970016373A (en) Operation control device of air conditioner
KR20080020018A (en) System-on-chip for power line communication control.
KR20110022802A (en) Receiving device for wireless mouse equipped with wireless modem and control method thereof
KR100581151B1 (en) Wireless dsp board
KR0128049B1 (en) Keyboard interface device
SU1608724A1 (en) Device for exchange of discrete information
JPS6225542A (en) Communication equipment
KR890002754A (en) Protocol Inverter and Conversion Control Method
JPH05183970A (en) Communication control means
KR20020080933A (en) Remote Controler Using All at Once Wire and Wireless
KR980004318A (en) Asynchronous Transmit and Receive Unit (UART)
KR19990002305A (en) Multiport Circuit in the Central Processing Unit (CPU)
JP2004005127A (en) Communication control device

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20000729

PA0201 Request for examination
PG1501 Laying open of application
E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20020329

Patent event code: PE09021S01D

E601 Decision to refuse application
PE0601 Decision on rejection of patent

Patent event date: 20021204

Comment text: Decision to Refuse Application

Patent event code: PE06012S01D

Patent event date: 20020329

Comment text: Notification of reason for refusal

Patent event code: PE06011S01I