KR20010090944A - method of driving a plasma display panel having delta type elements and the driving device - Google Patents

Abstract

The present invention provides a method and apparatus for driving a pair scan of a plasma display panel having a delta pixel structure in an AC plasma display panel having a delta pixel structure.

The pair scan driving method comprises: dividing one field into a plurality of subfields, each of the subfields assigns a specific number of sustain discharge pulses, and implements desired gradation display by a combination of lighting of each subfield; Each of the plurality of subfields includes a reset period for making the discharge conditions of all the cells R, G, and B uniform, an address period for specifying the cells R, G, and B to be displayed according to an input signal, and And a sustain discharge period for applying sustain discharge pulses to the specified designated cells by a specific number assigned to the corresponding subfields so that sustain discharge pulses can be superimposed on the wall charges on the dielectric covering the display electrode; The Y electrode pairs Y ₁ , Y ₂ ; Y ₃ , Y _{4 that} are applied with signal pulses to the address electrodes R, G, and B according to an input data signal in the address period, and are electrically connected to each other at the same time; By sequentially applying scan pulses of the same phase to…), cells related to two Y electrodes are simultaneously addressed.

Description

Method of driving a plasma display panel having a delta type pixel structure delta type elements and the driving device

The present invention relates to a pair scan driving method and a driving apparatus for a plasma display panel having a delta pixel structure, and more particularly, to an AC plasma display panel having a delta pixel structure, a delta type capable of simplifying a driving circuit. A pair scan driving method and a driving apparatus for a plasma display panel having a pixel structure.

1 and 2 are schematic plan views and cross-sectional views for explaining the configuration of the plasma display panel. As shown in FIGS. 1 and 2, the plasma display panel includes an X electrode 3 and a Y electrode ( A front electrode group formed of 4) is formed on the front substrate 1, and a dielectric layer 6 is formed thereon. In addition, an address electrode 5 is formed on the opposite rear substrate 2 of the front substrate 1, a dielectric layer 7 is formed thereon, and a fluorescent layer 9 is formed between the partitions 8. .

In the driving method of the plasma display panel configured as described above, as illustrated in FIG. 3, one field is divided into, for example, first to eighth subfields for gray scale display, and each subfield is divided into a reset period, Each subfield has a specific sustain period, and the combination of each of the subfields displays the gray level of the video screen.

In the reset period of each subfield, as shown in FIG. 3, the front write pulse Vw is applied to the X electrodes commonly connected to cause all cells to be full write discharge. The wall charges are accumulated on the dielectric layers covering the X electrodes and the Y electrodes by this front surface discharge, that is,-charges are accumulated on the X electrodes, and + charges are accumulated on the Y electrodes. Next, a gradually increasing priming erase pulse is applied to further initialize cells completely by further discharging cells whose wall charges are not completely erased by non-uniformity of the cells. Such an initialization process may be included for each subfield when gray level is expressed by dividing one field into a plurality of subfields, or may be applied to only one subfield to reduce background luminance to improve contrast.

In general, when a gray level is expressed by dividing one field into a plurality of subfields, for example, eight subfields, the contrast ratio indicates that the sustain pulse is not applied to each subfield and the sustain pulse assigned to each subfield. It is determined as the ratio of all displayed states. Therefore, since the contrast ratio is determined by the minimum luminance and the highest luminance ratio of one field, the contrast can be increased by lowering the minimum luminance, that is, the background luminance.

After the reset period, a data pulse is applied to the address electrodes 5 and one scan pulse is sequentially applied to the Y electrodes 4 in order to designate cells to be displayed according to an input signal in the address period. . As a result, address discharge is generated between the address electrode to which the data pulse is applied and the Y electrode 4 to which the scan pulse is applied to generate wall charges on the dielectric layer.

After the address period, in the sustain discharge period, an alternating sustain pulse is applied between the X electrode 3 and the Y electrode 4 so that the sustain pulse and the wall charge overlap in the cell where the wall charge is accumulated in the address period, thereby performing sufficient sustain discharge. In the case where the wall charges are not accumulated, sustain discharge does not occur only by the sustain discharge pulse. Such a function is called a memory function of an AC type surface discharge plasma display panel.

The conventional plasma display panel has a simple matrix method, that is, a structure in which cells are formed at intersections of address electrodes and scan electrodes that cross each other. As shown in Fig. 4, in the stripe cell structure, the partition wall has a stripe or lattice-shaped partition wall, and RGB cells are adjacent to each other vertically and horizontally. In the address period of the plasma display panel having such a structure, scan pulses having different timings must be sequentially applied to each of the Y electrodes. That is, simultaneously applying scan pulses to two or more vertically adjacent Y electrodes means that the cells for two or more Y electrodes cannot be separately addressed. Therefore, each of the Y electrodes requires expensive scan ICs. For example, since a plasma display panel having 480 scan lines (Y electrodes) requires 480 scan ICs, there is a limit in driving characteristics in reducing the manufacturing cost of the plasma display panel.

Recently, as shown in FIG. 6, a new structure, a structure in which hexagonal shape unit cells are arranged in an order in order to enlarge the unit cell area (IDW '99), has been proposed. In this structure, hexagonal cells are arranged in a delta to form one pixel, and each hexagonal cell is continuously arranged horizontally and vertically shifted left and right. In the plasma display panel having the delta pixel R, G, and B structures, the scan electrodes Y1, Y2, Y3, ... are individually scanned as in the plasma display panel having the stripe-shaped cell structure. ICs are connected to perform address driving. As a result, it is useful as a structure for increasing the unit area of individual cells, but since the scan IC required for driving is the same as the conventional method, it is difficult to reduce the manufacturing cost.

Accordingly, an object of the present invention is to solve such a problem. In the AC plasma display panel having a delta pixel structure, a pair scan driving method and a driving apparatus for a plasma display panel having a delta pixel structure can be simplified. The purpose is to provide.

1 is a schematic partial plan view for explaining a configuration of a general plasma display panel;

2 is a schematic partial cross-sectional view for explaining the configuration of a general plasma display panel;

3 is a pulse waveform diagram for explaining a method of driving a conventional plasma display panel;

4 is a schematic partial plan view illustrating the structure of a plasma display panel of a conventional stripe pixel structure;

5 is a schematic partial plan view illustrating a structure of a plasma display panel having a delta pixel structure;

6 is a schematic partial plan view of a plasma display panel of a delta type pixel structure for a pair scan driving method according to an embodiment of the present invention;

7 is a waveform diagram illustrating a pair scan driving method of a plasma display panel having a delta pixel structure according to an embodiment of the present invention;

8 is a schematic partial plan view of a plasma display panel of a delta type pixel structure for a pair scan driving method according to another embodiment of the present invention;

9 is a waveform diagram illustrating a pair scan driving method of a plasma display panel having a delta pixel structure according to another embodiment of the present invention;

10 is a schematic partial plan view of a plasma display panel of a delta type pixel structure for a pair scan driving method according to another embodiment of the present invention;

<Description of the symbols for the main parts of the drawings>

1: front board 2: back board

3: X electrode 3 ', 4': bus electrode

3 ", 4": black matrix 4: Y electrode

5: address electrode 7: dielectric layer

8: bulkhead 9: fluorescent layer

18: hexagonal bulkhead R, G, B: cell

In order to achieve the above object, a pair scan driving method of a plasma display panel of a delta type pixel structure according to an embodiment of the present invention includes a plurality of electrodes including X electrodes and Y electrodes formed on one surface of a front substrate. For example, a plurality of display electrode pairs including one X electrode and one Y electrode adjacent to each other, and a plurality of address electrodes formed on one surface of an opposite side rear substrate of the front substrate to intersect the plurality of display electrode pairs of the front substrate Barrier ribs defining adjacent discharge cells between the front substrate and the rear substrate; first intersection points constituting the discharge cell among the intersections of display electrode pairs on the front substrate and address electrodes on the rear substrate; Plasma display panel including second crossing points not constituting discharge cells adjacent to each other, and a phosphor layer formed between the partition walls A driving method of the method comprising: dividing one field into a plurality of subfields, each of the subfields assigns a specific number of sustain discharge pulses, and implements a desired gradation display by a combination of lighting of the respective subfields; Each of the plurality of subfields is maintained in overlap with a reset period for equalizing discharge conditions of all cells, an address period for designating cells to be displayed according to an input signal, and a wall charge on a dielectric covering the display electrode. And a sustain discharge period for applying sustain discharge pulses capable of performing discharge to the designated cells as many as a specific number assigned to the corresponding subfield; Two adjacent Y electrodes among the Y electrodes are electrically connected in pairs, and a scan pulse is applied to two Y electrode pairs electrically connected in the address period.

Each of the address electrodes is divided into two, and at the same time, by applying scan pulses to the upper two Y electrodes and the lower two Y electrodes, the scan time can be shortened and the driving circuit can be further simplified.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

6 shows a plasma display panel of a delta type pixel structure for a pair scan driving method according to an embodiment of the present invention as a schematic plan view, and FIG. 7 shows a plasma of a delta type pixel structure according to an embodiment of the present invention. The waveform diagram for the pair scan driving method of the display panel is shown.

6 and 8, the phosphor layer 9 is formed in the partition wall 18 and the hexagonal cell, which form the hexagonal cell having the same structure as in FIG. 5. A plurality of display electrode groups 3 and 4 composed of the X electrodes 3 and the Y electrodes 4 formed on one surface of the front substrate 1, and the display electrode groups 3 and 4. And a plurality of address electrodes 5 formed on one surface of the opposite side rear substrate 2 of the front substrate 1 so as to cross each other. In addition, intersections of the display electrode groups 3 and 4 on the front substrate 1 and the address electrodes 5 on the rear substrate 2 are formed, and these intersections are discharged as shown in FIGS. 6 and 8. First intersecting points R, G, and B constituting the cell and second intersecting points that do not form a discharge cell adjacent to the first intersecting point. That is, the first intersection point and the second intersection point are alternately formed in the vertical direction extending in the address electrodes A1, A2, A3,... As a result, three hexagonal cells R, G, and B forming a delta form one pixel.

Referring to Figure 6 describes the driving method as follows. In general, for the gradation expression, one frame is divided into a plurality of subfields, each subfield is assigned a specific number of sustain discharge pulses, and the gray of each subfield is combined to express gradation. Each of the plurality of subfields specifies a reset period for applying a high front write voltage of 350 V or more to the X electrode and a cell to be displayed according to an input signal as shown in FIG. A sustain discharge is performed by applying a data voltage to the data electrodes A1, A2, A3 ... and an address period for applying a scan pulse to the Y electrodes, and a wall charge on the dielectric covering the display electrode. The sustain discharge period includes applying a sustain discharge pulse to the X electrodes and the Y electrodes alternately by a specific number assigned to the corresponding subfield. In the reset operation, the X electrodes commonly connected are performed by the sustain discharge driving circuit 10. It is made by the data driving circuit 20 connected to the address electrodes A1, A2, A3 ... in order to apply a data voltage in the address operation, and scans to apply a scan voltage applied simultaneously with the data voltage. By the scan-dielectric drive circuit 30 connected to the electrodes. The sustain discharge operation is performed by the sustain discharge drive circuit 10 and the scan-dielectric drive circuit 30 connected in common.

As described above, in the method of driving the plasma display panel of the delta type pixel structure of the present invention, as shown in FIGS. 6 and 8, two adjacent Y electrodes Y1, Y2; Y3, Y4; ) Is electrically connected, and scan pulses may be applied to two scan lines simultaneously in an address period for designating cells to be displayed according to an input signal. Even when a scan pulse is applied to two scan lines (Y, Y2) at the same time, the intersection of one of the first and second intersection points adjacent to the upper and lower scan lines (Y1, Y2) up and down does not always constitute a discharge cell. Since they cannot be specified at the same time, each cell can be controlled individually.

Hereinafter, the driving method of the present invention will be described in detail with reference to Formulations 7 and 9 as follows.

Also in the present invention, as in the prior art, one field is divided into a plurality of subfields, each of the subfields is assigned a specific number of sustain discharge pulses, and a desired gradation display is achieved by a combination of lighting of the respective subfields. Implement In addition, in FIG. 7 and FIG. 9, each subfield designates a reset period for equalizing discharge conditions of all cells R, G, and B, and cells R, G, and B to be displayed according to an input signal. And a sustain discharge period for applying a sustain discharge pulse capable of performing a sustain discharge to overlap with the wall charges on the dielectric covering the display electrode to a specified number of cells assigned to the corresponding subfield.

In this driving method, as shown in FIG. 7, scan pulses are simultaneously applied to the Y electrode pairs Y ₁ and Y ₂ connected in common to the address period at the same timing. Are simultaneously applied with data pulses according to the input signal. Therefore, addressing is possible for two Y electrodes at a time, and addressing for one field or one subfield can be completed by sequentially addressing the Y electrode pairs.

Thus, by configuring the Y electrode pairs Y ₁ , Y ₂ ; Y ₃ , Y ₄ ;... To be scanned simultaneously, the driving circuit for driving the Y electrodes Y ₁ , Y ₂ , Y ₃ ... It becomes possible.

FIG. 8 is a schematic partial plan view of a plasma display panel of a delta type pixel structure for a pair scan driving method according to another embodiment of the present invention, and FIG. 9 is a plasma of a delta type pixel structure according to another embodiment of the present invention. The waveform diagram of the pair scan driving method of the display panel is shown.

In FIG. 8, the X electrodes 3 and the scan electrodes (Y electrodes 4) are arranged adjacent to each other in the form of XX-YY in a pair, and may be configured as shown to apply the present invention to such an electrode structure. Can be. Such a configuration has an advantage that it is easy to electrically connect adjacent Y electrode pairs because there is no X electrode between adjacent Y electrode pairs.

9 and 10, the pair of cells R, G and B constituting the pair of Y electrodes Y ₁ , Y ₂ ; Y ₃ , Y ₄ ; The cells R, G, and B are divided into upper and lower halves, and the address electrodes 5 are also divided into the divided upper and lower parts.

The Y electrodes Y ₁ , Y ₂ , Y ₃ ... Y _{n + 1} , Y _{n + 2} , Y _{n + 3} ... On the upper and lower address electrodes 5 and the lower address electrodes 5 'are divided in this manner. ) Are also divided up and down, and the upper Y electrode pairs (Y ₁ , Y ₂ ; Y ₃ , Y ₄ ;…) and the lower Y electrode pairs (Y _{n + 1} , Y _{n + 2} ; Y _{n + 3).} , Y _{n + 4} ; ...) are electrically connected in four units, and the same scan pulses are simultaneously applied during driving. As a result, since the four Y electrodes can be scanned simultaneously, the driving circuit can be reduced to 1/4, and the scan time can be significantly reduced.

According to the embodiment of the present invention described above, the number of scan ICs can be reduced by 1/2 or 1/4 in the delta type pixel structure plasma display panel to achieve high efficiency, and as a result, the scan The time can also be reduced by 1/2 or 1/4 of the conventional driving method.

Claims (5)

A plurality of electrodes composed of X electrodes 3 and Y electrodes 4 formed on one surface of the front substrate 1, and one Y electrode 4 adjacent to one X electrode 3 A plurality of display electrode pairs, a plurality of address electrodes 5 formed on one surface of an opposite rear substrate of the front substrate so as to intersect the plurality of display electrode pairs of the front substrate, and adjacent to each other between the front substrate and the rear substrate. Among the partition walls partitioning the discharge cells, first intersection points constituting the discharge cell among the intersections of the pair of display electrodes on the front substrate 1 and the address electrodes 5 on the rear substrate 2 and the first intersection points. A method of driving a plasma display panel comprising second crossing points not constituting a discharge cell adjacent to and a phosphor layer formed between the partition walls. Dividing one field into a plurality of subfields, each of the subfields assigns a specific number of sustain discharge pulses, and implements a desired gradation display by a combination of lighting of the respective subfields; Each of the plurality of subfields is maintained in overlap with a reset period for equalizing discharge conditions of all cells, an address period for designating cells to be displayed according to an input signal, and a wall charge on a dielectric covering the display electrode. And a sustain discharge period for applying sustain discharge pulses capable of performing discharge to the designated cells as many as a specific number assigned to the corresponding subfield; Two adjacent Y electrodes among the Y electrodes are electrically connected in pairs, and the same scan pulse is simultaneously applied to each pair of Y electrodes electrically connected in the address period. Way. 2. The X electrode (X1, X2, X3, ...) and the Y electrode (Y1, Y2, Y3, ...) formed on the front substrate 1 are X1, Y1, Y2, X2. , X3, Y3, Y4, ... are arranged in order, and simultaneously apply scan pulses to two Y electrodes paired in the pair of adjacent Y electrodes (Y1, Y2; Y3, Y4, ...) And a plasma display panel driving method. A plurality of electrodes composed of X electrodes 3 and Y electrodes 4 formed on one surface of the front substrate 1, and one Y electrode 4 adjacent to one X electrode 3 A plurality of display electrode pairs, a plurality of address electrodes 5 formed on one surface of an opposite rear substrate of the front substrate so as to intersect the plurality of display electrode pairs of the front substrate, and adjacent to each other between the front substrate and the rear substrate. Among the partition walls partitioning the discharge cells, first intersection points constituting the discharge cell among the intersections of the pair of display electrodes on the front substrate 1 and the address electrodes 5 on the rear substrate 2 and the first intersection points. A method of driving a plasma display panel comprising second crossing points not constituting a discharge cell adjacent to and a phosphor layer formed between the partition walls. Dividing one field into a plurality of subfields, each of the subfields assigns a specific number of sustain discharge pulses, and implements a desired gradation display by a combination of lighting of the respective subfields; Each of the plurality of subfields is maintained in overlap with a reset period for equalizing discharge conditions of all cells, an address period for designating cells to be displayed according to an input signal, and a wall charge on a dielectric covering the display electrode. And a sustain discharge period for applying sustain discharge pulses capable of performing discharge to the designated cells as many as a specific number assigned to the corresponding subfield; Each of the address electrodes is divided into two, and two adjacent Y electrodes are electrically connected to each other in pairs, and one of the two divided address electrodes of the electrically connected Y electrode pairs is electrically connected. The two Y electrodes paired in four units are electrically connected to each other by a method of electrically connecting a pair of Y electrodes crossing the electrodes and a pair of Y electrodes crossing the other address electrodes. A method of driving a plasma display panel, wherein the same scan pulse is simultaneously applied to Y electrode pairs. A plurality of electrodes composed of X electrodes 3 and Y electrodes 4 formed on one surface of the front substrate 1, and one Y electrode 4 adjacent to one X electrode 3 A plurality of display electrode pairs, a plurality of address electrodes 5 formed on one surface of an opposite rear substrate of the front substrate so as to intersect the plurality of display electrode pairs of the front substrate, and adjacent to each other between the front substrate and the rear substrate. Among the partition walls partitioning the discharge cells, first intersection points constituting the discharge cell among the intersections of the pair of display electrodes on the front substrate 1 and the address electrodes 5 on the rear substrate 2 and the first intersection points. A driving apparatus for a plasma display panel comprising second intersection points not forming discharge cells adjacent to the first surface, and a phosphor layer formed between the partition walls. Scan-maintaining means (30) electrically connecting two adjacent Y electrodes among the Y electrodes in pairs, and including scan ICs connected to each of the electrically connected Y electrode pairs; Data electrode driving means (20) connected to said address electrodes for applying an input data signal; And And sustain discharge driving means (10) for connecting all X electrodes in common and for applying a sustain discharge pulse to the commonly connected X electrodes. A plurality of electrodes composed of X electrodes 3 and Y electrodes 4 formed on one surface of the front substrate 1, and one Y electrode 4 adjacent to one X electrode 3 A plurality of display electrode pairs, a plurality of address electrodes 5 formed on one surface of an opposite rear substrate of the front substrate so as to intersect the plurality of display electrode pairs of the front substrate, and adjacent to each other between the front substrate and the rear substrate. Among the partition walls partitioning the discharge cells, first intersection points constituting the discharge cell among the intersections of the pair of display electrodes on the front substrate 1 and the address electrodes 5 on the rear substrate 2 and the first intersection points. A driving apparatus for a plasma display panel comprising second intersection points not forming discharge cells adjacent to the first surface, and a phosphor layer formed between the partition walls. Data electrode driving means (20) for dividing the address electrodes into two and applying the input data signal connected to the divided address electrodes; Two adjacent Y electrodes among the Y electrodes are electrically connected in pairs, and one Y electrode pair crossing one of the two divided address electrodes and one Y electrode crossing the other address electrode are electrically connected. Scan-dielectric drive means (30) for connecting all the Y electrodes in units of four Y electrodes including a pair, and including a plurality of scan ICs connected to the pair of Y electrodes electrically connected to the four units; And And sustain discharge driving means (10) for connecting all X electrodes in common and for applying a sustain discharge pulse to the commonly connected X electrodes.