KR20000033031A - Method for duplexing time switch of time division exchange - Google Patents

Abstract

PURPOSE: A method for duplexing the time switch of the TDX(Time Division Exchange) is provided to achieve high reliable and stable communication service as well as stable speech path and call process service by limiting an effect caused by fault to the relevant switchboard. CONSTITUTION: A time switch link F/W checks the status variation of a duplicated time switchboard(DSPA511) periodically(100). In case that the mounting of the switchboard is detected even though the previous status has been in a removed status(110), the state of the switchboard is previously tested(120). If the switchboard is normal, a backup is proceeded to adjust identically the state of the duplicated board(130). The backup is carried out separately for the control memory of the transmitting direction and the control memory of the receiving direction(140,150).

Description

Time switch redundancy method of all electronic switch

The present invention relates to a time switch duplication method of an electronic switch, and more particularly, to a time switch duplication method of an all-electronic switch for efficient redundancy with respect to hernia or abnormality of a time switch board.

In the case of the time switches employed in the TDX-1 series and the TDX-10 series electronic exchangers, the time memory in the control memory and maintenance board assembly (CMMA), the time memory control and maintenance redundancy processing circuit pack, and the time switches are rearranged. It consists of TSIA (Time Slot Interchange board Assembly) which is a circuit pack, and Time Switch Link Interface Board Assembly (TLIA) which is an optical link matching circuit pack connected to the time switch and space switch side, and the redundancy is controlled by a call in the CMMA. Active side such as CMMA and TLIA were also affected by hernia / mounting of TSIA board, and the conversion was done to redundant parts. In addition, in the conventional case, an intra-junctor channel, which is a path that is connected when processed inside a time switch, is not connected to a space switch when connecting a line, but the TDX-100 series electronic switchboard is connected to a back board. The control method is different from the previous redundant control method, such as commonly supported by the.

That is, the devices of the electronic switchboard are connected by a time switch (T-switch) so that the stabilization of the switch is closely related to the stabilization of the time switch. When DSPA511, which provides time-switched communication path, becomes abnormal due to an external accident, it is essential to provide stable service by DSPA511 on the other side. Time switch redundancy is the CM (Control) Memory) and the DSPA511 structure of the TDX-100 is shown in FIG.

1 is a time switch structure diagram of a conventional TDX-100 series electronic switch, wherein the time switch 10 is a time switch link firmware 20a, 20b (TSL F / W) and a local data link 30 connected to a space switch. It is provided between LDL, and it is duplexed with them, and it is duplexed inside the said time switch 10 using the time switch board (DSPA511 board) of A / B side as one card. In FIG. 1, reference numeral INS (Interconnection Network Subsystem) is a subsystem for connecting a space switch.

That is, in the above-described TDX-100 of FIG. 1, the time switch is provided by the DSPA511, 2,048 timeslots are provided per sheet, and up to 10 DSPA511s are mounted in one ASS. The dual structure provides a total of 2,048 * 5 timeslots, and the DSPA511 includes a Control Memory (CM) to control the time path of the time switch. DSPA511 is composed of A-side and B-side, and service is performed by DSPA511 in active state. Redundancy provides stable service even when one of two devices is abnormal. Is an essential feature to do this. The redundancy switching of the time switch is caused by the unmounting and failure of the DSPA511 board in operation. During normal operation, the time slot link firmware (20a, 20b) connects and disconnects the switch to active / standby. -by) the same in the control memory (CM) and the contents are stored in the memory buffer of the timeslot link firmware 20a, 20b so that the current connection of the time switch after mounting or resetting the board is the same. It can be forged.

2 is an internal configuration diagram of the time switch board, wherein a bit error rate test device 40 is a test device for testing an abnormality of a call path, and a test memory 42 is a bit error rate test. A memory used for the device 40, and the multiplexer 44 multiplexes the serial data received to the subhighway SHW31 into parallel data. The multiplexer 44 is also connected to a subscriber line device (DLC; Digital Line Concentrator) that matches the subscriber to the time switch and a signal device (LSI) that matches the signal equipment required for the exchange service.

The demultiplexer 46 demultiplexes the parallel data delivered through the call memory SM into serial data to send over the subhighway to the subscriber device DLC or signaling device LSI, and the memory buffer 48 times It is a memory necessary for rearranging the order of the slots, and the call memories 50a to 50j are memories for storing the voice of the actual call.

The control memory 52a to 52d is a memory for controlling the time switch connection, and the local bus 54 transmits and receives information to and from the time switch link firmware (TSL F / W) and the time switch board. The bus selector 56 selects a reference clock in connection with a redundant local data link (LDL). The clock divider 58 supplies a reference clock to the peripheral device. In Fig. 2, THP512 (0) and THP512 (1) mean connection to a local data link (LDL) board for optical link matching, and THP172 is a board for controlling time switches.

Referring to the operation of the time switch board configured as shown in FIG. 2, first, the multiplexer 44 receives serial data from a subscriber device (DLC), a signal device (LSI), etc., multiplexes into parallel data, and rearranges the order of timeslots. In the memory buffer 48 for storing. The parallel data stored in the memory buffer 48 is then transferred to the plurality of talk memories 50a to 50j to perform the time slot interchange function with the control memories 52a to 52d. That is, the data values of the control memories 52a to 52d are changed to point to the addresses of the timeslots to which the data of the call memories 50a to 50j are to be connected. When duplication coincides with the contents of the control memories 52a to 52d. To achieve redundancy. Here, the control memories 52a, 52b, 52c are for data conversion in the transmission direction, and the control memory 52d is for data conversion in the reception direction.

In the case of the time switch of the all-electronic exchanger configured as described above, the redundancy is collectively switched from the A side to the B side for the hernia or abnormality of the time switch board, so that the conventional TDX-1 series and TDX-10 series There is a problem that the redundant conversion to the unnecessary part, which is the same problem as that.

Accordingly, the present invention has been made to solve the above-described problems, and an object of the present invention is to provide a time switch duplication method of an electronic switch, in which a duplex switching is performed on a time switch board basis so that the effect of a failure is limited to the corresponding board. There is this.

In order to achieve the above object, a time switch duplication method of an electronic switch according to a preferred embodiment of the present invention is to duplicate a time switch having a plurality of cards incorporating a pair of time switch boards on the A side and the B side. In the time switch duplication method of the electronic switch,

A first step of periodically checking a state change of the time switch board;

A second step of testing whether the corresponding time switch board is normal as the time switch board in the hernia state is mounted as a result of the check;

If the test result is normal, a third process of backing up and duplexing the state of the redundant time switch board to the control memory in the transmission direction and the control memory in the reception direction is provided.

1 is a structural diagram of a time switch of a general electronic switch,

2 is an internal configuration diagram of the time switch board shown in FIG.

3 to 5 are flowcharts illustrating a time switch duplication method of an electronic switch according to an exemplary embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

10: time switch 20a, 20b: time switch link firmware

30: local data link 40: bit error rate test device

42: test memory 44: multiplexer

46: demultiplexer 48: memory buffer

50a to 50j: call memory 52a to 52d: control memory

54: Local bus 56: Clock selector

58: clock distribution

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 to 5 are flowcharts illustrating a time switch duplication method of an electronic switch according to an embodiment of the present invention, and the method of the present invention is applied to the time switches shown in FIGS. 1 and 2 as it is.

First, in FIG. 3, the time switch link firmware 20a, 20b (TSL F / W) periodically checks the state change of the redundant time switch board DSPA511 (step 100), and the state before the result is a hernia state. If the board is detected to be mounted ("YES" in step 110), the board is first tested for normality (step 120), and if it is normal, the backup is performed to equalize the state of the redundant board (step 130). . This backup is performed separately for the control memories 52a, 52b, 52c in the transmission direction and the control memory 52d in the reception direction (steps 140, 150).

Referring to the duplication operation of the transmission direction with reference to the flowchart of FIG. 4, the card number is determined according to the position of the board on which the board mounted is first, and the card number is, for example, the time switch board illustrated in FIG. According to the sequence of (DSPA511), it increases from "0" to "4" and the same card number is assigned to the duplicated board. Once the card number is obtained, the line number Ln and the address of the board are allocated (step 200). That is, DSPA511 (0) uses line numbers Ln of 0 to 2047, DSPA511 (1) uses line numbers Ln of 2048 to 4059, and DSPA511 (2) uses line numbers of 4096 to 6143 ( Ln) is used, DSPA511 (3) uses line numbers (Ln) of 6144 to 8191, and DSPA511 (4) uses line numbers (Ln) of 8192 to 10239.

Then, if there is data (txcmdata) in the control memory of the first time slot of the board, the same data is written to the redundant board and if there is no data (i.e., idle state) (steps 210 to 250), the next time slot If the contents of txcmdata in step 250 are not idle, the time switch is connected, and in order to find an address to be stored on the board, the address of the board (as defined in step 200) The contents of txcmdata [ts_no] in step 250 are recorded in the address ( ^* (addr + txcmaddr [ts_no])) obtained by adding the control memory address (txcmaddr [ts_no]) in the transmission direction to the address (step 260). Subsequently, the process proceeds to step 270 to designate a subsequent timeslot and repeats the above-described search operation. If all of these search operations are performed for 2048 timeslots, the duplexing operation in the transmission direction is terminated. In step 210, i = 0 is assigned and the i value is increased each time through the loop (step 270). If performed (step 240), the process ends. The timeslot (ts_no) is assigned to 2048 channels per card from card number 0 to 4 in the time switch, and is sequentially increased by 1 so that "ts_no = Ln-2048" is used to calculate the first timeslot number of each card. And increase by 1.

And, with reference to the flowchart of Figure 5 with respect to the redundant operation in the receiving direction, the card number is determined according to the number of boards on which the board is mounted first, the card number is from 0 in accordance with the order of the DPSA511 board The incremented board up to 4 gives the same card number, and assigns the line number (Ln) and the address of the board when the card number is found (step 300). In addition, the channel number function (Link-info) is used to receive the channel for each of the 6,144 channels, which is the sum of the 4096 channels coming from the internal network subsystem (INS) and the 2048 channels for intra-junctor. It is checked whether the board is being backed up (steps 310 to 330). DSPA511 (0) if Link_info (ch) is 0, DSPA511 (1) if Link_info (ch) is 1, DSPA511 (2) if Link_info (ch) is 2, DSPA511 (3) if Link_info (ch) is 3, If Link_info (ch) is 4, the redundant information is classified and stored by DSPA511 (4).

If it is the board, when the data (rxcmdata [ch]) of the reception control memory CM is not in a state, the data is written to the mounted board (steps 340 to 350). If the result of step 340 is that the contents of rxcmdata are not idle, it means that the time switch is connected. To find the address to be stored on the board, the control memory of the receiving direction is set to the address (address in step 300) that is the reference of the board. The content of rxcmdata [ch] in step 340 is recorded to the address plus the address (rxcmaddr [ch]). If the content of the control memory CM is IDLE (YES in step 340), the process proceeds to step 360, repeats for the next channel, and repeats up to 6144 channels to terminate the duplex operation in the receiving direction. Since there are 6144 channels from 0 to 6143 in the receiving direction, ch = 0 is set in step 310 to repeat the loop until ch = 6143.

According to the present invention as described above, since the time switch duplex switching of the electronic switchboard is switched to the DSPA511 board unit, the impact due to the failure is limited to only the corresponding board, thus providing a more stable call path and call processing service than before. In addition, it provides more reliable and stable communication services.

On the other hand, the present invention is not limited only to the above-described embodiments, but may be modified and modified without departing from the scope of the present invention.

Claims (6)

In the time switch duplication method of the electronic switchboard which duplicates the time switch having a plurality of cards in which the time switch boards of the A side and the B side are paired, A first step of periodically checking a state change of the time switch board; A second step of testing whether the corresponding time switch board is normal as the time switch board in the hernia state is mounted as a result of the check; And a third process of backing up and duplexing the state of the redundant time switch board to the control memory in the transmission direction and the control memory in the reception direction if the test result is normal. . The method of claim 1, wherein the redundancy of the transmission direction in the third process Determining a card number according to a position of the mounted time switch board and allocating a line number and an address of the corresponding board; A second step of writing the same data to a duplicated board if there is data in the control memory of the first timeslot of the board and searching for a subsequent timeslot if there is no data; A method of time switch duplication of an electronic switching system, characterized in that the step of terminating redundancy in the transmission direction is completed when data recording up to the last timeslot is completed. 3. The method according to claim 2, wherein the card number increases in the order of the time switch boards provided in the time switch, and the duplicated board has the same card number. 3. The method according to claim 2, wherein the timeslot is allocated by a certain number of channels for each card and sequentially increased by "1". The method of claim 1, wherein the redundancy of the receiving direction in the third process is Determining a card number according to a position of the mounted time switch board and allocating a line number and an address of the corresponding board; A second step of checking whether a reception of a corresponding channel is a board being mounted and backed up for each currently received channel; The board being backed up is performed in the order of the third step of repeating the operation of writing the data to the mounted board when there is data in the reception control memory to the last channel and ending the duplication of the reception direction. Time switch redundancy method of all electronic switch. 6. The method of claim 5, wherein the number of channels received is the sum of the channels coming from the interconnection network subsystem (INS) and the channels for intra-terminator.