KR19980072520A - Manufacturing Method of Semiconductor Device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, comprising: forming a field oxide film on a first conductive semiconductor substrate, the field oxide film defining an active region and a field region of a device; and a gate oxide film and a gate on a predetermined portion of the semiconductor substrate. Forming a cap oxide film; forming a low concentration region of a second conductivity type in an exposed portion of the semiconductor substrate by using the cap oxide film as a mask; and forming sidewalls on side surfaces of the gate and cap oxide films. Forming a trench by etching the deeper portion of the semiconductor substrate than the low concentration region using the cap oxide layer, the sidewall, and the field oxide layer as a mask; and forming the trench by remaining the sidewall having a predetermined length. Selectively removing the exposed portions, and impurities of the second conductivity type are heavily doped in the trenches. And depositing crystalline silicon in contact with the low concentration region to form a source and a drain region.

Therefore, since the source and drain regions are formed of polycrystalline silicon doped with a high concentration of impurities, the semiconductor substrate may be damaged, and the source and drain regions may be spaced apart from the field oxide film to prevent leakage current from flowing.

Description

Manufacturing Method of Semiconductor Device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device having a LDD (Lightly Doped Drain) structure.

As semiconductor devices become more integrated, each cell becomes finer and the channel length becomes shorter.

As such, in a short channel device having a short channel length, the separation distance between the source region and the drain region is shortened, so that the short channel effect and the punch through are electrically connected to the source region and the drain region even when the bias is not applied to the gate. ) Occurs.

Therefore, in order to suppress short channel effects and punch-through, a structure in which the drain structure is changed such as LDD should be used.

1A to 1C are manufacturing process diagrams of a semiconductor device according to the prior art.

Referring to FIG. 1A, a field oxide film 13 is formed on a predetermined portion of a surface of a P-type semiconductor substrate 11 by a conventional selective oxidation method such as LOCOS (Local Oxidation of Silicon) to form an active region of an element. To qualify.

Referring to FIG. (B), the surface of the semiconductor substrate 11 is thermally oxidized to form a gate oxide film 15, and chemical vapor deposition is formed on the field oxide film 13 and the gate oxide film 15. : Polycrystalline silicon and silicon oxide are deposited by the following CVD method.

The silicon oxide and polycrystalline silicon layers are patterned by photolithography to include the gate oxide film 15 to define the cap oxide film 19 and the gate 17.

A low concentration region 21 for forming an LDD structure is formed by ion implanting N-type impurities of opposite conductivity type into the semiconductor substrate 11 at low concentration using the cap oxide film 19 as a mask.

In the above, the surface of the semiconductor substrate 11 under the gate 17, that is, between the low concentration regions 21, becomes a channel region.

Referring to FIG. 1 (c), silicon oxide is deposited on the entire surface of the above-described structure by CVD, and the back oxide is etched back to the sidewalls of the gate 17 and the cap oxide film 19. (23) is formed.

A source and drain region overlapping a predetermined portion of the low concentration region 21 by ion implanting N-type impurities into the semiconductor substrate 11 at a high concentration using the cap oxide film 19 and the sidewall 23 as a mask. (25) (27) are formed.

However, the semiconductor device manufacturing method according to the related art described above has a problem that the semiconductor substrate is damaged because an impurity must be implanted with a high dose to form the source and drain regions.

In addition, a defect occurs in a portion where the source and drain regions are in contact with the field oxide film, so that a leakage current flows.

Accordingly, an object of the present invention is to provide a method of manufacturing a semiconductor device which can prevent damage to a semiconductor substrate by forming a source and a drain region of polycrystalline silicon doped with a high concentration of impurities.

Another object of the present invention is to provide a method of manufacturing a semiconductor device which can prevent a leakage current from flowing by separating a source and drain region from a field oxide film.

1 (a) to (c) is a manufacturing process diagram of a semiconductor device according to the prior art

2 (a) to (d) are manufacturing process diagrams of a semiconductor device according to the present invention.

* Brief description of symbols for the main parts of the drawing

31: semiconductor substrate 33: field oxide film

35: gate oxide film 37: gate

39: cap oxide film 41: low concentration region

43: sidewall 45: trench

47: insulating film 49, 51: source and drain regions

A method of manufacturing a semiconductor device according to the present invention for achieving the above objects comprises the steps of forming a field oxide film defining an active region and a field region of an element on a first conductive semiconductor substrate, and on a predetermined portion of the semiconductor substrate. Forming a gate oxide film, a gate oxide film and a cap oxide film on the substrate; forming a low concentration region of a second conductivity type in an exposed portion of the semiconductor substrate using the cap oxide film as a mask; Forming a sidewall in the trench; forming a trench by etching the exposed portion of the semiconductor substrate deeper than the low concentration region using the cap oxide film, the sidewall, and the field oxide film as a mask; Selectively removing and removing the low concentration region to expose the low concentration region; and an impurity of a second conductivity type in the trench. Deposited in contact with the polycrystalline silicon doped with a high concentration and the low concentration region comprises a step of forming a source and drain region.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 (a) to 2d are manufacturing process diagrams of a semiconductor device according to the present invention.

Referring to FIG. 2A, a field oxide film 33 is formed on a predetermined portion of the surface of a P-type semiconductor substrate 31 by a selective oxidation method such as LOCOS to define an active region and a field region of the device.

Referring to FIG. 2 (b), the gate oxide film 35 is formed by thermally oxidizing the surface of the semiconductor substrate 31 to a thickness of about 50 to 150 Å.

Then, polycrystalline silicon doped with impurities on the gate oxide film 35 is deposited to a thickness of about 2000 to 3000 GPa, and silicon oxide is deposited to a thickness of about 1500 to 2000 GPa.

The cap oxide film 39 and the gate 37 are defined by patterning the silicon oxide and the polycrystalline silicon layer by a photolithography method so that the gate oxide film 35 is also included.

Using the cap oxide film 39 as a mask, N-type impurities such as phosphorus (P) or asic (As) are purchased and activated at low concentrations in the exposed portions of the semiconductor substrate 31 so as to activate the low concentration region 41. To form.

Referring to FIG. 2 (c), silicon nitride is deposited on the entire surface of the above-described structure by CVD, and the silicon nitride is etched back to 2000 on the side of the gate 37 and the cap oxide film 39. The side wall 43 which has a length roll of -3000 micrometers is formed.

Then, the cap oxide film 39, the sidewalls 43, and the field oxide film 33 are used as masks to expose the semiconductor substrate 31 and the exposed portions, such as reactive ion etching (hereinafter referred to as RLE). Anisotropic etching is performed by the dry method to form the trench 45.

At this time, the trench 45 is formed deeper than the low concentration region 41, for example, at a depth of about 1000 to 2000 Pa.

Next, an insulating film 47 having a thickness of about 300 to 500 kPa is formed on the inner surface of the trench 45 by a thermal oxidation method.

Referring to FIG. 2 (d), the sidewalls 43 are selectively etched to have a length of about 700 to 1200 mm and remain to expose the low concentration region 41.

Then, polycrystalline silicon doped with a high concentration of N-type impurities such as phosphorus (P) or asic (As) is deposited on the entire surface of the structure described above to fill the trench 45.

The doped polysilicon is etched back by RLE or the like so that the field oxide film 33 and the cap oxide film 39 are exposed and remain in the trench 45 to form source and drain regions 49 and 51.

At this time, the source and drain regions 49 and 51 are formed in contact with the low concentration region 41 to be electrically connected to each other.

As described above, in the method of manufacturing a semiconductor device according to the present invention, a trench is formed deeper than a low concentration region in a semiconductor substrate using a cap oxide film, sidewalls, and a field oxide film as a mask, and an insulating film is formed on an inner surface of the trench. Selectively wet etching to expose low-concentration regions, fill poly-silicon doped with high concentrations of impurities, deposit them in electrical contact with low-concentration regions, and form source and drain regions to separate source and drain regions from field oxide films Let's do it.

Therefore, the present invention forms the source and drain regions with polysilicon doped with a high concentration of impurities, and thus the semiconductor substrate is damaged, and the source and drain regions are separated from the field oxide film to prevent leakage current from flowing. have.

Claims (7)

Forming a field oxide film defining an active region and a field region of a device on a first conductive semiconductor substrate, forming a gate oxide film, a gate and a cap oxide film on a predetermined portion of the semiconductor substrate, and the cap Forming a low-concentration region of a second conductivity type in an exposed portion of the semiconductor substrate using an oxide film as a mask, forming a sidewall on side surfaces of the gate and cap oxide film, and forming the cap oxide film, sidewall and field oxide film. Using a mask as a mask to form a trench by etching deeper than the low concentration region in the exposed portion of the semiconductor substrate, and selectively removing the sidewall having a predetermined length to expose the low concentration region; Deposition of polycrystalline silicon doped with a high concentration of impurities of the second conductivity type in the trench in contact with the low concentration region. A semiconductor device manufacturing method having a step of forming a source and drain region. The method of claim 1, wherein the sidewall is formed of silicon nitride. The method of manufacturing a semiconductor device according to claim 2, wherein the sidewalls are formed to have a length of 2000 to 3000 microns. The method of manufacturing a semiconductor device according to claim 1, wherein the trench is formed to a depth of 1000 to 2000 GPa. The method of claim 1, further comprising forming an insulating film on an inner surface of the trench. The method of manufacturing a semiconductor device according to claim 5, wherein the insulating film is formed to a thickness of 300 to 500 kV. The method of claim 1, wherein the sidewall is etched so that a length of 700 to 1200 Å remains.