KR102781146B1 - Display device - Google Patents

Abstract

The present invention relates to a display device. According to one embodiment, a display device includes: a plurality of light-emitting elements arranged on a first substrate; a second substrate facing the first substrate; a partition wall disposed on one surface of the second substrate facing the first substrate and including a plurality of openings; a plurality of color filters arranged in the plurality of openings; wavelength conversion layers respectively arranged on the plurality of color filters and converting wavelengths of light emitted from the plurality of light-emitting elements; and an adhesive layer bonding the first substrate and the second substrate, wherein the partition wall includes a silicon single crystal.

Description

Display device {Display device}

The present invention relates to a display device.

As the information society develops, the demand for display devices for displaying images is increasing in various forms. The display devices may be flat panel display devices such as a liquid crystal display, a field emission display, a light emitting display, etc. The light emitting display device may include an organic light emitting display device including an organic light emitting diode element as a light emitting element, an inorganic light emitting display device including an inorganic semiconductor element as a light emitting element, or an ultra-small light emitting diode element (or micro light emitting diode element) as a light emitting element.

Recently, head mounted displays including light-emitting display devices are being developed. A head mounted display (HMD) is a glasses-type monitor device for virtual reality (VR) or augmented reality (AR) that the user wears in the form of glasses or a helmet, and the focus is formed at a close distance in front of the eyes.

A head-mounted display uses a high-resolution, ultra-small light-emitting diode display panel including ultra-small light-emitting diode elements. Since the ultra-small light-emitting diode elements emit a single color, the ultra-small light-emitting diode display panel may include a wavelength conversion layer that converts the wavelength of light emitted from the ultra-small light-emitting diode elements in order to display various colors.

The problem to be solved by the present invention is to provide an ultra-high resolution display device by forming ultra-high resolution light-emitting areas.

The tasks of the present invention are not limited to the tasks mentioned above, and other technical tasks not mentioned will be clearly understood by those skilled in the art from the description below.

According to one embodiment of the present invention for solving the above problem, a display device includes: a plurality of light-emitting elements arranged on a first substrate; a second substrate facing the first substrate; a partition wall disposed on one surface of the second substrate facing the first substrate and including a plurality of openings; a plurality of color filters arranged in the plurality of openings; wavelength conversion layers respectively arranged on the plurality of color filters and converting wavelengths of light emitted from the plurality of light-emitting elements; and an adhesive layer bonding the first substrate and the second substrate, wherein the partition wall may include a silicon single crystal.

The plurality of color filters may include a first color filter that transmits first light emitted from the plurality of light-emitting elements, a second color filter that transmits second light having a different wavelength band from the first light, and a third color filter that transmits third light having a different wavelength band from the first light and the second light.

The above plurality of openings may include a first opening, a second opening, and a third opening spaced apart from each other, and the first color filter may be disposed within the first opening, the second color filter may be disposed within the second opening, and the third color filter may be disposed within the third opening.

The above wavelength conversion layers can convert some of the first light into fourth light and emit fifth light that is a mixture of the first light and the fourth light from within.

The fifth light emitted from the wavelength conversion layers can be converted into the first light through the first color filter, converted into the second light through the second color filter, and converted into the third light through the third color filter.

The wavelength conversion layers may include a light transmitting pattern that transmits the first light, a first wavelength conversion pattern that converts the first light into the second light, and a second wavelength conversion pattern that converts the first light into the third light.

The above light transmitting pattern may overlap with the first color filter, the first wavelength conversion pattern may overlap with the second color filter, and the second wavelength conversion pattern may overlap with the third color filter.

The thickness of the above bulkhead may be 1 ㎛ to 10 ㎛.

Each of the plurality of light-emitting elements may include a first semiconductor layer, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, and a third semiconductor layer disposed on the second semiconductor layer.

The second semiconductor layer and the third semiconductor layer may be common layers that are commonly connected and arranged to the plurality of light-emitting elements.

The thickness of the region of the second semiconductor layer overlapping with the first semiconductor layer may be greater than the thickness of the region of the second semiconductor layer not overlapping with the first semiconductor layer.

It may further include a first insulating layer disposed on side surfaces of the first semiconductor layer, the active layer, and the second semiconductor layer, and a first reflective layer disposed on a side surface of the first insulating layer.

It further includes second reflective layers arranged on each side of the plurality of openings, wherein the second reflective layers can each surround the plurality of color filters.

The above wavelength conversion layers may overlap with the plurality of color filters and the second reflective layer, and may overlap with the plurality of openings.

The first substrate may further include a plurality of pixel circuit units including at least one transistor, pixel electrodes disposed on the plurality of pixel circuit units and respectively connected to the plurality of pixel circuit units, a circuit insulating layer disposed between the plurality of pixel circuit units and the pixel electrodes, and contact electrodes disposed on the pixel electrodes, respectively.

It further includes a connection electrode arranged between the first semiconductor layer and the contact electrode, wherein the contact electrode can be in contact with the connection electrode.

It further includes a first protective layer covering the above-mentioned bulkhead and the above-mentioned wavelength conversion layers, and one surface of the first protective layer adjacent to the light-emitting element may be flat.

It may further include a second protective layer disposed between the plurality of color filters and the wavelength conversion layers.

The plurality of color filters and the wavelength conversion layers can be respectively arranged within the plurality of openings.

It further includes a light shielding member disposed on the above bulkhead and partitioning the wavelength conversion layers, and the light shielding member can be non-overlapping with the plurality of openings.

In addition, a display device according to one embodiment includes a first light-emitting region emitting first light, a second light-emitting region emitting second light, and a third light-emitting region emitting third light, and includes first and second substrates facing each other, a plurality of light-emitting elements disposed on the first substrate and disposed in each of the first light-emitting region, the second light-emitting region, and the third light-emitting region, a partition wall disposed on one surface of the second substrate facing the first substrate and including a plurality of openings respectively corresponding to the first light-emitting region, the second light-emitting region, and the third light-emitting region, a plurality of color filters disposed in the plurality of openings, wavelength conversion layers respectively disposed on the plurality of color filters, and an adhesive layer bonding the first substrate and the second substrate, wherein the partition wall includes a silicon single crystal, and the plurality of openings may include a first opening corresponding to the first light-emitting region, a second opening corresponding to the second light-emitting region, and a third opening corresponding to the third light-emitting region.

The plurality of color filters may include a first color filter transmitting the first light, a second color filter transmitting the second light, and a third color filter transmitting the third light, wherein the first color filter may be disposed within the first opening, the second color filter may be disposed within the second opening, and the third color filter may be disposed within the third opening.

The above wavelength conversion layers correspond one-to-one with each of the plurality of openings and can completely overlap each other.

The first substrate and the second substrate may include a display area in which the first light-emitting area, the second light-emitting area, and the third light-emitting area are arranged, and a non-display area other than the display area.

Each of the plurality of light-emitting elements includes a first semiconductor layer, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, and a third semiconductor layer disposed on the second semiconductor layer, wherein the second semiconductor layer and the third semiconductor layer can be disposed to extend from the display area to the non-display area.

The first substrate may further include a plurality of pixel circuit units including at least one transistor, pixel electrodes disposed on the plurality of pixel circuit units and respectively connected to the plurality of pixel circuit units, a circuit insulating layer disposed between the plurality of pixel circuit units and the pixel electrodes, contact electrodes respectively disposed on the pixel electrodes in the display area, and common contact electrodes respectively disposed on the pixel electrodes in the non-display area.

It further includes common connection electrodes arranged between the second semiconductor layer arranged in the non-display area and the common contact electrodes, wherein the common connection electrodes can be in contact with the common contact electrodes.

Specific details of other embodiments are included in the detailed description and drawings.

According to the display device according to the embodiments, it is possible to easily manufacture a high aspect ratio barrier by forming a barrier including silicon and performing high aspect ratio etching. Accordingly, since ultra-high resolution light-emitting regions can be formed, an ultra-high resolution display device can be implemented.

In addition, according to the display device according to the embodiments, by forming a wavelength conversion layer including a light transmitting pattern, a first wavelength conversion pattern, and a second wavelength conversion pattern, the light emission efficiency of blue, green, and red can be improved.

In addition, according to the display device according to the embodiments, since the thickness of the first protective layer is made the same, the lower surface of the wavelength conversion substrate bonded to the light-emitting element layer can be formed flat. Accordingly, the bonding of the wavelength conversion substrate and the light-emitting element layer can be facilitated, and the bonding strength can also be improved.

In addition, according to the display device according to the embodiments, by including a second protective layer between the color filter and the wavelength conversion layer, the color filter can be prevented from being damaged by a subsequent process.

In addition, according to the display device according to the embodiments, by forming the partition wall thickly and forming the color filter and the wavelength conversion layer within the opening, the alignment of the color filter and the wavelength conversion layer can be facilitated, and the thickness of the wavelength conversion layer can be increased, thereby improving the light conversion efficiency.

In addition, according to the display device according to the embodiments, by including a light-blocking member surrounding the light-emitting areas, it is possible to prevent light from penetrating between the light-emitting areas and causing color mixing, thereby improving color reproducibility.

The effects according to the embodiments are not limited to the contents exemplified above, and more diverse effects are included in the present specification.

FIG. 1 is a layout diagram showing a display device according to one embodiment.
Figure 2 is a layout diagram showing area A of Figure 1 in detail.
FIG. 3 is a layout diagram showing pixels of a display panel according to one embodiment.
FIG. 4 is a cross-sectional view showing an example of a display panel cut along line Q1-Q1' of FIG. 2.
FIG. 5 is a cross-sectional view showing an example of a display panel cut along line Q2-Q2' of FIG. 2.
FIG. 6 is a plan view showing an example of a wavelength conversion substrate of a display panel according to one embodiment.
FIG. 7 is a plan view showing an example of a light emitting element layer of a display panel according to one embodiment.
FIG. 8 is a cross-sectional view showing an example of a light-emitting element of a display panel according to one embodiment.
FIG. 9 is a cross-sectional view showing a display panel according to another embodiment.
FIG. 10 is a cross-sectional view showing a display panel according to another embodiment.
FIG. 11 is a cross-sectional view showing a display panel according to another embodiment.
FIG. 12 is a cross-sectional view showing a display panel according to another embodiment.
FIG. 13 is a cross-sectional view showing a display panel according to another embodiment.
FIG. 14 is a plan view showing a portion of a display panel according to another embodiment.
FIG. 15 is a flowchart showing a method for manufacturing a display panel according to one embodiment.
FIGS. 16 to 30 are cross-sectional views illustrating a method for manufacturing a display panel according to one embodiment.
FIGS. 31 and 32 are cross-sectional views showing a manufacturing process of a display panel according to another embodiment.
FIG. 33 is an exemplary drawing showing a virtual reality device including a display device according to one embodiment.
FIG. 34 is an exemplary drawing showing a smart device including a display device according to one embodiment.
FIG. 35 is an exemplary drawing showing a vehicle including a display device according to one embodiment.
FIG. 36 is an exemplary drawing showing a transparent display device including a display device according to one embodiment.

The advantages and features of the present invention, and the methods for achieving them, will become clear with reference to the embodiments described in detail below together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms, and these embodiments are provided only to make the disclosure of the present invention complete and to fully inform a person having ordinary skill in the art to which the present invention belongs of the scope of the invention, and the present invention is defined only by the scope of the claims.

When elements or layers are referred to as being "on" another element or layer, it includes both cases where the other element is directly on top of the other element or layer or intervening layers or other elements. Like reference numerals refer to like elements throughout the specification. The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments are illustrative and therefore the present invention is not limited to the matters illustrated.

Although the terms first, second, etc. are used to describe various components, it is to be understood that these components are not limited by these terms. These terms are merely used to distinguish one component from another. Accordingly, it is to be understood that the first component referred to below may also be the second component within the technical concept of the present invention.

The individual features of the various embodiments of the present invention may be partially or wholly combined or combined with each other, and may be technically linked and driven in various ways, and each embodiment may be implemented independently of each other or may be implemented together in a related relationship.

Specific embodiments are described below with reference to the attached drawings.

FIG. 1 is a layout diagram showing a display device according to one embodiment. FIG. 2 is a layout diagram showing area A of FIG. 1 in detail. FIG. 3 is a layout diagram showing pixels of a display panel according to one embodiment.

In FIGS. 1 to 3, the display device according to one embodiment is described as an ultra-small light-emitting diode display device (or micro light-emitting diode display device) including an ultra-small light-emitting diode (or micro light-emitting diode) as a light-emitting element, but the embodiment of the present specification is not limited thereto.

In addition, although FIGS. 1 to 3 have described the display device according to one embodiment as an LEDoS (Light Emitting Diode on Silicon) in which light emitting diode elements are arranged on a semiconductor circuit board formed using a semiconductor process, it should be noted that the embodiments of the present specification are not limited thereto.

In addition, in FIGS. 1 to 3, the first direction (DR1) refers to the horizontal direction of the display panel (100), the second direction (DR2) refers to the vertical direction of the display panel (100), and the third direction (DR3) refers to the thickness direction of the display panel (100). In this case, “left,” “right,” “upper,” and “lower” represent directions when the display panel (100) is viewed from a plane. For example, “right” represents one side of the first direction (DR1), “left” represents the other side of the first direction (DR1), “upper” represents one side of the second direction (DR2), and “lower” represents the other side of the second direction (DR2). In addition, “upper” represents one side of the third direction (DR3), and “lower” represents the other side of the third direction (DR3).

Referring to FIGS. 1 to 3, a display device (10) according to one embodiment has a display panel (100) including a display area (DA) and a non-display area (NDA).

The display panel (100) may have a rectangular planar shape having a long side in the first direction (DR1) and a short side in the second direction (DR2). However, the planar shape of the display panel (100) is not limited thereto, and may have a polygonal, circular, oval, or irregular planar shape other than a rectangular shape.

The display area (DA) is an area where an image is displayed, and the non-display area (NDA) may be an area where an image is not displayed. The planar shape of the display area (DA) may follow the planar shape of the display panel (100). In FIG. 1, the planar shape of the display area (DA) is exemplified as being a square. The display area (DA) may be arranged in the central area of the display panel (100). The non-display area (NDA) may be arranged around the display area (DA). The non-display area (NDA) may be arranged to surround the display area (DA).

The display area (DA) of the display panel (100) may include a plurality of pixels (PX). A pixel (PX) may be defined as the minimum light-emitting unit capable of displaying white light.

Each of the plurality of pixels (PX) may include a plurality of light-emitting areas (EA1, EA2, EA3) that emit light. In the embodiment of the present specification, it is exemplified that each of the plurality of pixels (PX) includes three light-emitting areas (EA1, EA2, EA3), but the present invention is not limited thereto. For example, each of the plurality of pixels (PX) may include four light-emitting areas.

Each of the plurality of light-emitting areas (EA1, EA2, EA3) may include a light-emitting element (LE) that emits first light. The light-emitting element (LE) is exemplified as having a rectangular planar shape, but the embodiment of the present specification is not limited thereto. For example, the light-emitting element (LE) may have a polygonal, circular, elliptical, or irregular shape other than a rectangular shape.

Each of the first light-emitting areas (EA1) refers to an area that emits first light. Each of the first light-emitting areas (EA1) can directly emit the first light emitted from the light-emitting element (LE). The first light may be light in a blue wavelength band. The blue wavelength band may be approximately 370 nm to 460 nm, but the embodiments of the present specification are not limited thereto.

Each of the second light-emitting regions (EA2) refers to a region that emits second light. Each of the second light-emitting regions (EA2) can convert first light emitted from the light-emitting element (LE) into second light and emit it. The second light can be light in a green wavelength band. The green wavelength band can be approximately 480 nm to 560 nm, but the embodiments of the present specification are not limited thereto.

Each of the third light-emitting regions (EA3) refers to a region that emits third light. Each of the third light-emitting regions (EA2) can convert first light emitted from the light-emitting element (LE) into third light and emit it. The third light can be light in a red wavelength band. The red wavelength band can be approximately 600 nm to 750 nm, but the embodiments of the present specification are not limited thereto.

The first light-emitting areas (EA1), the second light-emitting areas (EA2), and the third light-emitting areas (EA3) may be arranged alternately in the first direction (DR1). For example, the first light-emitting areas (EA1), the second light-emitting areas (EA2), and the third light-emitting areas (EA3) may be arranged in the order of the first light-emitting area (EA1), the second light-emitting area (EA2), and the third light-emitting area (EA3) in the first direction (DR1).

The first light-emitting areas (EA1) can be arranged in the second direction (DR2). The second light-emitting areas (EA2) can be arranged in the second direction (DR2). The third light-emitting areas (EA3) can be arranged in the second direction (DR2).

A plurality of light-emitting areas (EA1, EA2, EA3) can be partitioned by a partition wall (PW). The partition wall (PW) can be arranged to surround the light-emitting element (LE). The partition wall (PW) can be arranged spaced apart from the light-emitting element (LE). The partition wall (PW) can have a planar shape in the form of a mesh, a net, or a lattice.

In FIGS. 2 and 3, each of the plurality of light-emitting areas (EA1, EA2, EA3) defined by the partition wall (PW) has a rectangular planar shape, but the embodiment of the present specification is not limited thereto. For example, each of the plurality of light-emitting areas (EA1, EA2, EA3) defined by the partition wall (PW) may have a polygonal, circular, elliptical, or irregular shape other than a rectangular shape.

The non-display area (NDA) may include a first pad portion (PDA1) and a second pad portion (PDA2).

The first pad portion (PDA1) may be placed in a non-display area (NDA). The first pad portion (PDA1) may be placed on the upper side of the display panel (100). The first pad portion (PDA1) may include first pads (PD1) connected to an external circuit board (CB of FIG. 4).

The second pad portion (PDA2) may be arranged in the non-display area (NDA). The second pad portion (PDA2) may be arranged on the lower side of the semiconductor circuit board (CSUB). The second pad portion (PDA2) may include second pads for connecting to an external circuit board (CB of FIG. 4). The second pad portion (PDA2) may be omitted.

Additionally, the non-display area (NDA) may further include a common electrode connection (CPA) surrounding the display area (DA).

A common electrode connection (CPA) may be arranged in a non-display area (NDA), and may be arranged between a first pad portion (PDA1) and a display area (DA), and between a second pad portion (PDA2) and the display area (DA). In addition, the common electrode connection (CPA) may be arranged on one side and the other side of the display area (DA) in a first direction (DR1), and on one side and the other side of the second direction (DR2). The common electrode connection (CPA) may include a plurality of connection electrodes (CCPs) for being connected to a semiconductor circuit board.

Although FIG. 1 illustrates a configuration in which the common electrode connection (CPA) completely surrounds the display area (DA), the embodiment of the present specification is not limited thereto. For example, the common electrode connection (CPA) may be arranged on one side, both sides, or at least three sides of the display area (DA).

FIG. 4 is a cross-sectional view showing an example of a display panel cut along line Q1-Q1' of FIG. 2. FIG. 5 is a cross-sectional view showing an example of a display panel cut along line Q2-Q2' of FIG. 2. FIG. 6 is a plan view showing an example of a wavelength conversion substrate of a display panel according to an embodiment. FIG. 7 is a plan view showing an example of a light-emitting element layer of a display panel according to an embodiment. FIG. 8 is a cross-sectional view showing an example of a light-emitting element of a display panel according to an embodiment.

Referring to FIGS. 4 to 8, a display panel (100) according to one embodiment may include a semiconductor circuit board (110), a light emitting element layer (120), and a wavelength conversion substrate (200).

The semiconductor circuit board (110) may include a plurality of pixel circuit units (PXC), pixel electrodes (111), contact electrodes (112), first pads (PD1), common contact electrodes (113), and a circuit insulation layer (CINS).

The semiconductor circuit board (110) is a silicon wafer substrate formed using a semiconductor process and may be the first substrate. A plurality of pixel circuit units (PXC) of the semiconductor circuit board (110) may be formed using a semiconductor process.

A plurality of pixel circuit units (PXC) can be arranged in a display area (DA) and a non-display area (NDA). Each of the plurality of pixel circuit units (PXC) can be connected to a corresponding pixel electrode (111). That is, the plurality of pixel circuit units (PXC) and the plurality of pixel electrodes (111) can be connected in a one-to-one correspondence. Each of the plurality of pixel circuit units (PXC) can overlap the light-emitting element (LE) in the third direction (DR3).

Each of the plurality of pixel circuits (PXC) may include at least one transistor formed by a semiconductor process. In addition, each of the plurality of pixel circuits (PXC) may further include at least one capacitor formed by a semiconductor process. The plurality of pixel circuits (PXC) may include, for example, a CMOS circuit. Each of the plurality of pixel circuits (PXC) may apply a pixel voltage or an anode voltage to the pixel electrode (111).

A circuit insulation layer (CINS) can be arranged on a plurality of pixel circuit units (PXC). The circuit insulation layer (CINS) protects the plurality of pixel circuit units (PXC) and can flatten steps of the plurality of pixel circuit units (PXC). The circuit insulation layer (CINS) can expose the pixel electrodes (111) respectively so that the pixel electrodes (111) can be connected to the light emitting element layer (120). The circuit insulation layer (CINS) can include an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), aluminum oxide (AlxOy), aluminum nitride (AlN), or the like.

A plurality of pixel electrodes (111) may be arranged on a corresponding pixel circuit unit (PXC). Each of the pixel electrodes (111) may be an exposed electrode exposed from the pixel circuit unit (PXC). Each of the pixel electrodes (111) may be formed integrally with the pixel circuit unit (PXC). Each of the pixel electrodes (111) may receive a pixel voltage or an anode voltage from the pixel circuit unit (PXC). The pixel electrodes (111) may include a metal material such as aluminum (Al).

The contact electrodes (112) may be arranged on the corresponding pixel electrodes (111). The contact electrodes (112) may include a metal material for bonding the pixel electrodes (111) and the light emitting elements (LE). For example, the contact electrodes (112) may include at least one of gold (Au), copper (Cu), aluminum (Al), and tin (Sn). Alternatively, the contact electrodes (112) may include a first layer including one of gold (Au), copper (Cu), aluminum (Al), and tin (Sn) and a second layer including another one of gold (Au), copper (Cu), aluminum (Al), and tin (Sn).

The common contact electrode (113) may be arranged at the common electrode connection portion (CPA) of the non-display area (NDA). The common contact electrode (113) may be arranged to surround the display area (DA). The common contact electrode (113) may be connected to one of the first pads (PD1) of the first pad portion (PDA1) through a circuit portion formed in the non-display area (NDA) to receive a common voltage. The common contact electrode (113) may include the same material as the contact electrodes (112). That is, the common contact electrode (113) and the contact electrodes (112) may be formed by the same process.

Each of the first pads (PD1) may be connected to a pad electrode (CPD) of a circuit board (CB) via a conductive connecting member, such as a corresponding wire (WR). That is, the first pads (PD1), the wires (WR), and the pad electrodes (CPD) of the circuit board (CB) may be connected one-to-one with each other. The semiconductor circuit board (110) and the circuit board (CB) may be arranged on a base substrate (BSUB). However, the embodiment of the present specification is not limited thereto, and the base substrate (BSUB) may be omitted.

The circuit board (CB) may be a flexible printed circuit board (FPCB), a printed circuit board (PCB), a flexible printed circuit (FPC), or a flexible film such as a chip on film (COF).

Meanwhile, the second pads of the second pad unit (PDA2) may be substantially identical to the first pad (PD1) described in connection with FIGS. 4 and 5, and therefore, a description thereof is omitted.

The light emitting element layer (120) may include light emitting elements (LE), a first insulating layer (INS1), a connection electrode (125), a common connection electrode (127), and a first reflective layer (RF1).

The light emitting element layer (120) may include light emitting elements (LEs) corresponding to first light emitting areas (EA1), second light emitting areas (EA2), and third light emitting areas (EA3) respectively partitioned by the partition walls (PW) of the wavelength conversion substrate (200). Light emitting elements (LEs) may be arranged in a one-to-one correspondence in each of the first light emitting areas (EA1), second light emitting areas (EA2), and third light emitting areas (EA3).

The light emitting element (LE) may be disposed on the contact electrode (112) in each of the first light emitting areas (EA1), the second light emitting areas (EA2), and the third light emitting areas (EA3). The light emitting element (LE) may be a vertical light emitting diode element that extends in a third direction (DR3). That is, the length of the light emitting element (LE) in the third direction (DR3) may be longer than the length in the horizontal direction. The length in the horizontal direction refers to the length in the first direction (DR1) or the length in the second direction (DR2). For example, the length of the light emitting element (LE) in the third direction (DR3) may be approximately 1 to 5 μm.

The light emitting element (LE) may be a micro light emitting diode element. The light emitting element (LE) may include a connection electrode (125), a first semiconductor layer (SEM1), an electron blocking layer (EBL), an active layer (MQW), a superlattice layer (SLT), a second semiconductor layer (SEM2), and a third semiconductor layer (SEM3) in a third direction (DR3), as shown in FIG. 8. The connection electrode (125), the first semiconductor layer (SEM1), the electron blocking layer (EBL), the active layer (MQW), the superlattice layer (SLT), the second semiconductor layer (SEM2), and the third semiconductor layer (SEM3) may be sequentially stacked in the third direction (DR3).

As illustrated in FIG. 8, the light emitting element (LE) may have a cylindrical, disk, or rod shape with a width longer than a height. However, the present invention is not limited thereto, and the light emitting element (LE) may have various shapes, such as a shape of a rod, wire, tube, etc., a polygonal column such as a cube, a rectangular parallelepiped, a hexagonal column, etc., or a shape that extends in one direction but has an outer surface that is partially inclined.

The connection electrode (125) may be placed on the contact electrode (112). The connection electrode (125) may be bonded to the contact electrode (112) and may serve to apply a light-emitting signal to the light-emitting element (LE). The connection electrode (125) may be an Ohmic connection electrode. However, it is not limited thereto, and may also be a Schottky connection electrode. The light-emitting element (LE) may include at least one connection electrode (125). In FIG. 8, the light-emitting element (LE) includes one connection electrode (125), but is not limited thereto. In some cases, the light-emitting element (LE) may include a greater number of connection electrodes (125) or may be omitted. The description of the light-emitting element (LE) described below may be equally applied even if the number of connection electrodes (125) is different or a different structure is further included.

The connecting electrode (125) can reduce the resistance between the light emitting element (LE) and the contact electrode when the light emitting element (LE) is electrically connected to the contact electrode in the display device (10) according to one embodiment. The connecting electrode (125) can include a conductive metal. For example, the connecting electrode (125) can include at least one of gold (Au), copper (Cu), tin (Sn), titanium (Ti), aluminum (Al), and silver (Ag). For example, the connecting electrode (125) can include a 9:1 alloy, an 8:2 alloy, or a 7:3 alloy of gold and tin, or can include an alloy of copper, silver, and tin (SAC305).

The first semiconductor layer (SEM1) may be disposed on the connection electrode (125). The first semiconductor layer (SEM1) may be a p-type semiconductor and may include a semiconductor material having a chemical formula of AlxGayIn1-x-yN (0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, it may be at least one of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with p-type. The first semiconductor layer (SEM1) may be doped with a p-type dopant, and the p-type dopant may be Mg, Zn, Ca, Se, Ba, or the like. For example, the first semiconductor layer (SEM1) may be p-GaN doped with p-type Mg. The thickness of the first semiconductor layer (SEM1) may have a range of 30 nm to 200 nm, but is not limited thereto.

An electron blocking layer (EBL) may be disposed on the first semiconductor layer (SEM1). The electron blocking layer (EBL) may be a layer for suppressing or preventing too many electrons from flowing into the active layer (MQW). For example, the electron blocking layer (EBL) may be p-AlGaN doped with p-type Mg. The thickness of the electron blocking layer (EBL) may range from 10 nm to 50 nm, but is not limited thereto. In addition, the electron blocking layer (EBL) may be omitted.

The active layer (MQW) can be disposed on the electron blocking layer (EBL). The active layer (MQW) can emit light by the combination of electron-hole pairs according to an electric signal applied through the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2). The active layer (MQW) can emit first light having a center wavelength band in a range of 450 nm to 495 nm, i.e., light in a blue wavelength band.

The active layer (MQW) may include a material having a single or multiple quantum well structure. When the active layer (MQW) includes a material having a multiple quantum well structure, it may have a structure in which a plurality of well layers and barrier layers are alternately laminated. In this case, the well layers may be formed of InGaN, and the barrier layer may be formed of GaN or AlGaN, but is not limited thereto. The thickness of the well layers may be approximately 1 to 4 nm, and the thickness of the barrier layer may be 3 to 10 nm.

Alternatively, the active layer (MQW) may have a structure in which semiconductor materials having a large band gap energy and semiconductor materials having a small band gap energy are alternately laminated, and may include other group III to group V semiconductor materials depending on the wavelength of the light emitted. The light emitted by the active layer (MQW) is not limited to the first light, and may also emit the second light (light in the green wavelength band) or the third light (light in the red wavelength band) depending on the case.

A superlattice layer (SLT) may be arranged on the active layer (MQW). The superlattice layer (SLT) may be a layer for relieving stress between the second semiconductor layer (SEM2) and the active layer (MQW). For example, the superlattice layer (SLT) may be formed of InGaN or GaN. The thickness of the superlattice layer (SLT) may be approximately 50 to 200 nm. The superlattice layer (SLT) may be omitted.

The second semiconductor layer (SEM2) may be disposed on the superlattice layer (SLT). The second semiconductor layer (SEM2) may be an n-type semiconductor. The second semiconductor layer (SEM2) may include a semiconductor material having a chemical formula of AlxGayIn1-x-yN (0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, it may be at least one of n-type doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The second semiconductor layer (SEM2) may be doped with an n-type dopant, and the n-type dopant may be Si, Ge, Sn, or the like. For example, the second semiconductor layer (SEM2) may be n-GaN doped with n-type Si. The thickness of the second semiconductor layer (SEM2) may have a range of 2 μm to 4 μm, but is not limited thereto.

As illustrated in FIG. 5, the second semiconductor layer (SEM2) may be a common layer that is commonly connected to and arranged for a plurality of light-emitting elements (LE). The second semiconductor layer (SEM2) may be formed in a patterned shape in which at least a portion thereof is arranged in each of the light-emitting elements (LE) in the third direction (DR3), and the remaining portion thereof may be continuously extended in the first direction (DR1) and commonly arranged for a plurality of light-emitting elements (LE). The second semiconductor layer (SEM2) enables a common voltage applied through the common contact electrode (113) to be commonly applied to the plurality of light-emitting elements (LE).

A third semiconductor layer (SEM3) described below is arranged as a common layer with the second semiconductor layer (SEM2), but since the third semiconductor layer (SEM3) does not have conductivity, a signal can be applied through the second semiconductor layer (SEM2) that has conductivity. The second semiconductor layer (SEM2) and the third semiconductor layer (SEM3) can be arranged to extend from the display area (DA) to the non-display area (NDA). The thickness (T1) of the region of the second semiconductor layer (SEM2) overlapping with the first semiconductor layer (SEM1) of the light-emitting element (LE) can be greater than the thickness (T2) of the region that does not overlap with the first semiconductor layer (SEM1).

The third semiconductor layer (SEM3) can be disposed on the second semiconductor layer (SEM2). The third semiconductor layer (SEM3) can be an undoped semiconductor. The third semiconductor layer (SEM3) can include the same material as the second semiconductor (SEM2), but can be a material that is not doped with an n-type or p-type dopant. In an exemplary embodiment, the third semiconductor layer (SEM3) can be at least one of undoped InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, but is not limited thereto.

The third semiconductor layer (SEM3) may be a common layer commonly connected to a plurality of light-emitting elements (LE). The third semiconductor layer (SEM3) may extend continuously in the first direction (DR1) and be commonly arranged on a plurality of light-emitting elements (LE). The third semiconductor layer (SEM3) may act as a base layer for the plurality of light-emitting elements (LE). In the manufacturing process of the light-emitting element layer described below, the constituent layers of the light-emitting elements (LE) are manufactured on the third semiconductor layer (SEM3), so that the third semiconductor layer (SEM3) acts as a base layer. The thickness (T3) of the third semiconductor layer (SEM3) may be smaller than the thickness (T1) of the first semiconductor region (SEP1) of the second semiconductor layer (SEM2) and larger than the thickness (T2) of the second semiconductor region (SEP2).

Meanwhile, a common connection electrode (127) may be arranged at the common electrode connection portion (CPA) of the non-display area (NDA). The common connection electrode (127) may be arranged on one surface of the second semiconductor layer (SEM2). The common connection electrode (127) may play a role in transmitting a common voltage signal of the light emitting elements (LEs) from the common contact electrode (113). The common connection electrode (127) may be made of the same material as the connection electrodes (125). The common connection electrode (127) may have a thick thickness (T4) in the third direction (DR3) in order to be connected to the common contact electrode (113). The thickness (T4) of the common connection electrode (127) may be greater than the thickness (T5) of the connection electrode (125).

The light-emitting elements (LE) described above can be supplied with the pixel voltage or anode voltage of the pixel electrode (111) through the connecting electrode (125) and can be supplied with a common voltage through the second semiconductor layer (SEM2). The light-emitting elements (LE) can emit light with a predetermined brightness depending on the voltage difference between the pixel voltage and the common voltage.

The first insulating layer (INS1) can be disposed on the side surface of the common connection electrode (127), the side surface and upper surface of the second semiconductor layer (SEM2), the side surfaces of each of the light-emitting elements (LEs), and the side surface of the connection electrode (125). The first insulating layer (INS1) can insulate the common connection electrode (127), the second semiconductor layer (SEM2), the light-emitting elements (LEs), and the connection electrode (125) from other layers.

As illustrated in FIG. 6, the first insulating layer (INS1) may be arranged to surround the light emitting elements (LE). The first insulating layer (INS1) may include an inorganic insulating material, such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), aluminum oxide (AlxOy), aluminum nitride (AlN), or the like. The thickness of the first insulating layer (INS1) may be approximately 0.1 μm, but is not limited thereto.

The first reflective layer (RF1) reflects light emitted from the light emitting element (LE) in the direction of the sides, not in the upward direction. The first reflective layer (RF1) can be arranged in the display area (DA) and the non-display area (NDA). The first reflective layer (RF1) can be arranged to overlap the first light emitting area (EA1), the second light emitting area (EA2), and the third light emitting area (EA3) in the display area (DA).

The first reflective layer (RF1) may be disposed on side surfaces of the common connection electrode (127), side surfaces of the connection electrodes (125), and side surfaces of each of the light-emitting elements (LE). The first reflective layer (RF1) may be disposed directly on the first insulating layer (INS1), and may be disposed on a side surface of the first insulating layer (INS1). The first reflective layer (RF1) may be disposed spaced apart from the common connection electrode (127), the connection electrode (125), and the light-emitting elements (LE).

As illustrated in FIG. 6, the first reflective layer (RF1) may be arranged to surround the light emitting elements (LE) in the display area (DA). The light emitting elements (LE) may each be surrounded by a first insulating layer (INS1), and the first insulating layer (INS1) may be surrounded by the first reflective layer (RF1). The first reflective layers (RF1) may be arranged to be spaced apart from each other, and may be arranged to be spaced apart from the first reflective layers (RF1) of adjacent light emitting elements (LE). That is, the first reflective layers (RF1) may be arranged to be spaced apart from each other in the first direction (DR1) and the second direction (DR2). In the drawing, the planar shapes of the first reflective layer (RF1) and the first insulating layer (INS1) are illustrated as a square closed loop shape, but are not limited thereto and may have various shapes depending on the planar shape of the light emitting element (LE).

The first reflective layer (RF1) may include a metal material having a high reflectivity, such as aluminum (Al). The thickness of the first reflective layer (RF1) may be approximately 0.1 μm, but is not limited thereto.

Meanwhile, a wavelength conversion substrate (200) may be placed on the light emitting element layer (120). The wavelength conversion substrate (200) may include an upper substrate (210), a partition wall (PW), color filters (CF1, CF2, CF3), a second reflection layer (RF2), a wavelength conversion layer (QDL), and a first protective layer (PTF1).

The upper substrate (210) may be a second substrate facing the semiconductor circuit substrate (110), which is the first substrate. The upper substrate (210) is disposed on the uppermost part of the wavelength conversion substrate (200) and may be a base substrate that supports the wavelength conversion substrate (200). The upper substrate (210) may face the semiconductor circuit substrate (110). The upper substrate (210) may include a transparent substrate, such as a sapphire substrate (Al ₂ O ₃ ), glass, etc. However, the present invention is not limited thereto, and may be formed of a conductive substrate, such as GaN, SiC, ZnO, Si, GaP, and GaAs. Hereinafter, a case in which the upper substrate (210) is a sapphire substrate (Al ₂ O ₃ ) will be described as an example. The thickness of the upper substrate (210) is not particularly limited, but, for example, the upper substrate (210) may have a thickness in a range of 400 μm to 1500 μm.

The partition wall (PW) may be arranged on one surface of the upper substrate (210). As illustrated in FIGS. 5 and 7, the partition wall (PW) may define a first light-emitting area (EA1), a second light-emitting area (EA2), and a third light-emitting area (EA3) by dividing them. The partition wall (PW) may be arranged to extend in the first direction (DR1) and the second direction (DR2), and may be formed in a grid-shaped pattern throughout the entire display area (DA). In addition, the partition wall (PW) may extend from the display area (DA) to the non-display area (NDA) and may be arranged throughout the non-display area (NDA).

The partition wall (PW) may include a plurality of openings (OP1, OP2, OP3) exposing the upper substrate (210) in the display area (DA). The plurality of openings (OP1, OP2, OP3) may include a first opening (OP1) overlapping the first light-emitting area (EA1), a second opening (OP2) overlapping the second light-emitting area (EA2), and a third opening (OP3) overlapping the third light-emitting area (EA3). Here, the plurality of openings (OP1, OP2, OP3) may correspond to the plurality of light-emitting areas (EA1, EA2, EA3). That is, the first opening (OP1) may correspond to the first light-emitting area (EA1), the second opening (OP2) may correspond to the second light-emitting area (EA2), and the third opening (OP3) may correspond to the third light-emitting area (EA3). On the other hand, the bulkhead (PW) does not have multiple openings in the non-display area (NDA) and can form a flat film.

The partition wall (PW) may serve to partition the light-emitting areas (EA1, EA2, EA3) and provide a space for forming color filters (CF1, CF2, CF3) described later. To this end, the partition wall (PW) may be formed with a predetermined thickness, and for example, the thickness of the partition wall (PW) may be formed in a range of 1 ㎛ to 10 ㎛.

The barrier rib (PW) may include silicon (Si). For example, the barrier rib (PW) may include a silicon single crystal layer. The barrier rib (PW) including silicon can be etched at a high aspect ratio using a deep reactive ion etching (DRIE) method, thereby making it easy to manufacture a barrier rib (PW) having a high aspect ratio. Accordingly, the barrier rib (PW) can form ultra-high-resolution light-emitting areas (EA1, EA2, EA3), and thus, an ultra-high-resolution display device (10) can be manufactured.

A plurality of color filters (CF1, CF2, CF3) can be arranged in a plurality of openings (OP1, OP2, OP3) of the partition wall (PW). The plurality of color filters (CF1, CF2, CF3) can include a first color filter (CF1), a second color filter (CF2), and a third color filter (CF3).

The first color filter (CF1) may be arranged to overlap the first light-emitting area (EA1). In addition, the first color filter (CF1) may be arranged within the first opening (OP1) of the partition wall (PW) to fill the first opening (OP1). The first color filter (CF1) may transmit the first light emitted from the light-emitting element (LE) and absorb or block the second light and the third light. For example, the first color filter (CF1) may transmit light in a blue wavelength band and absorb or block light in other wavelength bands, such as green and red.

The second color filter (CF2) may be arranged to overlap the second light-emitting area (EA2). In addition, the second color filter (CF2) may be arranged within the second opening (OP2) of the partition wall (PW) to fill the second opening (OP2). The second color filter (CF2) may transmit the second light and absorb or block the first light and the third light. For example, the second color filter (CF2) may transmit light in a green wavelength band and absorb or block light in other wavelength bands, such as blue and red.

The third color filter (CF3) may be arranged to overlap the third light-emitting area (EA3). In addition, the third color filter (CF3) may be arranged within the third opening (OP3) of the partition wall (PW) to fill the third opening (OP3). The third color filter (CF3) may transmit the third light and absorb or block the first light and the second light. For example, the third color filter (CF3) may transmit light in a red wavelength band and absorb or block light in other wavelength bands, such as blue and green.

Top surfaces of the plurality of color filters (CF1, CF2, CF3) may coincide with a top surface of the partition wall (PW). The first color filter (CF1) fills the first opening (OP1), and a top surface of the first color filter (CF1) may coincide with a top surface of the partition wall (PW). The second color filter (CF2) fills the second opening (OP2), and a top surface of the second color filter (CF2) may coincide with a top surface of the partition wall (PW) and a top surface of the first color filter (CF1). The third color filter (CF3) fills the third opening (OP3), and a top surface of the third color filter (CF3) may coincide with a top surface of the partition wall (PW), a top surface of the first color filter (CF1), and a top surface of the second color filter (CF2). However, the present invention is not limited thereto, and the upper surface of at least one color filter may be higher than the upper surface of another color filter or may be higher than the upper surface of the partition wall (PW).

The second reflective layer (RF2) may be arranged within the plurality of openings (OP1, OP2, OP3) of the partition wall (PW). The second reflective layer (RF2) may be arranged on each side of the partition wall (PW). The side of the partition wall (PW) may include each side of the plurality of openings (OP1, OP2, OP3) formed in the partition wall (PW). The second reflective layer (RF2) reflects light emitted from the light emitting element (LE) that travels in the left and right lateral directions rather than the upper direction. The second reflective layer (RF2) may be arranged in the display area (DA), and may be arranged to overlap the first light emitting area (EA1), the second light emitting area (EA2), and the third light emitting area (EA3).

As illustrated in FIG. 7, the second reflective layer (RF2) may be arranged to surround the plurality of color filters (CF1, CF2, CF3) in the display area (DA). The second reflective layers (RF2) may be arranged to be spaced apart from each other, and may be arranged to be spaced apart from the second reflective layers (RF2) of adjacent color filters. That is, the second reflective layers (RF2) may be arranged to be spaced apart from each other in the first direction (DR1) and the second direction (DR2). In the drawing, the planar shape of the second reflective layer (RF2) is illustrated as a square closed loop shape, but is not limited thereto, and may have various shapes depending on the planar shape of the openings (OP1, OP2, OP3) of the partition wall (PW).

The second reflective layer (RF2) may include the same material as the first reflective layer (RF1) described above, and may include, for example, a metal material having a high reflectivity, such as aluminum (Al). The thickness of the second reflective layer (RF2) may be approximately 0.1 μm, but is not limited thereto.

The wavelength conversion layer (QDL) can be disposed on a plurality of color filters (CF1, CF2, CF3). The wavelength conversion layer (QDL) can convert or shift a peak wavelength of incident light into light of another specific peak wavelength and emit the converted light. The wavelength conversion layer (QDL) can convert a portion of the first blue light emitted from the light emitting element (LE) into fourth yellow light. In the wavelength conversion layer (QDL), the first light and the fourth light can be mixed to emit fifth white light. The fifth light can be converted into first light through the first color filter (CF1), converted into second light through the second color filter (CF2), and converted into third light through the third color filter (CF3).

The wavelength conversion layer (QDL) is arranged to overlap each of the first color filter (CF1), the second color filter (CF2), and the third color filter (CF3), and may be arranged spaced apart from each other. The wavelength conversion layer (QDL) may be formed in an island pattern spaced apart from each other. The wavelength conversion layer (QDL) may correspond one-to-one with a plurality of openings (OP1, OP2, OP3) arranged in the partition wall (PW) and may overlap the plurality of openings (OP1, OP2, OP3). In an exemplary embodiment, each of the wavelength conversion layers (QDL) may completely overlap the plurality of openings (OP1, OP2, OP3).

The wavelength conversion layer (QDL) may include a first base resin (BRS1) and first wavelength conversion particles (WCP1). The first base resin (BRS1) may include a light-transmitting organic material. For example, the first base resin (BRS1) may include an epoxy-based resin, an acrylic-based resin, a cardo-based resin, or an imide-based resin.

The first wavelength conversion particle (WCP1) can convert the first light incident from the light-emitting element (LE) into the fourth light. For example, the first wavelength conversion particle (WCP1) can convert light in a blue wavelength band into light in a yellow wavelength band. The first wavelength conversion particle (WCP1) can be a quantum dot (QD), a quantum rod, a fluorescent material, or a phosphorescent material. For example, a quantum dot can be a particulate material that emits a specific color when electrons transition from a conduction band to a valence band.

The above quantum dot may be a semiconductor nanocrystal material. The quantum dot may have a specific band gap depending on its composition and size, and may absorb light and then emit light having a unique wavelength. Examples of the semiconductor nanocrystal of the quantum dot may include a group IV nanocrystal, a group II-VI compound nanocrystal, a group III-V compound nanocrystal, a group IV-VI nanocrystal, or a combination thereof.

The II-VI group compound is a binary compound selected from the group consisting of CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnO, HgS, HgSe, HgTe, MgSe, MgS and mixtures thereof; a ternary compound selected from the group consisting of InZnP, AgInS, CuInS, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnTe, CdHgS, CdHgSe, CdHgTe, HgZnS, HgZnSe, HgZnTe, MgZnSe, MgZnS and mixtures thereof; and a group consisting of four-element compounds selected from the group consisting of HgZnTeS, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe, HgZnSTe and mixtures thereof.

The group III-V compound may be selected from the group consisting of binary compounds selected from the group consisting of GaN, GaP, GaAs, GaSb, AlN, AlP, AlAs, AlSb, InN, InP, InAs, InSb, and mixtures thereof; ternary compounds selected from the group consisting of GaNP, GaNAs, GaNSb, GaPAs, GaPSb, AlNP, AlNAs, AlNSb, AlPAs, AlPSb, InGaP, InNP, InAlP, InNAs, InNSb, InPAs, InPSb, GaAlNP, and mixtures thereof; and quaternary compounds selected from the group consisting of GaAlNAs, GaAlNSb, GaAlPAs, GaAlPSb, GaInNP, GaInNAs, GaInNSb, GaInPAs, GaInPSb, InAlNP, InAlNAs, InAlNSb, InAlPAs, InAlPSb, and mixtures thereof.

The group IV-VI compound may be selected from the group consisting of a binary compound selected from the group consisting of SnS, SnSe, SnTe, PbS, PbSe, PbTe, and mixtures thereof; a ternary compound selected from the group consisting of SnSeS, SnSeTe, SnSTe, PbSeS, PbSeTe, PbSTe, SnPbS, SnPbSe, SnPbTe, and mixtures thereof; and a quaternary compound selected from the group consisting of SnPbSSe, SnPbSeTe, SnPbSTe, and mixtures thereof. The group IV element may be selected from the group consisting of Si, Ge, and mixtures thereof. The group IV compound may be a binary compound selected from the group consisting of SiC, SiGe, and mixtures thereof.

At this time, the binary, ternary or quaternary compound may exist in the particle at a uniform concentration, or may exist in the same particle with a partially different concentration distribution. In addition, one quantum dot may have a core/shell structure surrounding another quantum dot. The interface between the core and the shell may have a concentration gradient in which the concentration of the element existing in the shell decreases toward the center.

In one embodiment, the quantum dot may have a core-shell structure including a core including the aforementioned nanocrystal and a shell surrounding the core. The shell of the quantum dot may serve as a protective layer to maintain semiconductor properties by preventing chemical modification of the core and/or as a charging layer to impart electrophoretic properties to the quantum dot. The shell may be a single layer or a multilayer. Examples of the shell of the quantum dot include an oxide of a metal or a non-metal, a semiconductor compound, or a combination thereof.

For example, the oxide of the metal or non-metal may be a binary compound such as SiO ₂ , Al ₂ O ₃ , TiO ₂ , ZnO, MnO, Mn ₂ O ₃ , Mn ₃ O ₄ , CuO, _FeO , Fe ₂ O ₃ , Fe ₃ O ₄ , CoO, Co ₃ O ₄ , NiO, or a ternary compound such as MgAl ₂ O ₄ , CoFe ₂ O ₄ , NiFe 2 O 4 , _{CoMn 2} O ₄ , but the present invention is not limited thereto.

In addition, the semiconductor compound may include, but is not limited to, CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnSeS, ZnTeS, GaAs, GaP, GaSb, HgS, HgSe, HgTe, InAs, InP, InGaP, InSb, AlAs, AlP, AlSb, etc.

The wavelength conversion layer (QDL) may further include a scatterer for randomly scattering light of the light emitting element (LE). The scatterer may have a different refractive index from the first base resin (BRS1) and may form an optical interface with the first base resin (BRS1). For example, the scatterer may be a light-scattering particle. The scatterer is not particularly limited as long as it is a material capable of scattering at least a portion of transmitted light, and may be, for example, a metal oxide particle or an organic particle. Examples of the metal oxide include titanium oxide (TiO ₂ ), zirconium oxide (ZrO ₂ ), aluminum oxide (Al ₂ O ₃ ), indium oxide (In ₂ O ₃ ), zinc oxide (ZnO), or tin oxide (SnO ₂ ), and examples of the material of the organic particle include an acrylic resin or a urethane resin. The scatterer may scatter light in a random direction regardless of the incident direction of incident light without substantially converting a wavelength of the light.

As the wavelength conversion layer (QDL) has a larger thickness in the third direction (DR3), the content of the first wavelength conversion particles (WCP1) included in the wavelength conversion layer (QDL) increases, so that the light conversion efficiency of the wavelength conversion layer (QDL) can increase. Therefore, it is preferable that the thickness of the wavelength conversion layer (QDL) be set in consideration of the light conversion efficiency of the wavelength conversion layer (QDL).

In the wavelength conversion substrate (200) described above, some of the first light emitted from the light emitting element (LE) can be converted into fourth light in the wavelength conversion layer (QDL). In the wavelength conversion layer (QDL), the first light and the fourth light can be mixed to emit white fifth light. The fifth light emitted from the wavelength conversion layer (QDL) can transmit only the first light in the first color filter (CF1), only the second light in the second color filter (CF2), and only the third light in the third color filter (CF3). Accordingly, the light emitted from the wavelength conversion substrate (200) can be blue, red, and green light of the first light, the second light, and the third light, thereby implementing full color.

The first protective layer (PTF1) is disposed on the barrier rib (PW) and the wavelength conversion layer (QDL), and can cover them. The first protective layer (PTF1) can be disposed over the entire display area (DA) and the non-display area (NDA). The first protective layer (PTF1) protects the wavelength conversion layer (QDL) in the display area (DA), and can level a step formed by the wavelength conversion layer (QDL). One surface of the first protective layer (PTF1) adjacent to the light emitting element (LE) can be flat.

The first protective layer (PTF1) can be disposed between the light-emitting element (LE) and the wavelength conversion layer (QDL), and can prevent wavelength conversion particles (WCP1) of the wavelength conversion layer (QDL) from being damaged due to heat generation of the light-emitting element (LE). The thickness of the first protective layer (PTF1) can be approximately 1 to 10 μm at the thickest part. The first protective layer (PTF1) can include an organic insulating material, for example, an epoxy-based resin, an acrylic resin, a cardo-based resin, or an imide-based resin.

Meanwhile, an adhesive layer (ADL) may be placed between the light-emitting element layer (120) and the wavelength conversion substrate (200). The adhesive layer (ADL) adheres the semiconductor circuit board (110) on which the light-emitting element layer (120) is formed and the wavelength conversion substrate (200), and may include a transparent material. The adhesive layer (ADL) may include, for example, an acrylic-based, silicone-based, or urethane-based material, and may include a material that can be UV-cured or heat-cured.

As described above, the display device (10) according to one embodiment can form a partition wall (PW) including silicon on the upper substrate (210) to manufacture an ultra-high-resolution partition wall (PW). Accordingly, ultra-high-resolution light-emitting areas (EA1, EA2, EA3) can be formed to implement an ultra-high-resolution display device (10).

Below, a display device (10) according to another embodiment will be described with reference to other drawings.

FIG. 9 is a cross-sectional view showing a display panel according to another embodiment.

Referring to FIG. 9, the display device (10) may have a different configuration of the wavelength conversion layer (QDL). The present embodiment is different from the embodiments of FIGS. 4 to 8 described above in that the wavelength conversion layer (QDL) includes a light transmitting pattern (230), a first wavelength conversion pattern (240), and a second wavelength conversion pattern (250). Hereinafter, descriptions of the same configurations will be brief or omitted, and the differences will be described in detail.

The wavelength conversion layer (QDL) may include a light transmitting pattern (230), a first wavelength conversion pattern (240), and a second wavelength conversion pattern (250).

The light transmitting pattern (230) may be arranged to overlap the first light emitting area (EA1) and the first color filter (CF1). The light transmitting pattern (230) may transmit incident light. The first light emitted from the light emitting element (LE) arranged in the first light emitting area (EA1) may be blue light. The first light, which is blue light, may transmit through the light transmitting pattern (230) and be emitted into the first light emitting area (EA1).

In one embodiment, the light transmitting pattern (230) may include a second base resin (BRS2). The second base resin (BRS2) may be made of a material having high light transmittance. In one embodiment, the second base resin (BRS2) may be made of an organic material. The second base resin (BRS2) may include substantially the same material as the first base resin (BRS1) described above. For example, the second base resin (BRS2) may include an organic material such as an epoxy-based resin, an acrylic-based resin, a cardo-based resin, or an imide-based resin.

The first wavelength conversion pattern (240) may overlap with the second light-emitting area (EA2) and the second color filter (CF2). The first wavelength conversion pattern (240) may convert or shift the peak wavelength of incident light into light having another specific peak wavelength and emit the light. In one embodiment, the first wavelength conversion pattern (240) may convert the first light emitted from the light-emitting element (LE) of the second light-emitting area (EA2) into the second light, which is green light having a peak wavelength in a range of about 510 nm to 550 nm.

The first wavelength conversion pattern (240) may include a third base resin (BRS3) and second wavelength conversion particles (WCP2) dispersed within the third base resin (BRS3).

The third base resin (BRS3) may be made of a material having high light transmittance. In one embodiment, the third base resin (BRS3) may be made of an organic material. The third base resin (BRS3) may be made of the same material as the first base resin (BRS1) or the second base resin (BRS2), or may include at least one of the materials exemplified as their constituent materials.

The second wavelength conversion particle (WCP2) can convert or shift the peak wavelength of the incident light to another specific peak wavelength. In one embodiment, the second wavelength conversion particle (WCP2) can convert and emit light of a first color, which is blue light provided from the light emitting element (LE), into green light having a peak wavelength in a range of about 510 nm to 550 nm.

Examples of the second wavelength conversion particle (WCP2) include quantum dots, quantum rods, or fluorescent substances. A more specific description of the second wavelength conversion particle (WCP2) is omitted as it is substantially the same as or similar to the description of the first wavelength conversion particle (WCP1).

Some of the first light, which is blue light emitted from the light emitting element (LE), may not be converted into the second light, which is green light, by the second wavelength conversion particle (WCP2) and may transmit through the first wavelength conversion pattern (240). However, the light that is not converted into green light may be blocked by the second color filter (CF2). On the other hand, the green light that is converted by the first wavelength conversion pattern (240) among the first light emitted from the light emitting element (LE) transmits through the second color filter (CF2) and is emitted to the outside.

The second wavelength conversion pattern (250) may overlap with the third light-emitting area (EA3) and the third color filter (CF3). The second wavelength conversion pattern (250) may convert or shift the peak wavelength of incident light into light of another specific peak wavelength and emit the light. In one embodiment, the second wavelength conversion pattern (250) may convert the first light emitted from the light-emitting element (LE) of the third light-emitting area (EA3) into third light, which is red light having a peak wavelength in a range of about 610 nm to about 650 nm and emit the converted light.

The second wavelength conversion pattern (250) may include a fourth base resin (BRS4) and third wavelength conversion particles (WCP3) dispersed within the fourth base resin (BRS4).

The fourth base resin (BRS4) may be made of a material having high light transmittance. In one embodiment, the fourth base resin (BRS4) may be made of an organic material. The fourth base resin (BRS4) may be made of the same material as the first base resin (BRS1), the second base resin (BRS2), and the third base resin (BRS3) described above, or may include at least one of the materials exemplified as their constituent materials.

The third wavelength conversion particle (WCP3) can convert or shift the peak wavelength of the incident light to another specific peak wavelength. In one embodiment, the third wavelength conversion particle (WCP3) can convert and emit the first light, which is blue light provided from the light emitting element (LE), into the third light, which is red light having a single peak wavelength in the range of about 610 nm to about 650 nm.

Examples of the third wavelength conversion particle (WCP3) include quantum dots, quantum rods, or fluorescent substances. A more specific description of the third wavelength conversion particle (WCP3) is omitted as it is substantially the same as or similar to the description of the first wavelength conversion particle (WCP1).

Some of the first light, which is blue light emitted from the light emitting element (LE), may not be converted into the third light, which is red light, by the third wavelength conversion particle (WCP3). However, the first light, which is not converted into red light, may be blocked by the third color filter (CF3) arranged above. On the other hand, the red light converted by the second wavelength conversion pattern (250) transmits through the third color filter (CF3) and is emitted to the outside.

The first wavelength conversion pattern (240) and the second wavelength conversion pattern (250) may each further include the scatterers described above, but are not limited thereto.

The display device (10) according to the above-described embodiment can improve the light emission efficiency of blue, green, and red by forming a wavelength conversion layer (QDL) including a light transmitting pattern (230), a first wavelength conversion pattern (240), and a second wavelength conversion pattern (250).

FIG. 10 is a cross-sectional view showing a display panel according to another embodiment.

Referring to FIG. 10, the display device (10) differs from the embodiments of FIGS. 4 to 9 described above in that the lower surface of the first protective layer (PTF1) is flat. Hereinafter, descriptions of the same configuration will be brief or omitted, and the differences will be described in detail.

The first protective layer (PTF1) can be disposed on the barrier rib (PW) and the wavelength conversion layer (QDL). The first protective layer (PTF1) can be disposed over the entire display area (DA) and the non-display area (NDA). The first protective layer (PTF1) can be formed flat in the display area (DA) and the non-display area (NDA).

Specifically, the thickness (T6) of the first protective layer (PTF1) in the non-display area (NDA) may be the same as the maximum thickness (T7) of the first protective layer (PTF1) in the display area (DA). Here, the thickness of the first protective layer (PTF1) means the distance in the third direction (DR3) from the lower surface of the partition wall (PW) to the lower surface of the first protective layer (PTF1). In addition, the maximum thickness (T7) of the first protective layer (PTF1) means the thickness of the first protective layer (PTF1) that does not overlap with the plurality of light-emitting areas (EA1, EA2, EA3) in the display area (DA).

In one embodiment, the thickness of the first protective layer (PTF1) in the display area (DA) and the non-display area (NDA) is made the same, so that the lower surface of the wavelength conversion substrate (200) bonded to the light-emitting element layer (120) can be formed flat. Accordingly, the bonding between the wavelength conversion substrate (200) and the light-emitting element layer (120) can be facilitated, and the bonding strength can also be improved.

FIG. 11 is a cross-sectional view showing a display panel according to another embodiment.

Referring to FIG. 11, the display panel (100) is different from the embodiments of FIGS. 4 to 10 described above in that it further includes a second protective layer (PTF2) between a plurality of color filters (CF1, CF2, CF3) and a wavelength conversion layer (QDL). Hereinafter, descriptions of the same configuration will be brief or omitted, and the differences will be described in detail.

The second protective layer (PTF2) can be arranged across the entire display area (DA) and the non-display area (NDA), and can be arranged between the plurality of color filters (CF1, CF2, CF3) and the wavelength conversion layer (QDL). The second protective layer (PTF2) can protect the plurality of color filters (CF1, CF2, CF3) from an etchant or the like in a subsequent process.

One surface, for example, an upper surface, of the second protective layer (PTF2) can contact the lower surfaces of the barrier rib (PW), the second reflective layer (RF2), and each of the plurality of color filters (CF1, CF2, CF3). The other surface, for example, a lower surface, of the second protective layer (PTF2) can contact the upper surfaces of the wavelength conversion layer (QDL) and each of the first protective layer (PTF1).

The second protective layer (PTF2) may include an inorganic insulating material to protect the plurality of color filters (CF1, CF2, CF3). For example, the second protective layer (PTF2) may include, but is not limited to, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), aluminum oxide (AlxOy), aluminum nitride (AlN), etc. The second protective layer (PTF2) may be formed to a predetermined thickness, and for example, may be formed in a range of 0.01 to 1 ㎛. However, the present invention is not limited thereto.

In one embodiment, by including a second protective layer (PTF2) between a plurality of color filters (CF1, CF2, CF3) and a wavelength conversion layer (QDL), the plurality of color filters (CF1, CF2, CF3) can be prevented from being damaged by a subsequent process.

FIG. 12 is a cross-sectional view showing a display panel according to another embodiment.

Referring to FIG. 12, the display panel (100) is different from the embodiments of FIGS. 4 to 11 described above in that the wavelength conversion layer (QDL) is arranged within a plurality of openings (OP1, OP2, OP3) of the partition wall (PW). Hereinafter, a description of the same configuration will be brief or omitted, and the differences will be described in detail.

Unlike the embodiments described above, the partition wall (PW) may be formed with a thicker thickness. Accordingly, a plurality of color filters (CF1, CF2, CF3) and a wavelength conversion layer (QDL) may be arranged within a plurality of openings (OP1, OP2, OP3) of the partition wall (PW).

Specifically, the wavelength conversion layer (QDL) can be arranged in a plurality of openings (OP1, OP2, OP3). A first color filter (CF1), a second reflective layer (RF2), and a wavelength conversion layer (QDL) can be arranged in the first opening (OP1) arranged in the first light-emitting area (EA1). The wavelength conversion layer (QDL) can be in contact with the lower surface of the first color filter (CF1) and side surfaces of the second reflective layer (RF2). The wavelength conversion layer (QDL) fills the first opening (OP1), and the lower surface of the partition wall (PW) and the lower surface of the wavelength conversion layer (QDL) can be aligned and matched with each other.

A second color filter (CF2), a second reflective layer (RF2), and a wavelength conversion layer (QDL) can be arranged in a second opening (OP2) disposed in a second light-emitting area (EA2). The wavelength conversion layer (QDL) can be in contact with a lower surface of the second color filter (CF2) and side surfaces of the second reflective layer (RF2). The wavelength conversion layer (QDL) fills the second opening (OP2), and a lower surface of the partition wall (PW) and a lower surface of the wavelength conversion layer (QDL) can be aligned and matched with each other.

A third color filter (CF3), a second reflection layer (RF2), and a wavelength conversion layer (QDL) may be arranged in the third opening (OP3). The wavelength conversion layer (QDL) may be in contact with the lower surface of the third color filter (CF3) and side surfaces of the second reflection layer (RF2). The wavelength conversion layer (QDL) fills the third opening (OP3), and the lower surface of the barrier rib (PW) and the lower surface of the wavelength conversion layer (QDL) may be aligned and matched with each other. However, the present invention is not limited thereto, and the wavelength conversion layer (QDL) may be arranged to protrude downwardly more than the lower surface of the barrier rib (PW) or to be spaced upwardly.

The first protective layer (PTF1) can be disposed under the barrier rib (PW), the second reflection layer (RF2), and the wavelength conversion layer (QDL). The first protective layer (PTF1) can contact the lower surface of the barrier rib (PW), the lower surface of the second reflection layer (RF2), and the lower surface of the wavelength conversion layer (QDL), respectively. As described above, since the lower surface of the barrier rib (PW) and the lower surface of the wavelength conversion layer (QDL) are coincident with each other, the first protective layer (PTF1) formed on these lower surfaces can be formed flat. Since the first protective layer (PTF1) is formed flat, the adhesion between the wavelength conversion substrate (200) and the light emitting element layer (120) can be improved.

In one embodiment, by forming the partition wall (PW) thickly and forming a plurality of color filters (CF1, CF2, CF3) and wavelength conversion layers (QDL) within a plurality of openings (OP1, OP2, OP3), alignment of the plurality of color filters (CF1, CF2, CF3) and wavelength conversion layers (QDL) can be facilitated, and the thickness of the wavelength conversion layer (QDL) can be increased, thereby improving light conversion efficiency.

Fig. 13 is a cross-sectional view showing a display panel according to another embodiment. Fig. 14 is a plan view showing a portion of a display panel according to another embodiment.

Referring to FIGS. 13 and 14, the display panel (100) is different from the embodiments of FIGS. 4 to 12 described above in that it further includes a light-blocking member (BK) surrounding the wavelength conversion layer (QDL). Hereinafter, descriptions of the same configuration will be brief or omitted, and the differences will be described in detail.

The wavelength conversion substrate (200) may include a light-blocking member (BK). The light-blocking member (BK) may be disposed on one surface of the partition wall (PW). Specifically, the light-blocking member (BK) may be disposed on a lower surface of the partition wall (PW). The light-blocking member (BK) may be disposed in the display area (DA) and may not overlap with a plurality of light-emitting areas (EA1, EA2, EA3). The light-blocking member (BK) may not overlap with a plurality of color filters (CF1, CF2, CF3) and a second reflective layer (RF2). In addition, the light-blocking member (BK) may not overlap with a plurality of light-emitting elements (LE) and a first reflective layer (RF1).

The light-blocking member (BK) can block the transmission of light. The light-blocking member (BK) can improve color reproducibility by preventing light from penetrating between the first to third light-emitting areas (EA1, EA2, EA3) and causing color mixing. The light-blocking member (BK) can be formed in a grid shape that surrounds the first to third light-emitting areas (EA1, EA2, EA3) on a plane. In addition, the light-blocking member (BK) can be arranged to surround the wavelength conversion layer (QDL).

The light-shielding member (BK) may include an organic light-shielding material and a liquid-repellent component. Here, the liquid-repellent component may be made of a fluorine-containing monomer or a fluorine-containing polymer, and specifically may include a fluorine-containing aliphatic polycarbonate. For example, the light-shielding member (BK) may be made of a black organic material including a liquid-repellent component, but is not limited thereto, and may also be a black matrix (BM).

In one embodiment, by including a light-blocking member (BK) surrounding a plurality of light-emitting areas (EA1, EA2, EA3), color reproducibility can be improved by preventing light from penetrating between the first to third light-emitting areas (EA1, EA2, EA3) and causing color mixing.

Each of the embodiments illustrated in FIGS. 4 to 14 described above can be combined with each other. For example, the flat first protective layer (PFT1) illustrated in FIG. 10 can be applied to embodiments other than FIG. 10, and the second protective layer (PFT2) illustrated in FIG. 11 can be applied to embodiments other than FIG. 11. Similarly, the structures illustrated in each of FIGS. 12 to 14 can be combined and applied to other embodiments.

Hereinafter, a manufacturing process of a display device (10) according to one embodiment will be described with reference to other drawings.

Fig. 15 is a flow chart showing a method for manufacturing a display panel according to one embodiment. Figs. 16 to 30 are cross-sectional views for explaining a method for manufacturing a display panel according to one embodiment.

In FIGS. 16 to 30, the structure of each layer of the display panel (100) of the display device (10) according to the formation order is illustrated in cross-sectional views, respectively. In FIGS. 16 to 30, the manufacturing process of the light-emitting element layer (120) and the wavelength conversion substrate (200) is mainly illustrated, and these may correspond to the cross-sectional views of FIG. 5, respectively. Below, the manufacturing method of the display panel illustrated in FIGS. 16 to 30 will be described in connection with FIG. 15.

Referring to FIGS. 15 and 16, a plurality of semiconductor material layers (SEM3, SEM2L, SLTL, MQML, EBLL, SEM1L) are formed on a target substrate (TSUB). (S100 of FIG. 15)

First, a target substrate (TSUB) is prepared. The target substrate (TSUB) may be a sapphire substrate (Al ₂ O ₃ ). However, it is not limited thereto, and in one embodiment, a case in which the target substrate (TSUB) is a sapphire substrate is described as an example.

A plurality of semiconductor material layers (SEM3, SEM2L, SLTL, MQML, EBLL, SEM1L) are formed on a target substrate (TSUB). The plurality of semiconductor material layers grown by an epitaxial method can be formed by growing a seed crystal. Here, a method for forming the semiconductor material layers may be electron beam deposition, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-type thermal evaporation, sputtering, metal-organic chemical vapor deposition (MOCVD), etc., and preferably, it can be formed by metal-organic chemical vapor deposition (MOCVD). However, it is not limited thereto.

The precursor material for forming a plurality of semiconductor material layers is not particularly limited within a range that can be typically selected for forming the target material. For example, the precursor material may be a metal precursor containing an alkyl group such as a methyl group or an ethyl group. For example, it may be a compound such as trimethyl gallium (Ga(CH ₃ ) ₃ ), trimethyl aluminum (Al(CH ₃ ) ₃ ), or triethyl phosphate ((C ₂ H ₅ ) ₃ PO ₄ ), but is not limited thereto.

Specifically, a third semiconductor layer (SEM3) is formed on the target substrate (TSUB). In the drawing, the third semiconductor layer (SEM3) is illustrated as being laminated in one layer, but is not limited thereto, and a plurality of layers may be formed. The third semiconductor layer (SEM3) may be arranged to reduce a lattice constant difference between the second semiconductor material layer (SEM2L) and the target substrate (TSUB). For example, the third semiconductor layer (SEM3) may include an undoped semiconductor, and may be a material that is not doped as an n-type or p-type. In an exemplary embodiment, the third semiconductor layer (SEM3) may be at least one of undoped InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, but is not limited thereto.

Using the method described above, a second semiconductor material layer (SEM2L), a superlattice material layer (SLTL), an active material layer (MQWL), an electron blocking material layer (EBLL), and a first semiconductor material layer (SEM1L) are sequentially formed on a third semiconductor layer (SEM3).

Next, multiple semiconductor material layers (SEM2L, SLTL, MQML, EBLL, SEM1L) are etched to form multiple light-emitting elements (LE).

Specifically, a plurality of first mask patterns (MP1) and a second mask pattern (MP2) are formed on a first semiconductor material layer (SEM1L). The first mask pattern (MP1) and the second mask pattern (MP2) may be a hard mask including an inorganic material or a photoresist mask including an organic material. The first mask pattern (MP1) is formed to have a thickness thicker than the second mask pattern (MP2), so that the plurality of semiconductor material layers (SEM2L, SLTL, MQML, EBLL, SEM1L) under the first mask pattern (MP1) are not etched.

Part of a plurality of semiconductor material layers is etched (1 ^st etch) using a plurality of first mask patterns (MP1) and a second mask pattern (MP2) as masks.

Referring to FIG. 17, on a target substrate (TSUB), a portion of a plurality of semiconductor material layers (SEM2L, SLTL, MQML, EBLL, SEM1L) may be etched and removed, and an unetched portion may be formed into a plurality of light emitting elements (LE). The semiconductor material layers may be etched by a conventional method. For example, the process for etching the semiconductor material layers may be a dry etching method, a wet etching method, a reactive ion etching (RIE), a deep reactive ion etching (DRIE), an inductively coupled plasma reactive ion etching (ICP-RIE), or the like. In the case of the dry etching method, anisotropic etching is possible, and thus, it may be suitable for vertical etching. When the etching method described above is used, the etchant may be Cl ₂ or O ₂ . However, it is not limited to this.

A plurality of semiconductor material layers (SEM2L, SLTL, MQML, EBLL, SEM1L) overlapping a first mask pattern (MP1) are not etched and are formed into a plurality of light-emitting elements (LE). As the second mask pattern (MP2) is etched, a superlattice material layer (SLTL), an active material layer (MQWL), an electron blocking material layer (EBLL), and the first semiconductor material layer (SEM1L) of the plurality of semiconductor material layers (SEM2L, SLTL, MQML, EBLL, SEM1L) overlapping a second mask pattern (MP2) are removed by etching the second mask pattern (MP2), and a part of the second semiconductor material layer (SEM2L) and the third semiconductor layer (SEM3) remain without being etched. Among the plurality of semiconductor material layers (SEM2L, SLTL, MQML, EBLL, SEM1L) that do not overlap with the mask patterns (MP1, MP2), the superlattice material layer (SLTL), the active material layer (MQWL), the electron blocking material layer (EBLL), and the first semiconductor material layer (SEM1L) are etched and removed, and the etching process is controlled so that a part of the second semiconductor material layer (SEM2L) and the third semiconductor layer (SEM3) remain without being etched. In particular, at the edge of the target substrate (TSUB), the second semiconductor material layer (SEM2L) is formed to be relatively thicker than an adjacent area to set a position where a common connection electrode, which will be described later, is to be arranged.

As a result, a plurality of light emitting elements (LEs) are formed including a third semiconductor layer (SEM3), a second semiconductor layer (SEM2), a superlattice layer (SLT), an active layer (MQW), an electron blocking layer (EBL), and a first semiconductor layer (SEM1). And, the third semiconductor layer (SEM3) and the second semiconductor layer (SEM2) are formed so as to be arranged over the entire target substrate (TSUB).

Next, a first insulating layer (INS1) is formed on a target substrate (TSUB) including a plurality of light-emitting elements (LEs). (S110 of FIG. 15)

Referring to FIG. 17, a first insulating material layer (INS1L) is formed on a target substrate (TSUB). The first insulating material layer (INS1L) can completely cover a plurality of light emitting elements (LE). The first insulating material layer (INS1L) can be formed by a method such as applying or immersing an insulating material on the target substrate (TSUB). As an example, the first insulating material layer (INS1L) can be formed by an atomic layer deposition (ALD) method.

Next, referring to FIG. 18, the first insulating material layer (INS1L) is partially etched (2nd etch) to form a first insulating layer (INS1) so that the upper surface of the second semiconductor layer (SEM2) disposed on at least a portion of the upper surface of the plurality of light-emitting elements ( ^LE ) and the edge of the target substrate (TSUB) is exposed. The first insulating material layer (INS1L) can be removed by the etching method described above.

Next, referring to FIG. 19, a first reflection layer (RF1) is formed on the first insulating layer (INS1). (S120 of FIG. 15)

Specifically, a first reflective material layer (RF1L) is formed on a target substrate (TSUB) on which a first insulating layer (INS1) is formed. The first reflective material layer (RF1L) may include a metal having a high reflectivity, such as aluminum (Al). The first reflective material layer (RF1L) may be formed by a metal deposition method, such as the sputtering described above. The first reflective material layer (RF1L) may be entirely laminated on the first insulating layer (INS1) and the light-emitting element (LE).

Next, referring to FIGS. 19 and 20, the first reflective material layer (RF1L) is etched (3 ^rd etch) to form the first reflective layer (RF1). When a large voltage difference is formed in the etching process and a predetermined etching gas (EG2) is used, the first reflective material layer (RF1L) laminated in parallel with the target substrate (TSUB) can be removed. On the other hand, the first reflective material layer (RF1L) disposed on a vertical plane perpendicular to the upper surface of the target substrate (TSUB), for example, a side surface of the light emitting element (LE), may not be removed.

Accordingly, the first reflective layer (RF1) may be arranged on the side of the first insulating layer (INS1) disposed on the side of the plurality of light-emitting elements (LE). In addition, the first reflective layer (RF1) may also be arranged on the side of the first insulating layer (INS1) disposed on the side of the second semiconductor layer (SEM2) disposed at the edge of the target substrate (TSUB). That is, the first reflective layer (RF1) may be arranged on vertical planes perpendicular to the upper surface of the target substrate (TSUB).

Next, referring to FIG. 21, connecting electrodes (125) are formed on a plurality of light-emitting elements (LE), and a common connecting electrode (127) is formed on a second semiconductor layer (SEM2) exposed at the edge of the target substrate (TSUB) to form a light-emitting element layer (120). (S130 of FIG. 15)

Specifically, by stacking a common electrode material layer on a target substrate (TSUB) and etching it, connection electrodes (125) are formed on a plurality of light-emitting elements (LE) exposed by a first insulating layer (INS1). The connection electrode (125) can be formed directly on the upper surface of the first semiconductor layer (SEM1) of the light-emitting element (LE). Then, a common connection electrode (127) is formed on the second semiconductor layer (SEM2) exposed by the first insulating layer (INS1) at the edge of the target substrate (TSUB). The common connection electrode (127) can be formed directly on the upper surface of the second semiconductor layer (SEM2).

The connecting electrode (125) and the common connecting electrode (127) may include a transparent conductive material. The common electrode (CE) may be formed of a transparent conductive oxide (TCO) such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide).

Next, a partition wall (PW) including a plurality of openings (OP1, OP2, OP3) is formed on the upper substrate (210). (S140 of FIG. 15)

Referring to FIGS. 22 and 23, an upper substrate (210) is prepared. The upper substrate (210) may be a sapphire substrate, similar to the target substrate (TSUB) described above. A barrier layer (PWL) is formed on the upper substrate (210). The barrier layer (PWL) may include silicon (Si). The barrier layer (PWL) may be a silicon single crystal layer including a silicon single crystal. The silicon single crystal layer may be formed by growing on the upper substrate (210) using an epitaxial growth method. The thickness of the barrier layer (PWL) may be formed to be about 1 to 10 ㎛.

Next, a third mask pattern (MP3) is formed on the barrier layer (PWL). The third mask pattern (MP3) may include the same material as the first mask pattern (MP1) described above. The third mask pattern (MP3) may be a mask for forming a plurality of openings in the barrier layer (PWL). The barrier layer (PWL) is etched ( ^4th etch) using the third mask pattern (MP3) as a mask to form the barrier layer (PW) including a plurality of openings (OP1, OP2, OP3). The etching process of the barrier layer (PWL) may utilize the same process as the etching process of the semiconductor material layer described above.

The barrier rib (PW) including silicon can be etched at a high aspect ratio using a deep reactive ion etching (DRIE) method, thereby manufacturing a barrier rib (PW) having a high aspect ratio. Accordingly, the barrier rib (PW) can form ultra-high-resolution openings (OP1, OP2, OP3), and since the openings (OP1, OP2, OP3) correspond to the light-emitting areas (EA1, EA2, EA3), an ultra-high-resolution display device (10) can be manufactured.

Next, a second reflective layer (RF2) is formed on the side surfaces of the multiple openings (OP1, OP2, OP3). (S150 in Fig. 15)

Referring to FIGS. 24 and 25, a second reflective material layer (RF2L) is laminated on an upper substrate (210) including a partition wall (PW) having a plurality of openings (OP1, OP2, OP3) formed therein. The second reflective material layer (RF2L) may include the same material as the first reflective material layer (RF1L) described above. The second reflective material layer (RF2L) may be formed by a metal deposition method such as the sputtering described above. The second reflective material layer (RF2L) may be laminated entirely on the upper substrate (210) and the partition wall (PW).

Next, the second reflective material layer (RF2L) is etched ( ^5th etch) to form the second reflective layer (RF2). When the second reflective material layer (RF2L) forms a large voltage difference in the etching process and a predetermined etching gas (EG2) is used, the second reflective material layer (RF2L) laminated in parallel with the upper surface of the upper substrate (210) can be removed. On the other hand, the second reflective material layer (RF2L) arranged on a vertical plane perpendicular to the upper surface of the upper substrate (210), for example, on the side surfaces of a plurality of openings (OP1, OP2, OP3) of the partition wall (PW), may not be removed.

Accordingly, the second reflective layer (RF2) can be arranged on the side surfaces of the partition wall (PW), that is, the side surfaces of the plurality of openings (OP1, OP2, OP3). In addition, the second reflective layer (RF2) can be in contact with the upper surface of the upper substrate (210). That is, the second reflective layer (RF2) can be arranged on vertical planes perpendicular to the upper surface of the upper substrate (210).

Next, a plurality of color filters (CF1, CF2, CF3) are formed within a plurality of openings (OP1, OP2, OP3) of the bulkhead (PW). (S160 of Fig. 15)

Referring to FIG. 26, a first color filter (CF1) is formed in a first opening (OP1), a second color filter (CF2) is formed in a second opening (OP2), and a third color filter (CF3) is formed in a third opening (OP3). The plurality of color filters (CF1, CF2, CF3) can be formed by a photo process. The thickness of the plurality of color filters (CF1, CF2, CF3) can be formed to be 1 ㎛ or less, but is not limited thereto. The thickness of the plurality of color filters (CF1, CF2, CF3) can be adjusted according to the thickness of the partition wall (PW).

Specifically, a first color filter material layer is applied on an upper substrate (210) including a partition wall (PW) and patterned through a photo process to form a first color filter (CF1) within a first opening (OP1). Then, a second color filter material layer is applied on the upper substrate (210) and patterned through a photo process to form a second color filter (CF2) within a second opening (OP2). Next, a third color filter material layer is applied on the upper substrate (210) and patterned through a photo process to form a third color filter (CF3) within a third opening (OP3). In the present embodiment, the first color filter (CF1), the second color filter (CF2), and the third color filter (CF3) are formed in this order, but the order may be changed and is not limited thereto.

Next, a wavelength conversion layer (QDL) is formed on multiple color filters (CF1, CF2, CF3) (S170 in Fig. 15).

Referring to FIG. 27, the wavelength conversion layer (QDL) may be formed to correspond to each of the plurality of color filters (CF1, CF2, CF3). The wavelength conversion layer (QDL) may be formed by a solution process such as imprinting, but is not limited thereto. Each of the wavelength conversion layers (QDL) may be formed to overlap with a plurality of openings (OP1, OP2, OP3), and may be formed to overlap with a plurality of color filters (CF1, CF2, CF3) and a second reflection layer (RF2).

Next, a first protective layer (PTF1) is formed on the wavelength conversion layer (QDL) to form a wavelength conversion substrate (200). (S180 of FIG. 15)

The first protective layer (PTF1) may be formed over the entire upper substrate (210) on which the wavelength conversion layer (QDL) is formed. The first protective layer (PTF1) may be formed of an organic insulating material and may be formed by a general solution process. The first protective layer (PTF1) may be flat in an area adjacent to the wavelength conversion layer (QDL), but may be formed to have a relatively thin thickness in an area where the wavelength conversion layer (QDL) is not formed due to a step of the wavelength conversion layer (QDL). However, the present invention is not limited thereto, and the thickness of the wavelength conversion layer (QDL) may be the same over the entire upper substrate (210).

Next, referring to Fig. 28, a light emitting element layer (120) is bonded onto a semiconductor circuit board (110) and the target substrate (TSUB) is separated. (S190 of Fig. 15)

First, a semiconductor circuit board (110) is prepared. The semiconductor circuit board (110) may include a plurality of pixel circuit units (PXC), a circuit insulating layer (CINS), a pixel electrode (111), a contact electrode (112), and a common contact electrode (113).

Specifically, a pixel electrode (111) is formed on a semiconductor circuit board (110) on which a plurality of pixel circuit units (PXC) are formed, and a circuit insulating layer (CINS) is formed to flatten the step of the pixel electrode (111). Then, a contact electrode material layer is laminated and etched on the pixel electrode (111) to form a contact electrode (112) and a common contact electrode (113). The contact electrode material layer may include gold (Au), copper (Cu), aluminum (Al), or tin (Sn).

Next, after aligning the light-emitting element layer (120) on the semiconductor circuit board (110), the semiconductor circuit board (110) and the light-emitting element layer (120) are bonded together.

Specifically, the contact electrode (112) of the semiconductor circuit board (110) and the connection electrode (125) of the light-emitting element layer (120) are brought into contact. In addition, the common contact electrode (113) of the semiconductor circuit board (110) and the common connection electrode (127) of the light-emitting element layer (120) are brought into contact. Then, the semiconductor circuit board (110) and the light-emitting element layer (120) are joined by melting and bonding the contact electrodes (112, 113) and the connection electrodes (125, 127) at a predetermined temperature.

Next, referring to FIG. 29, the target substrate (TSUB) of the light emitting element layer (120) is separated. Specifically, the target substrate (TSUB) is separated from the third semiconductor layer (SEM3) of the light emitting element layer (120). The process of separating the target substrate (TSUB) can be separated by a laser lift off (LLO) process. The laser lift off process uses a laser, and a KrF excimer laser (wavelength 248 nm) can be used as a source. The energy density of the excimer laser is irradiated in a range of about 550 mJ/cm2 to 950 mJ/cm2, and the irradiation area (incident area) can be in a range of 50 x 50 ㎛ ² to 1 x 1 cm2, but is not limited thereto.

Next, a wavelength conversion substrate (200) is bonded onto the light-emitting element layer (120) to manufacture a display panel (100). (S200 of FIG. 15)

Referring to FIG. 30, an adhesive layer (ADL) is applied on a light emitting element layer (120), and the light emitting element layer (120) and the wavelength conversion substrate (200) are aligned and physically bonded. At this time, a plurality of light emitting elements (LEs) of the light emitting element layer (120) can be arranged to overlap a plurality of openings (OP1, OP2, OP3) of the wavelength conversion substrate (200). The plurality of openings (OP1, OP2, OP3) define a plurality of light emitting areas (EA1, EA2, EA3), and the plurality of light emitting elements (LEs) can overlap a plurality of light emitting areas (EA1, EA2, EA3).

The adhesive layer (ADL) may include a material having excellent transparency, such as an acrylic-based, silicone-based, or urethane-based material. For example, the adhesive layer (ADL) may be an optical clear resin (OCR). The adhesive layer (ADL) may be UV or heat-cured. Accordingly, a display panel (100) according to one embodiment may be manufactured.

As described with reference to FIGS. 15 to 30, a display device (10) according to one embodiment can form ultra-high-resolution openings (OP1, OP2, OP3) by forming a partition wall (PW) including silicon. Accordingly, by forming color filters (CF1, CF2, CF3) in the openings (OP1, OP2, OP3) of the partition wall (PW), a display device (10) with ultra-high resolution can be provided.

FIGS. 31 and 32 are cross-sectional views showing a manufacturing process of a display panel according to another embodiment.

Referring to FIGS. 31 and 32, in another embodiment, there is a difference from the above-described FIGS. 15 to 30 in that a wavelength conversion substrate (200) including a light-shielding member (BK) is manufactured. The wavelength conversion substrate (200) illustrated in FIGS. 31 and 32 may correspond to the structure illustrated in the above-described FIG. 13. Below, a process for forming a light-shielding member (BK) with a difference is described, and other processes are the same as those illustrated in FIGS. 15 to 30, and thus are omitted.

Referring to FIG. 31 in connection with the above-described FIG. 26, a light-shielding member (BK) is formed on an upper substrate (210) on which a plurality of color filters (CF1, CF2, CF3), a partition wall (PW), and a second reflective layer (RF2) are formed. The light-shielding member (BK) is formed by a photo process and may be formed in a grid shape surrounding a plurality of openings (OP1, OP2, OP3). The light-shielding member (BK) does not overlap with the plurality of openings (OP1, OP2, OP3) and may not overlap with the plurality of color filters (CF1, CF2, CF3) and the second reflective layer (RF2). The light-shielding member (BK) may have a plurality of openings (OP4, OP5, OP6) formed therein. The plurality of openings (OP4, OP5, OP6) may include a fourth opening (OP4) corresponding to the first opening (OP1) of the bulkhead (PW), a fifth opening (OP5) corresponding to the second opening (OP2), and a sixth opening (OP6) corresponding to the third opening (OP3).

The thickness of the light-shielding member (BK) may be formed to a thickness corresponding to the thickness of the wavelength conversion layer (QDL) described later. For example, the thickness of the light-shielding member (BK) may be formed to be 5㎛ or less, but is not limited thereto.

Next, a wavelength conversion layer (QDL) is formed within a plurality of openings (OP4, OP5, OP6) of the light shielding member (BK). The wavelength conversion layer (QDL) may be formed to correspond to a plurality of color filters (CF1, CF2, CF3), respectively, and may be formed within a plurality of openings (OP4, OP5, OP6) of the light shielding member (BK). The wavelength conversion layer (QDL) may be formed by a solution process such as imprinting, but is not limited thereto. Each of the wavelength conversion layers (QDL) may be formed to overlap a plurality of color filters (CF1, CF2, CF3) and a second reflective layer (RF2).

Next, a wavelength conversion substrate (200) can be manufactured by forming a first protective layer (PTF1) on a light-shielding member (BK), a wavelength conversion layer (QDL), and a barrier rib (PW).

As described above, according to the display device according to the embodiments, it is possible to easily manufacture a high aspect ratio barrier by forming a barrier including silicon and performing high aspect ratio etching. Accordingly, since ultra-high resolution light-emitting regions can be formed, an ultra-high resolution display device can be implemented.

In addition, according to the display device according to the embodiments, by forming a wavelength conversion layer including a light transmitting pattern, a first wavelength conversion pattern, and a second wavelength conversion pattern, the light emission efficiency of blue, green, and red can be improved.

In addition, according to the display device according to the embodiments, since the thickness of the first protective layer is made the same, the lower surface of the wavelength conversion substrate bonded to the light-emitting element layer can be formed flat. Accordingly, the bonding of the wavelength conversion substrate and the light-emitting element layer can be facilitated, and the bonding strength can also be improved.

In addition, according to the display device according to the embodiments, by including a second protective layer between the color filter and the wavelength conversion layer, the color filter can be prevented from being damaged by a subsequent process.

In addition, according to the display device according to the embodiments, by forming the partition wall thickly and forming the color filter and the wavelength conversion layer within the opening, the alignment of the color filter and the wavelength conversion layer can be facilitated, and the thickness of the wavelength conversion layer can be increased, thereby improving the light conversion efficiency.

In addition, according to the display device according to the embodiments, by including a light-blocking member surrounding the light-emitting areas, it is possible to prevent light from penetrating between the light-emitting areas and causing color mixing, thereby improving color reproducibility.

Fig. 33 is an exemplary drawing showing a virtual reality device including a display device according to one embodiment. Fig. 33 shows a virtual reality device (1) to which a display device (10) according to one embodiment is applied.

Referring to FIG. 33, a virtual reality device (1) according to one embodiment may be a device in the form of glasses. The virtual reality device (1) according to one embodiment may include a display device (10), a left-eye lens (10a), a right-eye lens (10b), a support frame (20), glasses frame legs (30a, 30b), a reflective member (40), and a display device storage unit (50).

Although FIG. 33 illustrates a virtual reality device (1) including eyeglass frame legs (30a, 30b), the virtual reality device (1) according to one embodiment may be applied to a head mounted display including a head-mounted band that can be mounted on the head instead of the eyeglass frame legs (30a, 30b). That is, the virtual reality device (1) according to one embodiment is not limited to that illustrated in FIG. 33, and may be applied in various forms to various other electronic devices.

The display device storage unit (50) may include a display device (10) and a reflective member (40). An image displayed on the display device (10) may be reflected by the reflective member (40) and provided to the user's right eye through the right eye lens (10b). As a result, the user may view a virtual reality image displayed on the display device (10) through the right eye.

In FIG. 33, the display device storage unit (50) is exemplified as being arranged at the right end of the support frame (20), but the embodiment of the present specification is not limited thereto. For example, the display device storage unit (50) may be arranged at the left end of the support frame (20), in which case, the image displayed on the display device (10) may be reflected by the reflective member (40) and provided to the user's left eye through the left eye lens (10a). As a result, the user may view the virtual reality image displayed on the display device (10) through the left eye. Alternatively, the display device storage unit (50) may be arranged at both the left end and the right end of the support frame (20), in which case, the user may view the virtual reality image displayed on the display device (10) through both the left eye and the right eye.

FIG. 34 is an exemplary drawing showing a smart device including a display device according to one embodiment.

Referring to FIG. 34, a display device (10) according to one embodiment can be applied to a smart watch (2), which is one of smart devices.

Fig. 35 is an exemplary drawing showing a vehicle including a display device according to one embodiment. Fig. 35 shows a vehicle to which a display device (10) according to one embodiment is applied.

Referring to FIG. 35, the display devices (10_a, 10_b, 10_c) according to one embodiment may be applied to a dashboard of a vehicle, applied to a center fascia of a vehicle, or applied to a CID (Center Information Display) placed on a dashboard of a vehicle. Or, it may be used as a display device (10C). In addition, the display devices (10_d, 10_e) according to one embodiment may be applied to a room mirror display replacing a side mirror of a vehicle.

FIG. 36 is an exemplary drawing showing a transparent display device including a display device according to one embodiment.

Referring to FIG. 36, a display device (10) according to one embodiment may be applied to a transparent display device. The transparent display device may display an image (IM) and transmit light at the same time. Therefore, a user positioned at the front side of the transparent display device may not only view the image (IM) displayed on the display device (10), but may also view an object (RS) or a background positioned at the back side of the transparent display device. When the display device (10) is applied to a transparent display device, the semiconductor circuit board (110) of the display device (10) illustrated in FIG. 4 may include a light-transmitting portion capable of transmitting light or may be formed of a material capable of transmitting light.

Although the embodiments of the present invention have been described with reference to the attached drawings, those skilled in the art will understand that the present invention can be implemented in other specific forms without changing the technical idea or essential features of the present invention. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive.

10: Display device 100: Display panel
110: Semiconductor circuit board 111: Pixel electrode
112: Contact electrode 113: Common contact electrode
120: Light-emitting element layer 125: Connection electrode
127: Common connection electrode 200: Wavelength conversion substrate
SEM1, SEM2, SEM3: First to third semiconductor layers
MQW: Active layer RF1, RF2: First and second reflective layers
210: Upper substrate 230: Light transmitting pattern
240: First wavelength conversion pattern 250: Second wavelength conversion pattern
PXC: Pixel circuit LE: Light emitting element
OP1, OP2, OP3: first to third openings
CF1, CF2, CF3: first to third color filters
QDL: Wavelength conversion layer PTF1, PTF2: First and second protective layers
ADL: Adhesive layer BK: Shading member
PW: Bulkhead

Claims (27)

A plurality of light-emitting elements arranged on a first substrate;
A second substrate facing the first substrate;
A partition wall disposed on one surface of the second substrate facing the first substrate and including a plurality of openings;
A plurality of color filters arranged in the plurality of openings;
Wavelength conversion layers, each of which is arranged on the plurality of color filters and converts the wavelength of light emitted from the plurality of light-emitting elements; and
It includes an adhesive layer that adheres the first substrate and the second substrate,
The above-mentioned bulkhead is a display device including a silicon single crystal. In the first paragraph,
A display device in which the plurality of color filters include a first color filter that transmits first light emitted from the plurality of light-emitting elements, a second color filter that transmits second light having a different wavelength band from the first light, and a third color filter that transmits third light having a different wavelength band from the first light and the second light. In the second paragraph,
The above plurality of openings include a first opening, a second opening, and a third opening that are arranged spaced apart from each other,
A display device wherein the first color filter is positioned within the first opening, the second color filter is positioned within the second opening, and the third color filter is positioned within the third opening. In the third paragraph,
A display device in which the wavelength conversion layers convert some of the first light into fourth light and emit fifth light that is a mixture of the first light and the fourth light. In the fourth paragraph,
A display device in which the fifth light emitted from the wavelength conversion layers is converted into the first light through the first color filter, into the second light through the second color filter, and into the third light through the third color filter. In the third paragraph,
A display device in which the wavelength conversion layers include a light transmitting pattern that transmits the first light, a first wavelength conversion pattern that converts the first light into the second light, and a second wavelength conversion pattern that converts the first light into the third light. In Article 6,
A display device wherein the light transmitting pattern overlaps the first color filter, the first wavelength conversion pattern overlaps the second color filter, and the second wavelength conversion pattern overlaps the third color filter. In the first paragraph,
A display device wherein the thickness of the above bulkhead is 1㎛ to 10㎛. In the first paragraph,
Each of the above multiple light-emitting elements is,
First semiconductor layer;
An active layer disposed on the first semiconductor layer;
A second semiconductor layer disposed on the active layer; and
A display device including a third semiconductor layer disposed on the second semiconductor layer. In Article 9,
A display device in which the second semiconductor layer and the third semiconductor layer are common layers that are commonly connected to and arranged in the plurality of light-emitting elements. In Article 10,
A display device in which the thickness of the region where the second semiconductor layer overlaps with the first semiconductor layer is greater than the thickness of the region where the second semiconductor layer does not overlap with the first semiconductor layer. In Article 9,
A first insulating layer disposed on side surfaces of the first semiconductor layer, the active layer, and the second semiconductor layer; and
A display device further comprising a first reflective layer disposed on a side of the first insulating layer. In the first paragraph,
Further comprising second reflective layers arranged on each side of the plurality of openings,
A display device in which the second reflective layers each surround the plurality of color filters. In Article 13,
A display device in which the wavelength conversion layers overlap with the plurality of color filters and the second reflective layer, and overlap with the plurality of openings. In Article 9,
The above first substrate,
A plurality of pixel circuit sections including at least one transistor;
Pixel electrodes arranged on the plurality of pixel circuit units and respectively connected to the plurality of pixel circuit units;
A circuit insulating layer disposed between the plurality of pixel circuit units and the pixel electrodes; and
A display device further comprising contact electrodes respectively arranged on the pixel electrodes. In Article 15,
Further comprising a connecting electrode disposed between the first semiconductor layer and the contact electrode,
The above contact electrode is a display device that comes into contact with the above connection electrode. In the first paragraph,
Further comprising a first protective layer covering the above bulkhead and the wavelength conversion layers,
A display device in which one surface of the first protective layer adjacent to the light-emitting element is flat. In the first paragraph,
A display device further comprising a second protective layer disposed between the plurality of color filters and the wavelength conversion layers. In the first paragraph,
A display device in which the plurality of color filters and the wavelength conversion layers are respectively arranged within the plurality of openings. In the first paragraph,
It further includes a light-shielding member arranged on the above bulkhead and partitioning the wavelength conversion layers,
A display device in which the above-mentioned shading member does not overlap with the plurality of openings. A first substrate and a second substrate facing each other, comprising a first light-emitting region emitting a first light, a second light-emitting region emitting a second light, and a third light-emitting region emitting a third light;
A plurality of light-emitting elements disposed on the first substrate, each of the first light-emitting region, the second light-emitting region, and the third light-emitting region;
A partition wall disposed on one surface of the second substrate facing the first substrate and including a plurality of openings respectively corresponding to the first light-emitting region, the second light-emitting region, and the third light-emitting region;
A plurality of color filters arranged in the plurality of openings;
Wavelength conversion layers each arranged on the plurality of color filters; and
It includes an adhesive layer that adheres the first substrate and the second substrate,
The above bulkhead comprises a silicon single crystal,
A display device wherein the plurality of openings include a first opening corresponding to the first light-emitting region, a second opening corresponding to the second light-emitting region, and a third opening corresponding to the third light-emitting region. In Article 21,
The plurality of color filters include a first color filter that transmits the first light, a second color filter that transmits the second light, and a third color filter that transmits the third light,
A display device wherein the first color filter is positioned within the first opening, the second color filter is positioned within the second opening, and the third color filter is positioned within the third opening. In Article 21,
A display device in which the above wavelength conversion layers correspond one-to-one with each of the above plurality of openings and completely overlap each other. In Article 21,
A display device in which the first substrate and the second substrate include a display area in which the first light-emitting area, the second light-emitting area, and the third light-emitting area are arranged, and a non-display area other than the display area. In Article 24,
Each of the above multiple light-emitting elements is,
First semiconductor layer;
An active layer disposed on the first semiconductor layer;
A second semiconductor layer disposed on the active layer; and
A third semiconductor layer is disposed on the second semiconductor layer,
A display device in which the second semiconductor layer and the third semiconductor layer are arranged to extend from the display area to the non-display area. In Article 25,
The above first substrate,
A plurality of pixel circuit sections including at least one transistor;
Pixel electrodes arranged on the plurality of pixel circuit units and respectively connected to the plurality of pixel circuit units;
A circuit insulating layer disposed between the plurality of pixel circuit units and the pixel electrodes;
Contact electrodes respectively arranged on the pixel electrodes in the above display area; and
A display device further comprising common contact electrodes respectively arranged on the pixel electrodes in the non-display area. In Article 26,
Further comprising common connection electrodes arranged between the second semiconductor layer arranged in the non-display area and the common contact electrodes,
The above common connection electrodes are a display device in contact with the above common contact electrodes.

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