KR102702883B1 - Light emitting device - Google Patents

Abstract

A light-emitting element is provided. The light-emitting element includes a substrate, a first layer disposed on the substrate and including a material identical to a material constituting the substrate, a plurality of protruding patterns including a second layer on the first layer and including a material different from the material constituting the substrate, and a light-emitting portion disposed in a first region of the substrate, wherein the second region includes a region between the first region and an outer edge of the substrate, and the heights of the protruding patterns disposed in the first region may be different from each other.

Description

LIGHT EMITTING DEVICE

The present invention relates to a light-emitting device, and more specifically, to a light-emitting device including a gallium nitride semiconductor layer.

Light-emitting diodes are inorganic light sources and are widely used in various fields such as display devices, vehicle lamps, and general lighting. Light-emitting diodes are rapidly replacing existing light sources because they have the advantages of long life, low power consumption, and fast response speed.

The problem to be solved by the present invention is to provide a light-emitting device with improved light efficiency and light extraction.

The problems to be solved by the present invention are not limited to the problems mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the description below.

In order to achieve the object, a light-emitting device according to embodiments of the present invention comprises: a substrate; a first layer disposed on the substrate and including the same material as a material constituting the substrate; a second layer on the first layer including a material different from the material constituting the substrate; and a light-emitting unit disposed in a first region of the substrate, wherein the second region includes a region between the first region and an outer edge of the substrate, and the heights of the protruding patterns disposed in the first region are different from each other.

According to embodiments, the heights of the second layer of the protruding pattern arranged in the first region and the second layer of the protruding pattern arranged in the second region may be different.

According to embodiments, the light emitting element may further include an insulating film extending into a second region of the substrate.

According to embodiments, the protruding pattern arranged in the second region and the insulating film can come into contact.

According to embodiments, the insulating film may include a distributed Bragg reflector in which a plurality of silicon oxide layers and a plurality of titanium oxide layers are alternately laminated.

According to embodiments, the second layer includes silicon oxide, and the insulating film in contact with the second layer includes a first silicon oxide layer, wherein an integrated silicon oxide layer can be formed on the first layer of the protruding pattern arranged in the second region.

According to embodiments, the first silicon oxide layer of the insulating film has a first thickness on the substrate, and a second thickness of the integrated silicon oxide layer minus the first thickness may be a height of the second layer of the protruding pattern in the second region.

According to embodiments, the height of the second layer of the protruding pattern arranged in the first region may be greater than the height of the second layer of the protruding pattern arranged in the second region.

According to embodiments, each of the protruding patterns may have a width that narrows as it moves away from the substrate.

According to embodiments, each of the protruding patterns may have a circular cross-section, converge to a single vertex, and have curved side walls.

According to embodiments, the light emitting portion may include a first void formed in contact with the first layer at the interface between the first and second layers.

According to embodiments, the light emitting portion may further include a second cavity created between the cavities and the substrate and having a smaller size than the first cavity.

According to embodiments, the second layer may have a lower refractive index than the first layer.

According to embodiments, the second layer of each of the protruding patterns can be formed by a plasma enhanced chemical vapor deposition process.

According to embodiments of the present invention, a light-emitting device includes a substrate, a first layer disposed on the substrate and including the same material as a material constituting the substrate, and a second layer on the first layer including a different material from the material constituting the substrate, a plurality of protruding patterns, a first light-emitting cell disposed in a first region of the substrate, and a second light-emitting cell disposed in a second region of the substrate, wherein the third region includes a region between the first and second regions and a region between each of the first and second regions and an outer edge of the substrate, and wherein the height of each of the protruding patterns disposed in the first and second regions is different from the height of the protruding pattern disposed in the third region.

According to embodiments, the heights of the second layer of the protruding pattern arranged in each of the first and second regions and the second layer of the protruding pattern arranged in the third region may be different.

According to embodiments, the substrate may further include an insulating film extending to a third region between the first and second light-emitting cells.

According to embodiments, the protruding pattern disposed in the third region and the insulating film may be in contact.

According to embodiments, the insulating film may include a distributed Bragg reflector in which a plurality of silicon oxide layers and a plurality of titanium oxide layers are alternately laminated.

Specific details of other embodiments are included in the detailed description and drawings.

According to the light-emitting device according to embodiments of the present invention, since protruding patterns having first and second layers having different refractive indices are provided on the substrate, the light extraction efficiency of the light-emitting device can be increased. In addition, since the second layer includes SiO ₂ and is bonded to the SiO ₂ layer of the distributed Bragg reflector at the edge of the substrate, the bonding reliability is improved, so that the spray Bragg reflector can be prevented from being peeled off in a subsequent process.

FIG. 1a is a plan view illustrating a light-emitting element according to one embodiment of the present invention.
Fig. 1b is a cross-sectional view taken along line A-A' of the light emitting element of Fig. 1a.
Figure 1c is an enlarged view of part B of Figure 1a.
FIG. 1d is a plan view for explaining the first region of the substrate of FIG. 1a.
Figure 1e is an enlarged view of portion C of Figure 1c.
FIG. 2a is a plan view illustrating a light emitting element according to another embodiment of the present invention.
Fig. 2b is a cross-sectional view taken along line A-A' of the light emitting element of Fig. 2a.
FIG. 3a is a plan view illustrating a light emitting element according to another embodiment of the present invention.
Fig. 3b is a cross-sectional view taken along line A-A' of the light emitting element of Fig. 3a.
FIGS. 4 to 9 are cross-sectional views illustrating a method for manufacturing a light-emitting device according to one embodiment of the present invention.

In order to fully understand the configuration and effect of the present invention, preferred embodiments of the present invention will be described with reference to the attached drawings. However, the present invention is not limited to the embodiments disclosed below, but can be implemented in various forms and can have various changes.

Additionally, terms used in the embodiments of the present invention may be interpreted as having meanings commonly known to a person of ordinary skill in the art, unless otherwise defined.

Hereinafter, light emitting devices according to embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1A is a plan view for explaining a light-emitting element according to one embodiment of the present invention, FIG. 1B is a cross-sectional view taken along line A-A' of the light-emitting element of FIG. 1A, FIG. 1C is an enlarged view of portion B of FIG. 1A, FIG. 1D is a plan view for explaining a first region of the substrate of FIG. 1A, and FIG. 1E is an enlarged view of portion C of FIG. 1C.

Referring to FIGS. 1A to 1E, the light-emitting element may include a substrate (100) and a light-emitting portion disposed on one surface (102) of the substrate (100).

The substrate (100) may be a growth substrate for growing a semiconductor single crystal, for example, a nitride single crystal. A sapphire (Al ₂ O ₃ ) substrate may be used as the substrate (100). However, the material of the substrate (100) is not limited thereto, and may be formed of various materials, for example, SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, Ga ₂ O ₃ , etc.

According to one embodiment, the substrate (100) may be patterned, and a plurality of protruding patterns (PRT1, PRT2) may be provided on one surface (102) of the substrate (100). Each of the protruding patterns (PRT1, PRT2) may include a first layer (LY1-1, LY2-1) and a second layer (LY1-2, LY2-2) sequentially arranged on one surface (102) of the substrate (100).

The first layer (LY1-1, LY2-1) may be formed as an integral part without being separated from the substrate (100). The first layer (LY1-1, LY2-1) may include the same material as the substrate (100). In the present embodiment, the substrate (100) includes sapphire, and the first layer (LY1-1, LY2-1) may also include sapphire.

The second layer (LY1-2, LY2-2) can be disposed on the first layer (LY1-1, LY2-1). The second layer (LY1-2, LY2-2) can include a different material from the first layer (LY1-1, LY2-1). The second layer (LY1-2, LY2-2) can have a different refractive index from the first layer (LY1-1, LY2-1). According to one embodiment, the refractive index of the first layer (LY1-1, LY2-1) can be greater than the refractive index of the second layer (LY1-2, LY2-2). The second layer (LY1-2, LY2-2) can include a material having a lower refractive index than the first layer (LY1-1, LY2-1), for example, an insulating material having a refractive index of 1.0 to 1.7. For example, the second layer (LY1-2, LY2-2) may include one of SiO ₂ , SiO _x N _y , and SiN _x . According to one embodiment, the second layer (LY1-2, LY2-2) may include SiO ₂ formed through a Plasma Enhanced Chemical Vapor Deposition (PECVD) process. SiO ₂ formed through a PECVD process may have a higher crystal density than SiO ₂ formed through an e-beam process.

For example, when the first layer (LY1-1, LY2-1) includes sapphire and the second layer (LY1-2, LY2-2) includes SiO ₂ , the refractive index of the first layer (LY1-1, LY2-1) may be 1.76, and the refractive index of the second layer (LY1-2, LY2-2) may be 1.46, which may be smaller than the refractive index of the substrate (100).

Each of the protruding patterns (PRT1, PRT2) is provided in a form that protrudes from one side (102) of the substrate (100). The width of the protruding pattern may decrease as it moves away from the substrate (100).

In one embodiment, the protrusion pattern may have a circular cross section, converge to a single vertex, and have curved side walls. As an example, the protrusion pattern (PRT1, PRT2) may have a bullet shape.

As described above, the protruding patterns (PRT1, PRT2) each include different materials in the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2), and the side walls of the protruding patterns (PRT1, PRT2) can have a continuous surface without a stepped portion at the interface between the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2). That is, the differential values (slope values of the contact points) for the contact points of the side walls of the protruding patterns (PRT1, PRT2) can continuously increase from the top to the bottom without an inflection point.

As another example, the protrusion patterns (PRT1, PRT2) may have a conical shape. The conical protrusion patterns (PRT1, PRT2) may have a triangular structure in terms of cross-sectional area.

The protruding patterns (PRT1, PRT2) may be regularly spaced apart from each other. Alternatively, the protruding patterns (PRT1, PRT2) may be irregularly spaced apart. According to one embodiment, one side (102) of the substrate (100) may be exposed between the spaced protruding patterns (PRT1, PRT2).

According to one embodiment, when each of the protruding patterns (PRT1, PRT2) is made of a single material of sapphire, there may be a limitation in implementing the height of the protruding patterns when forming the protruding patterns by etching only the sapphire. Therefore, the height of each of the protruding patterns (PRT1, PRT2) made of the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2) may be formed to be greater than the height of each of the protruding patterns (PRT1, PRT2) made of the single sapphire layer. According to the present embodiment, since the protruding patterns (PRT1, PRT2) have a large height, the light extraction efficiency of the light-emitting element can be increased. In addition, although the height of each of the protruding patterns (PRT1, PRT2) increases, since the shape of each of the protruding patterns (PRT1, PRT2) and the interval between the neighboring protruding patterns (PRT1, PRT2) are the same as before, the subsequent epitaxial process can be performed without a change.

The substrate (100) may include a first region (AR1) in which a light-emitting portion is arranged, and a second region (AR2) between the first region (AR1) and an outer edge (104) of the substrate (100). For example, the first region (AR1) may be a central region of the substrate (100), and the second region (AR2) may be an edge region.

According to one embodiment, as illustrated in FIG. 1c, the protruding patterns (PRT1, PRT2) may include first protruding patterns (PRT1) arranged in a first region (AR1) of the substrate (100) and second protruding patterns (PRT2) arranged in a second region (AR2). Each of the first protruding patterns (PRT1) may have a first height (height, HT1), and each of the second protruding patterns (PRT2) may have a second height (HT2) different from the first height (HT1). The height (HT1-1) of each of the first layers (LY1-1, LY2-1) of the first protruding patterns (PRT1) and the height (HT2-1) of each of the first layers (LY1-1, LY2-1) of the second protruding patterns (PRT2) are the same, and the height (HT1-2) of each of the second layers (LY1-2, LY2-2) of the first protruding patterns (PRT1) may be different from the height (HT2-2) of each of the second layers (LY1-2, LY2-2) of the second protruding patterns (PRT2). For example, the height (HT1-2) of the second layer (LY1-2, LY2-2) of the first protruding pattern (PRT1) may be greater than the height (HT2-2) of the second layer (LY1-2, LY2-2) of the second protruding pattern (PRT2).

Referring to FIGS. 1A and 1B, the light emitting portion may include a mesa structure (MS) including a first conductive semiconductor layer (110), an active layer (120), a second conductive semiconductor layer (130), and an ohmic layer (140).

According to one embodiment, the first conductive semiconductor layer (110) may be arranged to cover the first region (AR1) of the substrate (100). The mesa structure (MS) may expose a portion of the first conductive semiconductor layer (110). Each of the first conductive semiconductor layer (110) and the mesa structure (MS) may have an inclined side surface by an etching process.

The first conductive semiconductor layer (110) may be disposed on one side (102) of the substrate (100). According to one embodiment, the first conductive semiconductor layer (110) may be disposed on one side (102) of the substrate (100) to cover the first protruding patterns (PRT1). To this end, the first conductive semiconductor layer (110) may be epitaxially grown from one side (102) of the substrate (100) exposed between the first protruding patterns (PRT1). In this case, the first conductive semiconductor layer (110) may grow upward so as to completely cover the side surface and the upper surface of each of the first protruding patterns (PRT1). According to one embodiment, the first conductive semiconductor layer (110) may include a plurality of voids (VD1, VD2) at positions corresponding to the side surfaces of each of the protruding patterns. This will be described later.

The first conductive semiconductor layer (110) may be a semiconductor layer doped with a first conductive dopant. The first conductive dopant may be an n-type dopant. The first conductive dopant may include one of Si, Ge, Se, Te, and C.

According to one embodiment, the first conductive semiconductor layer (110) may include a nitride-based semiconductor material. For example, the first conductive semiconductor layer (110) may include a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). In one embodiment, the nitride-based semiconductor material of the first conductive semiconductor layer (110) may include one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. The first conductive semiconductor layer (110) may be formed by growing the semiconductor material to include an n-type dopant of one of Si, Ge, Sn, Se, and Te.

The active layer (120) is provided on the first conductive semiconductor layer (110) and may correspond to a light-emitting layer. The active layer (120) may be a layer that emits light due to a difference in a band gap of an energy band according to a material forming the active layer (120) when electrons (or holes) injected through the first conductive semiconductor layer (110) and holes (or electrons) injected through the second conductive semiconductor layer (130) meet each other. The active layer (120) may emit light having at least one peak wavelength among ultraviolet, blue, green, and red.

The active layer (120) may be implemented with a compound semiconductor. The active layer (120) may be implemented with at least one of a group III-V or group II-VI compound semiconductor, for example. A quantum well structure may be employed in the active layer (120), and may have a multi quantum well structure in which quantum well layers and barrier layers are alternately laminated. However, the structure of the active layer (120) is not limited thereto, and may be a quantum wire structure or a quantum dot structure.

According to one embodiment, the quantum well layer can be formed of a material having a composition formula of In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). The barrier layer can be formed of a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) and can be provided at a different composition ratio from the well layer. Here, the barrier layer can have a band gap wider than a band gap of the well layer.

The well layer and the barrier layer may be formed of at least one of pairs of, for example, AlGaAs/GaAs, InGaAs/GaAs, InGaN/GaN, GaN/AlGaN, AlGaN/AlGaN, InGaN/AlGaN, InGaN/InGaN, InGaP/GaP, AlInGaP/InGaP, InP/GaAs. According to one embodiment, the well layer of the active layer (120) may be implemented with InGaN, and the barrier layer may be implemented with an AlGaN-based semiconductor. In addition, the indium composition of the well layer may have a higher composition than the indium composition of the barrier layer, and the barrier layer may not have an indium composition. In addition, the well layer may not contain aluminum, and the barrier layer may contain aluminum. However, the compositions of the well layer and the barrier layer are not limited thereto.

The second conductive semiconductor layer (130) may be disposed on the active layer (120). The second conductive semiconductor layer (130) may be a semiconductor layer having a second conductive dopant having a polarity opposite to that of the first conductive dopant. The second conductive dopant may be a p-type dopant, and the second conductive dopant may include, for example, one of Mg, Zn, Ca, Sr, and Ba.

According to one embodiment, the second conductive semiconductor layer (130) may include a nitride-based semiconductor material. The second conductive semiconductor layer (130) may include a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). The nitride-based semiconductor material of the second conductive semiconductor layer (130) may include one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. The second conductive semiconductor layer (130) may be formed by growing the semiconductor material to include a p-type dopant of one of Mg, Zn, Ca, Sr, and Ba.

In this embodiment, the first conductive semiconductor layer (110) is described as an n-type semiconductor layer including an n-type dopant, and the second conductive semiconductor layer (130) is described as a p-type semiconductor layer including a p-type dopant. However, the first conductive semiconductor layer (110) may be a p-type semiconductor layer and the second conductive semiconductor layer (130) may be an n-type semiconductor layer.

The ohmic layer (140) may be placed on the second conductive semiconductor layer (130). The ohmic layer (140) may use a transparent conductive oxide (TCO) such as ZnO or ITO (Indium Tin Oxide).

Although not shown, in addition to the substrate (100), the first conductive semiconductor layer (110), the active layer (120), and the second conductive semiconductor layer (130), a functional layer such as a buffer layer and/or an electron blocking layer may be additionally provided. For example, a buffer layer may be provided on the substrate (100) and the first conductive semiconductor layer (110). The buffer layer may be formed as a single layer or multiple layers. According to one embodiment, the buffer layer may be made of In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), and may include, for example, at least one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and ZnO. In addition, an electron blocking layer may be additionally disposed between the second conductive semiconductor layer (130) and the active layer (120). The electron blocking layer can reduce the deterioration of crystallinity due to the dopant in the second conductive semiconductor layer (130) and prevent the diffusion of the dopant in the second conductive semiconductor layer (130) into the active layer (120). The electron blocking layer can block electrons from the active layer (120) from progressing to the second conductive semiconductor layer (130), thereby preventing the current spreading phenomenon between the electron blocking layer and the second conductive semiconductor layer (130). According to one embodiment, the electron blocking layer can be formed of a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). The electron blocking layer can include, for example, at least one of GaN, AlGaN, InGaN, InAlGaN, and AlInN.

The buffer layer and the electron blocking layer are disclosed as examples, and at least one of the buffer layer or the electron blocking layer may be omitted. In addition, additional functional layers other than the buffer layer and the electron blocking layer may be further added to the light emitting device.

The light-emitting element may further include a first conductive pattern (CP1) electrically bonded to the first conductive semiconductor layer (110) exposed by the mesa structure (MS), and a second conductive pattern (CP2) electrically bonded to the ohmic layer (140) on the mesa structure (MS).

According to one embodiment, the first conductive pattern (CP1) may include a first portion (PT1) extending to a second conductive pattern (CP2), and a second portion (PT2) extending from the first portion (PT1) and extending in a direction perpendicular to an extension direction of the first portion (PT1). Both ends of the second portion (PT2) may have a structure that is bent toward the second conductive pattern (CP2). Since the first conductive pattern (CP1) has a structure that extends toward the second conductive pattern (CP2), current spreading of the light-emitting element may be improved.

Each of the first conductive pattern (CP1) and the second conductive pattern (CP2) may have a multilayer structure. Each of the first conductive pattern (CP1) and the second conductive pattern (CP2) may include at least one selected from the group consisting of Au, Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Hf, Cr, Ti, and Cu. In addition, it may include an alloy of the materials listed above.

The light-emitting element may further include an insulating film (DL) covering the first conductive pattern (CP1) and the second conductive pattern (CP2) on the light-emitting portion and extending onto the second protruding patterns (PRT2) of the second region (AR2). According to one embodiment, an end of the insulating film (DL) may be flush with the outer surface (104) of the substrate (100).

The insulating film (DL) may include a distributed Bragg reflector (DBR) in which a plurality of SiO ₂ layers and a plurality of TiO ₂ layers are alternately laminated. The insulating film (DL) including the distributed Bragg reflector may reflect light generated from the active layer (120) toward the substrate (100) along with insulating properties.

The insulating film (DL) can be alternately laminated in the order of a SiO ₂ layer (S1), a TiO ₂ layer (T1), a SiO ₂ layer (S2), and a TiO ₂ layer (T2). Accordingly, the first SiO ₂ layer (S1) of the insulating film (DL) can come into contact with not only the light-emitting portion but also the second protruding patterns (PRT2) arranged in the second region (AR2).

According to one embodiment, as illustrated in FIG. 1c, the second layer (LY1-2, LY2-2) of each of the second protruding patterns (PRT2) may include SiO ₂ , and the first layer (S1) of the insulating film (DL) in contact with the second layer (LY1-2, LY2-2) of each of the second protruding patterns (PRT2) may include SiO ₂ . Accordingly, the adhesion reliability of the second protruding patterns (PRT2) and the insulating film (DL) may be improved.

Meanwhile, since the second layer (LY1-2, LY2-2) of each of the second protruding patterns (PRT2) and the first layer (S1) of the insulating film (DL) include SiO ₂ , the interface between the second layer (LY1-2, LY2-2) of each of the second protruding patterns (PRT2) and the first layer (S1) of the insulating film (DL) in the second region (AR2) may be unclear.

According to one embodiment, the height (HT1) of each of the first protruding patterns (PRT1) may be greater than the height (HT2) of each of the second protruding patterns (PRT2). The height (HT1-1) of the first layer (LY1-1, LY2-1) of the first protruding pattern (PRT1) and the height (HT2-1) of the first layer (LY1-1, LY2-1) of the second protruding pattern (PRT2) may be the same, but the height (HT1-2) of the second layer (LY1-2, LY2-2) of the first protruding pattern (PRT1) may be greater than the height (HT2-2) of the second layer (LY1-2, LY2-2) of the second protruding pattern (PRT2). However, since the first layer (S1) of the insulating film (DL) includes the same material as the second layer (LY1-2, LY2-2), that is, SiO ₂ , the interface between the second layer (LY1-2, LY2-2) and the insulating film (DL) is unclear. At this time, since the first layer (LY1-1, LY2-1) of the second protruding pattern (PRT2) is sapphire and the second layer (LY1-2, LY2-2) includes SiO ₂ , the interface between the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2) is clear, and since the first layer (S1) of the insulating film (DL) is a SiO ₂ layer and the second layer (T2) is a TiO ₂ layer, the interface between the first layer (S1) and the second layer (T2) of the insulating film (DL) can be clear. Accordingly, the height (HT2-2) of the second layer (LY1-2, LY2-2) of the second protruding pattern (PRT2) can be determined by excluding the thickness (HTA) of the first layer (S1) of the insulating film (DL) that is in contact with one surface (102) of the substrate (100) of the second region (AR2) from the thickness (HTA) from the upper surface of the first layer (LY1-1, LY2-1) of the second protruding pattern (PRT2) to the lower surface of the second layer (T2) of the TiO2 layer of the insulating film (DL).

Each of the second layers (LY1-2, LY2-2) of the protrusion patterns (PRT1, PRT2) includes SiO ₂ formed by PECVD, while each of the plurality of SiO ₂ layers of the insulating film (DL) can be formed by e-beam. The e-beam can typically be used to form a SiO ₂ layer having a small thickness. In this case, the SiO ₂ crystals of the second layers (LY1-2, LY2-2) can have a higher density than the crystals of the SiO ₂ layer of the insulating film (DL). Since the second layers (LY1-2, LY2-2) include SiO ₂ formed by PECVD, they can have excellent adhesion to the first SiO ₂ layer (S1) of the insulating film (DL).

Referring to FIGS. 1A and 1B, the light-emitting element may further include a first pad (PD1) disposed on an insulating film (DL) and electrically connected to a first conductive pattern (CP1) and a second pad (PD2) electrically connected to a second conductive pattern (CP2). The first pad (PD1) may apply a negative voltage to the first conductive semiconductor layer (110) through the first conductive pattern (CP1), and the second pad (PD2) may apply a positive voltage to the second conductive semiconductor layer (130) through the second conductive pattern (CP2) and the ohmic layer (140).

According to one embodiment, each of the first pad (PD1) and the second pad (PD2) may include at least one selected from the group consisting of Au, Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Hf, Cr, Ti, and Cu. Additionally, the first pad (PD1) and the second pad (PD2) may include an alloy of the materials listed above.

As described above, in the light emitting device according to the embodiments of the present invention, a plurality of protruding patterns (PRT1, PRT2) and cavities are provided on the substrate (100). The protruding patterns (PRT1, PRT2) and cavities (VD1, VD2) will be described in detail below.

Referring to FIGS. 1C to 1E, protruding patterns (PRT1, PRT2) including a first layer (LY1-1, LY2-1) and a second layer (LY1-2, LY2-2) may be arranged on one side (102) of a substrate (100). Each protruding pattern (PRT1, PRT2) may have a circular shape in a planar view. When the protruding pattern has a bullet shape, the vertex of the bullet may be the center of the circle. The diameter (DM) of the protruding pattern may be the width of the lowest end of the protruding pattern (PRT1, PRT2) in a cross-sectional view, and the height (HT1, HT2) of the protruding pattern (PRT1, PRT2) may be the distance from one side (102) of the substrate (100) to the vertex of the protruding pattern (PRT1, PRT2).

In a planar view, the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2) may have concentric circle shapes with different diameters (DM) but the same center. When the protrusion patterns (PRT1, PRT2) have a bullet shape, the diameter (DM) of the first layer (LY1-1, LY2-1) may be larger than the diameter (DM) of the second layer (LY1-2, LY2-2). At this time, the diameter (DM) of each of the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2) may be the width of the lowermost end of each of the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2) in a cross-sectional view.

Referring to FIG. 1d, the protruding patterns (PRT1) can be arranged in various shapes on one surface (102) of the substrate (100). In the present embodiment, the protruding patterns (PRT1) are exemplarily described as having a structure in which one protruding pattern (PRT1) of the second row is arranged between two adjacent protruding patterns (PRT1) in the first row, but the present invention is not limited to the arrangement shape of the protruding patterns (PRT1) thereto.

The diameter (DM) of each of the protruding patterns (PRT1) may be equal to or smaller than the pitch (PTC) between two neighboring protruding patterns (PRT1). In this case, the pitch (PTC) is the distance between the centers of each of the two neighboring protruding patterns (PRT1). When the diameter (DM) of the protruding pattern (PRT1) is larger than the pitch (PTC), the protruding patterns (PRT1) overlap on a plane, and an area of one side (102) of the substrate (100) exposed by the protruding patterns (PRT1) may not be sufficient for the epitaxial growth of the first conductive semiconductor layer (110).

As described above, the protruding patterns (PRT1, PRT2) may include first protruding patterns (PRT1) arranged in a first region (AR1) of the substrate (100) and second protruding patterns (PRT2) arranged in a second region (AR2) of the substrate (100).

According to one embodiment, a plurality of first cavities (VD1) may be provided adjacent to each of the first protruding patterns (PRT1). A plurality of first cavities (VD1) may be provided at a side of the first protruding pattern (PRT1), that is, between the first protruding pattern (PRT1) and the first conductive semiconductor layer (110). In particular, the first cavities (VD1) may be formed near an edge of an interface between the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2) in the first protruding pattern (PRT1). The first cavities (VD1) may have a shape that extends in a downward direction of an extension surface based on an extension surface of the interface between the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2), that is, in a direction toward the substrate (100). Accordingly, first cavities (VD1) can be formed on at least one side along the uppermost outer surface of the first layer (LY1-1, LY2-1).

Here, the first cavities (VD1) are formed corresponding to the growth direction of the crystal plane, and may be formed on the side corresponding to each vertex of the hexagon based on the center of the first protruding pattern (PRT1). Each first cavity (VD1) may have a triangular shape when viewed on a plane. That is, each of the first cavities (VD1) may have a width that narrows as it goes from the interface of the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2) toward the substrate (100). In detail, when the first protruding pattern (PRT1) is provided in a bullet shape, the upper surface of the first layer (LY1-1, LY2-1) has a circular shape, and in a planar view, the first cavities (VD1) may be provided at a position corresponding to a vertex of a regular hexagon inscribed in the upper surface circle of the first layer (LY1-1, LY2-1). In addition, the first cavities (VD1) may have a right triangle shape when cut along a plane that is perpendicular to one side (102) of the substrate (100) and passes through the center of the circle. At this time, in the right triangle shape, the hypotenuse may correspond to a side surface of the first layer (LY1-1, LY2-1). For example, the hypotenuse may be a curved surface, and thus may not be a perfect right triangle shape. In addition, in each first cavity (VD1), the plane forming the uppermost portion of the first cavity (VD1) may be substantially the same plane as a plane extending the upper surface of the first layer (LY1-1, LY2-1). That is, each first cavity (VD1) is formed on a first conductive semiconductor layer (110) corresponding to the outer side of the upper surface of the first layer (LY1-1, LY2-1), and the upper surface of the first layer (LY1-1, LY2-1) can become the upper side in the structure forming each first cavity (VD1).

According to one embodiment, the first challenge type semiconductor layer (110) may undergo a process of merging into one crystal during the process of growing upward and/or lateral from one surface (102) of the substrate (100). The first cavities (VD1) may be formed by intentionally controlling the formation of a portion that is not in close contact with the side surface of the first layer (LY1-1, LY2-1) of the first protruding pattern (PRT1) during this merging process.

The first cavities (VD1) may be empty spaces in which the first layer (LY1-1, LY2-1) and the first conductive semiconductor layer (110) are not provided. Accordingly, the first cavities (VD1) may have different refractive indices from those of the first layer (LY1-1, LY2-1) and the first conductive semiconductor layer (110). Light refraction, scattering, and reflection occur at the interface between the first layer (LY1-1, LY2-1) and each first cavity (VD1) and between the first conductive semiconductor layer (110) and the first cavity (VD1), and thus, the light extraction efficiency by the first cavity (VD1) may increase. However, although an increase in refraction, scattering, and reflection of light generally improves light extraction efficiency, if the location where the first cavity (VD1) is created is too close or too far from one surface (102) of the substrate (100), the light extraction efficiency may actually decrease.

In one embodiment, the heights of each of the first layers (LY1-1, LY2-1) and the second layers (LY1-2, LY2-2) in the first protruding pattern (PRT1) can be maintained within a predetermined range so that the light extraction efficiency by the first cavities (VD1) can be increased. As described above, since the positions of the first cavities (VD1) are provided at positions corresponding to the interfaces of the first layers (LY1-1, LY2-1) and the second layers (LY1-2, LY2-2), by adjusting the positions of the first layers (LY1-1, LY2-1) and the second layers (LY1-2, LY2-2) to a specific range, the positions of the first cavities (VD1) can also be adjusted. Here, if the height of the first layer (LY1-1, LY2-1) is 0, the growth of the first conductive semiconductor layer (110) from the substrate (100) may be hindered by impurities remaining on one side (102) of the substrate (100) during the process. In addition, if the height of the second layer (LY1-2, LY2-2) is greater than the height of the first layer (LY1-1, LY2-1), the growth of the crystal in the lateral direction of the first layer (LY1-1, LY2-1) may be reduced, thereby improving the quality of the crystal. Therefore, the height of the second layer (LY1-2, LY2-2) may be greater than the height of the first layer (LY1-1, LY2-1).

In other words, the heights of the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2) and the positions of the first cavities (VD1) accordingly may be within a predetermined range so that the first cavities (VD1) sufficiently improve the light extraction efficiency. For example, the height of the second layer (LY1-2, LY2-2) with respect to the first layer (LY1-1, LY2-1) may be greater than 2.5 times and less than 9.5 times. In one embodiment, the height of the second layer (LY1-2, LY2-2) with respect to the first layer (LY1-1, LY2-1) may be 4.25 times. For example, when the sum of the heights of the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2) is about 2.1 um, the first layer (LY1-1, LY2-1) may have a height greater than about 0.2 um and less than about 0.6 um. According to another embodiment, when the sum of the heights of the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2) is about 2.1 um, the first layer (LY1-1, LY2-1) may have a height greater than about 0.25 um and less than about 0.55 um. According to yet another embodiment, the first layer (LY1-1, LY2-1) may have a height greater than about 0.3 um and less than about 0.5 um.

If the height of the first layer (LY1-1, LY2-1) is smaller than the above range from one surface (102) of the substrate (100), the first cavities (VD1) are not sufficiently formed, and even if they are formed, the light scattering effect due to the first cavities (VD1) may not be sufficiently exhibited. In addition, if the size of the first cavities (VD1) is small, is not sufficiently formed, or acts as a defect, the transmittance of light passing through the first cavities (VD1) may decrease. In this case, as a result, the light incident ratio from the first conductive semiconductor layer (110) toward the inside of the substrate (100) may decrease.

When the height of the first layer (LY1-1, LY2-1) is within the above range from one side (102) of the substrate (100), the first cavities (VD1) are sufficiently formed, and not only does the scattering effect increase due to the first cavities (VD1), but also the ratio of light incident from the first conductive semiconductor layer (110) toward the substrate (100) through the first cavities (VD1) can increase. In particular, in addition to the light incident directly from the first conductive semiconductor layer (110) to the substrate (100), there is additional light that passes through the first cavities (VD1), is refracted, and then is transmitted to one side (102) of the substrate (100), whereby the overall light emission efficiency can be improved.

When the height of the first layer (LY1-1, LY2-1) is formed to be greater than the above range from one side (102) of the substrate (100), the path of light traveling from the first conductive semiconductor layer (110) toward the substrate (100) increases, thereby increasing the absorption rate of light in the substrate (100), and thus decreasing the amount of light transmitted through the substrate (100). In addition, in this case, since the height of the first layer (LY1-1, LY2-1) becomes relatively high, crystal growth in the lateral direction of the first layer (LY1-1, LY2-1) may occur, thereby decreasing the quality of the crystal, which may in turn cause a decrease in light efficiency.

According to one embodiment, second cavities (VD2) may be provided between the first cavities (VD1) and the substrate (100). The second cavities (VD2) may be provided at a side of the first layer (LY1-1, LY2-1) of the first protruding pattern (PRT1), that is, between the first layer (LY1-1, LY2-1) and the first conductive semiconductor layer (110).

As described above, each of the first cavities (VD1) is formed intentionally and controlled, and thus has a triangular cross-section in a planar view and may have a right-angled triangular cross-section in a cross-sectional view. In contrast, the second cavities (VD2) are created while the first conductive semiconductor layer (110) is grown, and thus may have various sizes and structures. For example, the size of each of the second cavities (VD2) may be smaller than the size of each of the first cavities (VD1).

The second cavities (VD2) may be empty spaces where the first layer (LY1-1, LY2-1) and the first conductive semiconductor layer (110) are not provided. Accordingly, the second cavities (VD2) have different refractive indices from the first layer (LY1-1, LY2-1) and the first conductive semiconductor layer (110), but may not have a significant effect on improving the light extraction efficiency as described above.

Meanwhile, the first cavities (VD1) and the second cavities (VD2) may not be provided in the second protruding patterns (PRT2) of the second region (AR2). As described above, each of the first cavities (VD1) and the second cavities (VD2) is formed and generated during the epitaxial growth of the first conductive semiconductor layer (110) on one surface (102) of the substrate (100), and thus may not be provided in the second protruding patterns (PRT2) of the second region (AR2).

FIG. 2a is a plan view for explaining a light-emitting element according to another embodiment of the present invention, and FIG. 2b is a cross-sectional view taken along line A-A' of the light-emitting element of FIG. 2a.

Referring to FIGS. 2A and 2B, the light-emitting element may include a substrate (100) and a light-emitting portion disposed on the substrate (100).

On one side (102) of the substrate (100), protrusion patterns (PRT1, PRT2) may be provided in which a first layer (LY1-1, LY2-1) of the same material as the substrate (100) and a second layer (LY1-2, LY2-2) of a different material from the substrate (100) are sequentially laminated. According to one embodiment, the first layer (LY1-1, LY2-1) may include sapphire, and the second layer (LY1-2, LY2-2) may include SiO ₂ .

The substrate (100) may include a first region (AR1) in which a light-emitting portion is arranged, and a second region (AR2) excluding the first region (AR1). The second region (AR2) may be a space between the first region (AR1) and the outer edge (104) of the substrate (100). The protruding patterns (PRT1, PRT2) may include first protruding patterns (PRT1) formed in the first region (AR1) and second protruding patterns (PRT2) formed in the second region (AR2), respectively.

Meanwhile, as described in FIGS. 1A to 1E, first cavities (VD1) and second cavities (VD2) may be provided between the first protruding patterns (PRT1) and the first conductive semiconductor layer (110).

The light-emitting portion may include a first conductive semiconductor layer (110), and a mesa structure (MS) in which an active layer (120), a second conductive semiconductor layer (130), and an ohmic layer (140) are sequentially stacked while exposing a portion of the first conductive semiconductor layer (110). Each of the first conductive semiconductor layer (110) and the mesa structures (MS) may have an inclined side surface.

The first conductive semiconductor layer (110) can be arranged to cover the first region (AR1) of the substrate (100). That is, the first conductive semiconductor layer (110) can be arranged to cover the first protruding patterns (PRT1).

According to one embodiment, a recessed portion (CCV) may be formed at a portion of an edge of a mesa structure (MS) in a planar view. The recessed portion (CCV) is a region extending from the edge of the substrate (100) toward the center of the mesa structure (MS), and in the present embodiment, the mesa structure (MS) may have four recessed portions (CCV). However, the number of recessed portions (CCV) is not limited thereto. A greater amount of the first conductive semiconductor layer (110) may be exposed at positions corresponding to the recessed portions (CCV).

The mesa structure (MS) may include a vertically stacked active layer (120), a second conductive semiconductor layer (130), and an ohmic layer (140). Meanwhile, the mesa structure (MS) may have an inclined side surface.

According to one embodiment, the mesa structure (MS) may have a hole exposing a portion of the first conductive semiconductor layer (110). As illustrated in FIG. 2, in this embodiment, two holes are illustrated, but the number of holes is not limited thereto.

The light emitting element may further include a first insulating film (DL1) disposed on the ohmic layer (140). The first insulating film (DL1) may include at least one of SiN, TiN, TiO ₂ , Ta ₂ O ₅ , ZrO _x , HfO _x , and SiO ₂ .

The first insulating film (DL1) may have a first opening (OP1) exposing the first conductive semiconductor layer (110) exposed by the concave portion (CCV) of the mesa structure (MS), a second opening (OP2) exposing the first conductive semiconductor layer (110) on the bottom surface of the hole of the mesa structure (MS), and a third opening (OP3) partially exposing the ohmic layer (140). In the present embodiment, four first openings (OP1), two second openings (OP2), and three third openings (OP3) are illustrated, but the present invention does not limit the number of the first openings (OP1), the second openings (OP2), and the third openings (OP3) to this.

According to one embodiment, the first insulating film (DL1) may have a structure that covers the mesa structure (MS) and extends to the side of the first conductive semiconductor layer (110), but does not extend to the second region (AR2). Alternatively, the first insulating film (DL1) may cover the second protruding patterns (PRT2) of the second region (AR2).

The light-emitting element may further include a first conductive pattern (CP1) electrically connected to the first conductive semiconductor layer (110) exposed by the first openings (OP1) and the second openings (OP2), and a second conductive pattern (CP2) electrically connected to the ohmic layer (140) exposed by the third openings (OP3). Each of the first conductive pattern (CP1) and the second conductive pattern (CP2) may include at least one of Au, Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Hf, Cr, Ti, and Cu.

In one embodiment, the first conductive pattern (CP1) may have convex portions (CVX) corresponding to the concave portions (CCV) of the mesa structure (MS) in a planar view. In one embodiment, the first conductive pattern (CP1) may have four convex portions (CVX) corresponding to four concave portions (CCV). Each of the convex portions (CVX) may fill the first openings (OP1) and be electrically connected to the first conductive semiconductor layer (110).

The light-emitting element may further include a second insulating film (DL2) that covers the first conductive pattern (CP1) and the second conductive pattern (CP2) on the light-emitting portion and extends to the second region (AR2). The second insulating film (DL2) may cover the light-emitting portion of the first region (AR1) and extend to the second region (AR2) to be formed to the outer edge (104) of the substrate (100). That is, an end of the second insulating film (DL2) may be flush with the outer edge (104) of the substrate (100).

According to one embodiment, the second insulating film (DL2) may include a distributed Bragg reflector in which a plurality of SiO ₂ layers and a plurality of TiO ₂ layers are alternately laminated. In the second region (AR2), the second insulating film (DL2) may be adhered to each of the second layers (LY2-2) of the second protruding patterns (PRT2). In this case, the second layers (LY2-2) include SiO ₂ , and since the first layer of the second insulating film (DL) is a SiO ₂ layer, adhesion can be improved with homogeneous physical properties.

The second insulating film (DL2) is identical to the insulating film (DL) described in FIGS. 1a to 1e, so its detailed description will be omitted.

The light-emitting element may further include, on the second insulating film (DL2), a first pad (PD1) electrically connected to the first conductive pattern (CP1) and a second pad (PD2) electrically connected to the second conductive pattern (CP2).

The components of the light-emitting element according to the present embodiment are similar to the components of the light-emitting element described in FIGS. 1A to 1E, and thus a detailed description thereof will be omitted.

FIG. 3a is a plan view illustrating a light-emitting element according to another embodiment of the present invention, and FIG. 3b is a cross-sectional view taken along line A-A' of the light-emitting element of FIG. 3a.

Referring to FIGS. 3A and 3B, the light-emitting element may include a light-emitting portion including a substrate (100) and a plurality of light-emitting cells. For ease of explanation, the light-emitting cells are described as including a first light-emitting cell (LEC1) and a second light-emitting cell (LEC2).

On one side (102) of the substrate (100), protrusion patterns (PRT1, PRT2) may be provided in which a first layer (LY1-1, LY2-1) of the same material as the substrate (100) and a second layer (LY1-2, LY2-2) of a different material from the substrate (100) are sequentially laminated. According to one embodiment, the first layer (LY1-1, LY2-1) may include sapphire, and the second layer (LY1-2, LY2-2) may include SiO ₂ .

The substrate (100) may include a first region (AR1) in which a first light-emitting cell (LEC1) is arranged, a second region (AR2) in which a second light-emitting cell (LEC12) is arranged, a third region (AR3) arranged between the first region (AR1) and the second region (AR2), and a fourth region (AR4) between the first region (AR1) and the second region (AR2) and the outer edge (104) of the substrate (100). The third region (AR3) and the fourth region (AR4) may have a connected structure.

The protruding patterns (PRT1, PRT2) may include first protruding patterns (PRT1) arranged in the first region (AR1) and the second region (AR2), and second protruding patterns (PRT2) arranged in the third region (AR3) and the fourth region (AR4). The height of each of the first protruding patterns (PRT1) and the height of each of the second protruding patterns (PRT2) may be different. According to one embodiment, the height of the second layer (LY1-2, LY2-2) of each of the first protruding patterns (PRT1) may be different from the height of the second layer (LY1-2, LY2-2) of each of the second protruding patterns (PRT2).

Each of the first light-emitting cell (LEC1) and the second light-emitting cell (LEC2) may include a first conductive semiconductor layer (110) and a mesa structure (MS). The mesa structure (MS) may have a smaller size than the first conductive semiconductor layer (110) so as to expose a portion of the first conductive semiconductor layer (110). Each of the first conductive semiconductor layer (110) and the mesa structure (MS) may have an inclined side surface. Meanwhile, the mesa structure (MS) may include a vertically stacked active layer (120), a second conductive semiconductor layer (130), and an ohmic layer (140).

The light emitting element may further include an insulating film (DL) disposed on the substrate (100) to cover the first light emitting cell (LEC1) and the second light emitting cell (LEC2). The insulating film (DL) covers the first light emitting cell (LEC1) and the second light emitting cell (LEC2), and may extend to a third region (AR3) of the substrate (100) between the first light emitting cell (LEC1) and the second light emitting cell (LEC2), and a fourth region (AR4) of the substrate (100) between the first region (AR1) and the second region (AR2) and the outer periphery (104) of the substrate (100). According to one embodiment, an end of the insulating film (DL) may be flush with the outer periphery (104) of the substrate (100).

The insulating film (DL) may include a distributed Bragg reflector in which a plurality of SiO ₂ layers and a plurality of TiO ₂ layers are alternately laminated. In the second region (AR2), the insulating film (DL) may be adhered to each of the second layers (LY2-2) of the second protruding patterns (PRT2). In this case, the second layers (LY2-2) include SiO ₂ , and since the first layer of the insulating film (DL) is a SiO ₂ layer, the adhesive strength can be improved with homogeneous physical properties. Since the insulating film (DL) is the same as the insulating film (DL) described in FIG. 1, a detailed description thereof will be omitted.

The light-emitting element may include a first pad (PD1) electrically connected to a first conductive semiconductor layer (110) of a second light-emitting cell (LEC2) on an insulating film (DL), a second pad (PD2) electrically connected to an ohmic layer (140) of the first light-emitting cell (LEC1), and a connection pad (CPD) electrically connected to the first conductive semiconductor layer (110) of the first light-emitting cell (LEC1) and the ohmic layer (140) of the second light-emitting cell (LEC2) on the insulating film (DL).

The components of the light-emitting element according to the present embodiment are similar to the components of the light-emitting element described in FIGS. 1A to 1E, and thus a detailed description thereof will be omitted.

Hereinafter, a method for manufacturing the light-emitting element illustrated in FIGS. 1a and 1b will be described.

FIGS. 4 to 9 are cross-sectional views illustrating a method for manufacturing a light-emitting element according to one embodiment of the present invention.

Referring to Fig. 4, an initial substrate (100p) can be prepared.

A material film (ML) can be formed on one side (102) of an initial substrate (100p). The material film (ML) can include a material having a different refractive index from the substrate (100). According to one embodiment, the initial substrate (100p) can include sapphire, and the material film (ML) can include SiO ₂ .

According to one embodiment, a material film (ML) including SiO ₂ can be formed by PECVD. SiO ₂ formed using a PECVD process can have a denser crystal structure than SiO ₂ formed via e-beam.

Referring to FIG. 5, after forming a mask pattern on a material film (ML), the material film (ML) and the initial substrate (100p) are etched using the mask pattern as an etching mask, thereby forming a plurality of protrusion patterns (PRT). The material film (ML) and the initial substrate (100p) can be etched by a dry etching process using Cl ₂ and BCl ₃ etchants.

After forming the projected pattern (PRT), the mask pattern can be removed.

By forming the protruding patterns (PRT), a substrate (100) having a side (102) lower than a side (102) of an initial substrate (100p) can be formed. Each of the protruding patterns (PRT) can include a first layer (LY1) including the same material as the substrate (100), and a second layer (LY2) including a different material from the substrate (100) on the first layer (LY1). For example, the first layer (LY1) can include sapphire, and the second layer (LY2) can include SiO ₂ .

In one embodiment, one side (102) of the substrate (100) may be exposed between the protruding patterns (PRT).

Referring to FIG. 6, a first conductive semiconductor layer (110), an active layer (120), a second conductive semiconductor layer (130), and an ohmic layer (140) can be sequentially formed on a substrate (100) on which protruding patterns (PRT) are formed.

A first conductive semiconductor layer (110), an active layer (120), and a second conductive semiconductor layer (130) on a substrate (100) can be sequentially formed using a growth method such as MOCVD (Metal-Organic Chemical Vapor Deposition), MBE (Molecular Beam Epitaxy), HVPE (Hydride Vapor Phase Epitaxy), or MOC (Metal-Organic Chloride).

The second layer (LY2) of the protruding patterns (PRT) includes SiO ₂ , and one side (102) of the substrate (100) exposed between the protruding patterns (PRT) includes sapphire, so that the first conductive semiconductor layer (110) can be grown from the one side (102) of the substrate (100) exposed between the protruding patterns (PRT). The first conductive semiconductor layer (110) can be grown upward so as to completely cover the side and upper surfaces of the protruding patterns (PRT). The first conductive semiconductor layer (110) can intentionally form first cavities (VD1) at positions corresponding to the side surfaces of each of the protruding patterns (PRT). The second cavities (VD2) can be created while the first conductive semiconductor layer (110) is grown.

Next, an ohmic layer (140) can be formed on the second challenge type semiconductor layer (130) through a chemical vapor deposition (CVD) process.

Referring to FIG. 7, a mesa structure (MS) can be formed by etching the ohmic layer (140), the second conductive semiconductor layer (130), and the active layer (120) to expose the first conductive semiconductor layer (110). Subsequently, the first conductive semiconductor layer (110) can be etched to expose the second region (AR2) of the substrate (100).

According to one embodiment, while etching the first conductive semiconductor layer (110), the protruding patterns (PRT1) covered by the first conductive semiconductor layer (110) in the first region (AR1) are not etched, but the second layers (LY2) of the protruding patterns (PR1) formed in the second region (AR2) can be etched.

For ease of explanation, the protruding patterns (PRT1, PRT2) may form first protruding patterns (PRT1) covered by the first conductive semiconductor layer (110) in the first region (AR1), and second protruding patterns (PRT2) arranged in the second region (AR2). The second protruding patterns (PRT2) may have a smaller height than each of the first protruding patterns (PRT1) due to etching (or formation of a mesa structure (MS)) of the first conductive semiconductor layer (110). According to one embodiment, the height of the second layer (LY2) of each of the first protruding patterns (PRT1) may be greater than the height of the second layer (LY2) of the second protruding pattern (PRT2).

In this embodiment, it is described that the first conductive semiconductor layer (110) is etched after forming the mesa structure (MS), but the mesa structure (MS) may be formed after etching the first conductive semiconductor layer (110). While etching the first conductive semiconductor layer (110), the protruding patterns (PRT2) of the second region (AR2) are etched, and while forming the mesa structure (MS), the protruding patterns (PRT2) of the second region (AR2) may be further etched.

Referring to FIG. 8, a first conductive pattern (CP1) that is in electrical contact with the first conductive semiconductor layer (110) exposed by the mesa structure (MS) and a second conductive pattern (CP2) that is in electrical contact with the ohmic layer (140) can be formed on the ohmic layer (140).

Referring to FIG. 9, an insulating film (DL) can be formed on a substrate (100) to cover a first conductive pattern (CP1), a second conductive pattern (CP2), a mesa structure (MS), and a first conductive semiconductor layer (110).

The insulating film (DL) may include a distributed Bragg reflector in which a plurality of SiO ₂ layers and a plurality of TiO ₂ layers are alternately laminated. In this case, the SiO ₂ layer in the insulating film (DL) may be formed by an e-beam.

According to one embodiment, the insulating film (DL) in the second region (AR2) can be bonded to the second layer (LY2) of each of the second protruding patterns (PRT2). As described above, the second layer (LY2) of each of the second protruding patterns (PRT2) includes SiO ₂ formed by PECVD, and the first layer of the insulating film (DL) in contact with the second layer (LY2) is a SiO ₂ layer formed by e-beam, so that two layers having the same physical properties can be in contact. Accordingly, although it is difficult to distinguish the interface between the second layer (LY2) and the insulating film (DL), since the second protruding patterns (PRT2) and the insulating film (DL) have the same physical properties at the contacting portions, the adhesion reliability can be improved. Accordingly, the problem of the insulating film (DL) being peeled off in a subsequent process can be prevented. In particular, since the second layer (LY2) of each of the second protruding patterns (PRT2) is formed by PECVD and has a high-density structure, adhesion to the insulating film (DL) can be improved.

Referring to FIG. 1b, by etching the insulating film (DL), a first hole exposing a first conductive pattern (CP1) and a second hole exposing a second conductive pattern (CP2) are formed, and then a first pad (PD1) electrically connected to the first conductive pattern (CP1) through the first hole and a second pad (PD2) electrically connected to the second conductive pattern (CP2) through the second hole can be formed.

Above, the embodiments of the present invention have been described with reference to the attached drawings, but those skilled in the art to which the present invention pertains will understand that the present invention can be implemented in other specific forms without changing the technical idea or essential features thereof. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive.

100: Substrate
PRT1, PRT2, PRT: Protrusion pattern
LY1-1, LY2-1, LY1: 1st floor
LY1-2, LY2-2, LY2: 2nd floor
110: 1st challenge type semiconductor layer
120: Active layer
130: Second challenge type semiconductor layer
140: Omic layer
MS: Mesa Structure

Claims (19)

A substrate having one side and a second side opposite to said one side;
A plurality of protruding patterns, which are arranged on one surface of the substrate and include a first layer comprising the same material as the material constituting the substrate, and a second layer comprising a different material from the material constituting the substrate on the first layer; and
A light emitting unit is disposed on a first region of the substrate on one surface of the substrate,
The second region of the substrate includes a region between the first region of the substrate and the outer periphery of the substrate,
The protruding pattern arranged in the first region of the above substrate is located between the substrate and the light-emitting portion,
The protruding pattern arranged in the second region of the above substrate is located on the outside of the light-emitting portion,
A light emitting element on one surface of the substrate, wherein the height of the protruding pattern arranged in the first area of the substrate and the height of the protruding pattern arranged in the second area of the substrate are different from each other. In the first paragraph,
A light emitting element in which the heights of the second layer of the protruding pattern arranged in the first area of the substrate and the second layer of the protruding pattern arranged in the second area of the substrate are different. In the first paragraph,
A light emitting element further comprising an insulating film extending from the light emitting portion to a second region of the substrate. In the third paragraph,
A light emitting element in which the protruding pattern arranged in the second region of the above substrate and the above insulating film are in contact. In the third paragraph,
The above insulating film is a light emitting element including a distributed Bragg reflector in which a plurality of silicon oxide layers and a plurality of titanium oxide layers are alternately laminated. In paragraph 5,
The second layer comprises silicon oxide,
The insulating film in contact with the second layer includes a first silicon oxide layer,
A light emitting element in which an integrated silicon oxide layer is formed on a first layer of a protruding pattern arranged in a second region of the above substrate. In Article 6,
The first silicon oxide layer of the above insulating film has a first thickness on the substrate,
A light emitting element in which a second thickness obtained by subtracting the first thickness from the integrated silicon oxide layer is the height of the second layer of the protruding pattern in the second region of the substrate. In Article 7,
A light emitting element in which the height of the second layer of the protruding pattern arranged in the first region of the substrate is greater than the height of the second layer of the protruding pattern arranged in the second region of the substrate. In the first paragraph,
Each of the above protruding patterns is a light emitting element having a width that narrows as it moves away from the substrate. In the first paragraph,
A light emitting element in which each of the above protruding patterns has a circular cross-section, converges to a single vertex, and has curved side walls. In the first paragraph,
The above light-emitting portion is a light-emitting element including a first void formed in contact with the first layer at the interface between the first and second layers. In Article 11,
A light emitting element, wherein the light emitting portion further includes a second cavity created between the cavities and the substrate and having a smaller size than the first cavity. In the first paragraph,
The second layer is a light emitting element having a lower refractive index than the first layer. In the first paragraph,
A light emitting element in which each of the second layers of the above protruding patterns comprises silicon oxide formed by a plasma enhanced chemical vapor deposition process. A substrate having one side and a second side opposite to said one side;
A plurality of protruding patterns, each of which is arranged on one surface of the substrate and includes a first layer comprising the same material as a material constituting the substrate, and a second layer comprising a different material from the material constituting the substrate on the first layer;
A first light-emitting cell arranged in a first region of the substrate on one surface of the substrate; and
A second light-emitting cell is disposed in a second region of the substrate on one surface of the substrate,
The third region of the substrate includes a region between the first and second regions of the substrate and a region between each of the first and second regions of the substrate and an outer periphery of the substrate,
The protruding pattern arranged in the first region of the substrate is located between the substrate and the first light-emitting cell,
The protruding pattern arranged in the second region of the substrate is located between the substrate and the second light-emitting cell,
The protruding pattern arranged in the third region of the above substrate is located outside the first and second light-emitting cells,
A light emitting element, wherein the height of each of the protruding patterns arranged in the first and second regions of the substrate on one surface of the substrate is different from the height of the protruding pattern arranged in the third region of the substrate. In Article 15,
A light emitting element in which the second layer of protruding patterns arranged in each of the first and second regions of the substrate and the second layer of protruding patterns arranged in the third region of the substrate have different heights. In Article 15,
A light emitting element further comprising an insulating film extending to a third region of the substrate on the first and second light emitting cells. In Article 17,
A light emitting element in which the protruding pattern arranged in the third region of the above substrate and the above insulating film are in contact. In Article 17,
The above insulating film is a light emitting element including a distributed Bragg reflector in which a plurality of silicon oxide layers and a plurality of titanium oxide layers are alternately laminated.

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