KR102653003B1 - Semiconductor device - Google Patents

Abstract

A semiconductor device according to an embodiment of the present invention includes a first semiconductor layer, a well layer, and a barrier layer, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, and the second semiconductor. It includes an electron blocking layer disposed on the electron blocking layer and a third semiconductor layer disposed on the electron blocking layer, wherein the electron blocking layer includes a first electron blocking layer and a second semiconductor layer sequentially disposed on the second semiconductor layer. It includes an electron blocking layer and a third electron blocking layer, and the second electron blocking layer is doped with a p-type dopant and indium (In).

Description

Semiconductor device {SEMICONDUCTOR DEVICE}

The present invention relates to semiconductor devices. More specifically, it relates to semiconductor devices with improved light output and brightness.

Semiconductor devices containing compounds such as GaN and AlGaN have many advantages, such as having a wide and easily adjustable band gap energy, so they can be used in a variety of ways, such as light emitting devices, light receiving devices, and various diodes.

In particular, light emitting devices such as light emitting diodes and laser diodes using nitride semiconductor materials can realize various colors such as red, green, blue, and ultraviolet rays through the development of thin film growth technology and device materials. By using fluorescent materials or combining colors, efficient white light can be realized, and compared to existing light sources such as fluorescent lights and incandescent lights, it has the advantages of low power consumption, semi-permanent lifespan, fast response speed, safety, and environmental friendliness.

In addition, when light-receiving devices such as photodetectors or solar cells are manufactured using nitride semiconductor materials, the development of device materials absorbs light in various wavelength ranges to generate photocurrents, thereby generating photocurrents in various wavelength ranges from gamma rays to radio wavelengths. Light can be used. In addition, it has the advantages of fast response speed, safety, environmental friendliness, and easy control of device materials, so it can be easily used in power control, ultra-high frequency circuits, or communication modules.

Therefore, semiconductor devices can replace the transmission module of optical communication means, the light emitting diode backlight that replaces the cold cathode fluorescence lamp (CCFL) that constitutes the backlight of LCD (Liquid Crystal Display) display devices, and fluorescent or incandescent light bulbs. Applications are expanding to white light-emitting diode lighting devices, automobile headlights, traffic lights, and sensors that detect gas or fire, and can also be expanded to high-frequency application circuits, other power control devices, and communication modules.

On the other hand, since the light emitted from the light emitting layer of the semiconductor device used as the light source of the lighting device is isotropic, it is irradiated to the inside of the substrate for crystal growth and is emitted from the back and sides of the substrate. In this case, among the light irradiated inside the substrate, the light whose incident angle at the interface with the air layer is greater than the critical angle is totally reflected at the interface, is trapped inside the substrate, and cannot be emitted outside the substrate, causing a decrease in luminance of the semiconductor device. In addition, nitride semiconductor devices have relatively low hole injection efficiency using dopants, making it difficult to improve luminance. In order to solve this problem, when the doping amount of the dopant is increased, the film quality of the doped layer deteriorates, leading to a problem that the optical characteristics and optical output of the semiconductor device deteriorate. The present invention was proposed to solve this problem.

The technical problem to be solved by the present invention is to provide a semiconductor device with improved optical characteristics and optical output by improving hole injection efficiency without increasing the amount of dopant doped into the semiconductor device.

The technical problems of the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the description below.

A semiconductor device according to an embodiment of the present invention includes a first semiconductor layer, a well layer, and a barrier layer, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, and the second semiconductor. It includes an electron blocking layer disposed on the electron blocking layer and a third semiconductor layer disposed on the electron blocking layer, wherein the electron blocking layer includes a first electron blocking layer and a second semiconductor layer sequentially disposed on the second semiconductor layer. It includes an electron blocking layer and a third electron blocking layer, and the second electron blocking layer may be doped with a p-type dopant and indium (In).

Indium (In) of the second electron blocking layer may be doped at a composition ratio of 1.5% or more and 3.5% or less.

The second electron blocking layer may include a 2-1 electron blocking layer and a 2-2 electron blocking layer sequentially disposed on the first electron blocking layer.

The p-type dopant and indium (In) may be doped into the 2-1 electron blocking layer.

The 2-1 electron blocking layer may be grown in a temperature range of 660°C or higher to 735°C or lower.

The p-type dopant of the 2-1 electron blocking layer may be doped in a concentration range of 1.35E+20 atoms/cm ³ or more to 1.65E+20 atoms/cm ³ or less.

The first electron blocking layer and the 2-2 electron blocking layer may be grown at a temperature range that is 100°C or more higher than the 2-1 electron blocking layer.

The second semiconductor layer and the first electron blocking layer may be doped with a p-type dopant at a lower concentration than the 2-1 electron blocking layer.

The active layer may have a multi quantum well (MQW) structure.

The p-type dopant doped in the second semiconductor layer may be doped up to the last well layer region of the multiple quantum well.

According to an embodiment of the present invention, the concentration of the p-type dopant doped in a specific layer can be increased by doping a specific layer of the electron blocking layer of a semiconductor device with a p-type dopant and indium (In).

In addition, by doping a specific layer with a high concentration of p-type dopant, hole injection efficiency is improved, which has the effect of increasing optical output and optical characteristics.

The effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description below.

1 is a conceptual diagram of a semiconductor device according to an embodiment of the present invention.
Figure 2 is a conceptual diagram of an electron blocking layer of a semiconductor device according to an embodiment of the present invention.
Figure 3 is a conceptual diagram showing a second electron blocking layer among the electron blocking layers of a semiconductor device according to an embodiment of the present invention.
Figure 4 is a conceptual diagram of a third electron blocking layer of a semiconductor device according to an embodiment of the present invention.
Figure 5 is a conceptual diagram of an active layer of a semiconductor device according to an embodiment of the present invention.
Figure 6 is a conceptual diagram of a third semiconductor layer of a semiconductor device according to an embodiment of the present invention.
Figure 7 is a graph showing the analysis results of conventional semiconductor devices by time-of-flight secondary ion mass spectrometry (TOF-SIMS).
Figure 8 is a graph showing the results of analysis by time-of-flight secondary ion mass spectrometry (TOF-SIMS) of a semiconductor device according to an embodiment of the present invention.

Hereinafter, details regarding the above-described purpose and technical configuration of the present invention and its operational effects will be more clearly understood through the detailed description below.

In the description of the present invention, terms such as first, second, etc. used hereinafter are merely identifiers to distinguish the same or corresponding components, and the same or corresponding components are referred to as first, second, etc. It is not limited by .

Singular expressions include plural expressions unless the context clearly dictates otherwise. Terms such as “includes” or “has” are intended to designate the presence of features, numbers, steps, operations, components, parts, or combinations thereof described in the specification, and include one or more other features, numbers, or steps. , operations, components, parts, or combinations thereof can be interpreted as being added.

As used hereinafter, “comprises” and/or “comprising” refers to the presence or absence of one or more other components, steps, operations and/or elements. Addition is not ruled out.

In the description of the present invention, each layer (film), region, pattern or structure is “on” or “under” the substrate, each layer (film), region, pad or pattern. The description of being formed in "includes being formed directly or through another layer. The standards for top/top or bottom/bottom of each floor are explained based on the drawing.

Hereinafter, the semiconductor device 10 according to an embodiment of the present invention will be described in detail with reference to the attached drawings.

Figure 1 is a conceptual diagram of a semiconductor device 10 according to an embodiment of the present invention.

Referring to FIG. 1, the semiconductor device 10 according to an embodiment of the present invention includes a first semiconductor layer 100, an active layer 200, a second semiconductor layer 300, an electron blocking layer 400, and a third Includes a semiconductor layer 500.

The first semiconductor layer 100 may be implemented with a compound semiconductor such as group III-V or group II-VI, and the first semiconductor layer 100 may be doped with a first dopant. The first semiconductor layer 100 is a semiconductor material having a composition formula of In _x Al _y Ga _{1 -x- y} N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), for example It can be selected from GaN, AlGaN, InGaN, InAlGaN, etc. Meanwhile, the first dopant may be an n-type dopant such as Si, Ge, Sn, Se, or Te. If the first dopant is an n-type dopant, the first semiconductor layer 100 may be an n-type semiconductor layer.

The active layer 200 may be disposed on the first semiconductor layer 100 . The active layer 200 is a layer where electrons (or holes) injected through the first semiconductor layer 100 and holes (or electrons) injected through the third semiconductor layer 500 meet. In the active layer 200, electrons and As holes recombine, they transition to a lower energy level and generate light with a corresponding wavelength.

The active layer 200 may have any one of a single well structure, a multi-well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, or a quantum wire structure, but is not limited thereto. . The active layer 200 can generate light in the ultraviolet wavelength range.

When the active layer 200 is formed in a well structure, the well layer/barrier layer of the active layer 200 is InGaN/GaN, InGaN/InGaN, GaN/AlGaN, InAlGaN/GaN, GaAs(InGaAs)/AlGaAs, GaP(InGaP) /AlGaP may be formed in one or more pair structures, but is not limited thereto. The well layer may be formed of a material having a band gap smaller than that of the barrier layer.

The second semiconductor layer 300 is In _x Al _y Ga _{1 -x- y} P (0≤x≤1, 0≤y≤1, 0≤x+y≤1) or In _x Al _y Ga _1-xy N Semiconductor materials having a composition formula of (0≤x≤1, 0≤y≤1, 0≤x+y≤1), such as AlGaP, InGaP, AlInGaP, InP, GaN, InN, AlN, InGaN, AlGaN, It can be selected from InAlGaN, AlInN, AlGaAs, InGaAs, AlInGaAs, GaP, etc.

Meanwhile, the second semiconductor layer 300 may be doped with a second dopant, and Mg, Zn, Ca, Sr, Ba, etc. may be doped as the second dopant.

An electron blocking layer (EBL) 400 may be disposed on the second semiconductor layer 300 . The electron blocking layer 400 blocks the flow of electrons supplied from the first semiconductor layer 100 to the third semiconductor layer 500, thereby increasing the probability of electrons and holes recombining within the active layer 200. there is. The energy band gap of the electron blocking layer 400 may be larger than that of the active layer 200 and/or the third semiconductor layer 500.

The electron blocking layer 400 is made of a semiconductor material having the composition formula In _x Al _y Ga _{1 -x- y} N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), for example, AlGaN. , InGaN, InAlGaN, etc., but is not limited thereto. Additionally, the electron blocking layer 400 may be doped with a second dopant.

The third semiconductor layer 500 may be disposed on the electron blocking layer 400. The third semiconductor layer 500 may be implemented with a compound semiconductor of group III-V, group II-VI, etc., In _x Al _y Ga _{1 -x- y} N (0≤x≤1, 0≤y≤1 , 0≤x+y≤1) or a semiconductor material selected from AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. The third semiconductor layer 500 may be doped with a second dopant, and when the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, Ba, etc., the third semiconductor layer 500 may be a p-type semiconductor layer. You can. FIG. 2 is a conceptual diagram of the electron blocking layer 400 of the semiconductor device 10 according to an embodiment of the present invention. Referring to FIG. 2, the electron blocking layer 400 of the semiconductor device 10 according to an embodiment of the present invention. 400 includes a first electron blocking layer 410, a second electron blocking layer 420, and a third electron blocking layer 430.

The first electron blocking layer 410 may be disposed on the second semiconductor layer 300. The first electron blocking layer 410 may include AlGaN, and the Al content may be 29% or more and 33% or less. If the Al content is less than 29%, it may be difficult to form a high energy band gap between the active layer 200 and the third semiconductor layer 500, and if it exceeds 33%, the resistance increases, making it difficult to inject sufficient current. Because you can.

The first electron blocking layer 410 contains a p-type dopant of 4.18E+19 atoms/cm ³ or more to 4.62E+19 atoms/cm ³ It can be doped in the following concentration range. If the doping concentration of the p-type dopant is less than 4.18E+19 atoms/cm ³ , there may be loss of the p-type dopant doped in the 2-1 electron blocking layer 421, which will be described later, and the doping concentration is 4.62E+19 atoms/cm. This is because if it exceeds ³ , device characteristics may deteriorate due to over-ping.

As the first electron blocking layer 410 has the above-described composition, a high energy band gap is formed between the active layer 200 and the third semiconductor layer 500, so that electrons supplied from the first semiconductor layer 100 are transmitted to the third semiconductor layer 100. The flow out of the semiconductor layer 500 can be effectively blocked.

Meanwhile, the first electron blocking layer 410 can be grown at a temperature range of 860°C or higher to 960°C or lower, and when grown at a temperature below this range, it may be grown in the 2-1 electron blocking layer 421, which will be described later. The doped p-type dopant moves toward the first electron blocking layer 410, making it impossible to dope the 2-1 electron blocking layer 421 with a high concentration of p-type dopant, and when grown at a temperature exceeding the above range, It may be difficult to achieve the target thickness you want to grow.

As described above, the electron blocking layer 400 includes the first electron blocking layer 410, the second electron blocking layer 420, and the third electron blocking layer (420) sequentially stacked on the first electron blocking layer 410 ( 430).

The second electron blocking layer 420 will be described with reference to FIG. 3, and the third electron blocking layer 430 will be described later with reference to FIG. 4.

Figure 3 is a conceptual diagram showing the second electron blocking layer 420 included in the electron blocking layer 400 of the semiconductor device 10 according to an embodiment of the present invention. Referring to Figure 3, the second electron blocking layer 420 includes a 2-1st electron blocking layer 421 and a 2-2electron blocking layer 423 sequentially disposed on the first electron blocking layer 410.

The 2-1 electron blocking layer 421 may include InAlGaN, and the Al content may be 3.8% or more and 4.2% or less. If Al is included in less than 3.8%, a light absorption problem may occur, If it exceeds 4.2%, current injection efficiency may decrease due to increased resistance.

The 2-1st electron blocking layer 421 is a layer doped with indium (In) and a p-type dopant. As indium (In) and p-type dopant are doped together, the injection efficiency of gallium (Ga), another group 3 element, decreases due to indium, and since the p-type dopant fills the vacancy of gallium, the injection efficiency of the p-type dopant increases. This can be improved.

Conventionally, a method of excessively doping p-type dopant was used to improve p-type dopant injection efficiency. However, in the case of excessive doping of the p-type dopant like this, the film quality deteriorates due to the high concentration of the p-type dopant, thereby deteriorating the optical characteristics. Additionally, when the p-type dopant is doped above the critical concentration, there is a problem of lowering the hole concentration due to a self-compensation effect.

Accordingly, in one embodiment of the present invention, an attempt is made to solve the above-mentioned problem by doping the 2-1 electron blocking layer 421 with a p-type dopant and indium.

When doping a p-type dopant and indium together, the injection efficiency of the p-type dopant can be improved as described above, and there is no need to over-dop the p-type dopant, thereby improving film quality. In addition, since the ionization energy of the p-type dopant is reduced due to the surface activity of indium, the ratio of the p-type dopant acting as a carrier is more than doubled.

At this time, the content of indium to be doped may be 1.5% or more to 3.5% or less. The reason for limiting the minimum content is that when doped below the minimum content, the effect of improving the injection efficiency of the p-type dopant due to indium is minimal, so the light This is because there is no improvement in characteristics and light output. In addition, even if the indium content exceeds 3.5%, the light output may decrease, so it is preferable that the indium content is 1.5% or more and 3.5% or less.

The 2-1 electron blocking layer 421 may be doped with a p-type dopant at a concentration of 1.35E+20 atoms/cm ³ or more and 1.65+20 atoms/cm ³ or less. If the doping concentration is less than the above range, it is difficult to improve the luminance of the semiconductor device 10, and if the doping concentration exceeds the above range, a light absorption problem may occur due to overdoping.

The concentration of the p-type dopant doped into the 2-1st electron blocking layer 421 is higher than that of the first electron blocking layer 410. This is because the 2-1 electron blocking layer 421, unlike the two adjacent layers, is grown at a low temperature range of 660°C or higher to 735°C or lower, and as such, a high concentration of p-type is present in the 2-1 electron blocking layer 421. By being doped with a dopant, the brightness of the semiconductor device according to an embodiment of the present invention may be improved.

While there is an advantage in enhancing hole injection by doping the 2-1 electron blocking layer 421 with a high concentration of p-type dopant, problems such as light absorption and increased operating voltage may occur due to deterioration of film quality. This can be solved by improving the film quality of the 2-2 electron blocking layer 423 adjacent to the 2-1 electron blocking layer 421 at a high temperature range of 900°C or higher to 990°C or lower. At this time, when grown below the above temperature range, the effect of improving the film quality of the 2-1 electron blocking layer 421 is minimal, and when grown above the above temperature range, there is a problem in that the film quality rapidly deteriorates.

The 2-2nd electron blocking layer 423 may include AlGaN, and the Al content may be 3.8% or more and 4.2% or less. If the Al content is less than the above range, there is a problem of light absorption, and if the Al content exceeds the above range, current injection efficiency may decrease.

Meanwhile, the first electron blocking layer 410 may have a thickness of 2.38 nm or more and 2.63 nm or less, and the 2-1 electron blocking layer 421 and the 2-2 electron blocking layer 423 may each have a thickness of 10 nm. It may be more than or equal to 13.1 nm. If the thickness of each layer is less than the minimum range, the electron blocking efficiency may decrease, and if it exceeds the maximum range, the operating voltage may increase.

Next, the third electron blocking layer 430 will be described with reference to FIG. 4 .

Figure 4 is a conceptual diagram of the third electron blocking layer 430 of the semiconductor device 10 according to an embodiment of the present invention.

The third electron blocking layer 430 is composed of AlGaN layers (431-1, 431-2, ..., 431-n) and GaN (432-1, 432-2, ..., 432-n) layers. It may include a pair, may include a superlattice structure with a plurality of pairs, and may be composed of about 12 pairs, but is not limited thereto.

At this time, the AlGaN layer and GaN layer constituting each pair may each have a thickness of 0.8 nm or more and 1.05 nm or less. If the thickness of each layer is less than 0.8 nm, it may be difficult to prevent excessive flow of electrons, and if the thickness of each layer exceeds 1.05 nm, the thickness of the third electron blocking layer 430 becomes thick and the resistance increases. This is because problems may arise.

The AlGaN layer and GaN layer constituting each pair may be grown in a temperature range of 900°C or higher and 990°C or lower, respectively. If grown at a temperature below 900°C, the growth time may be long to obtain the desired thickness, and if grown at a temperature exceeding 990°C, the film quality may deteriorate.

When the pair consists of 12, the pair is divided into four groups, and the AlGaN layer of the first group in the order adjacent to the 2-2 electron blocking layer 423 is Al having a concentration range of 24.7% or more and 27.3% or less. may include, the second group of AlGaN layers may include Al having a concentration range of 27.6% to 30.5%, and the third group of AlGaN layers may have a concentration range of 21.9% to 24.2%. The AlGaN layer of the fourth group may include Al with a concentration range of 15.2% or more to 16.8% or less.

By adjusting the Al concentration of the AlGaN layer constituting the pair as above, excessive flow of electrons can be prevented and the consumption of hole carriers due to non-radiative recombination can be reduced, thereby improving light efficiency. In addition, since diffusion of holes becomes easier by lowering the effective potential of holes, hole injection efficiency can be improved. On the other hand, if the concentration of the AlGaN layer of each group is outside the above-mentioned range, the difference in Al concentration with other adjacent groups may be small, so the improvement in light efficiency and hole injection efficiency may be minimal, so caution is required.

Figure 5 is a conceptual diagram of the active layer 200 included in the semiconductor device 10 according to an embodiment of the present invention.

Referring to FIG. 5, the active layer 200 included in the semiconductor device 10 according to an embodiment of the present invention is a multi quantum well (MQW) in which well layers 211 and 221 and barrier layers 213 are alternately arranged. :Multi Quantum Well) structure and includes an outermost barrier layer (LQB: Last quantum barrier, 223) in a portion adjacent to the second semiconductor layer 300.

The outermost barrier layer 223 is made of GaN and can be grown in a temperature range of 830°C or higher to 920°C or lower.

The outermost barrier layer 223 is located on the outermost side of the multi-quantum well and serves as a barrier layer. It is formed thicker than before with a thickness of 8.6 nm or more and 9.5 nm or less, and is a p-type distributed in the multi-quantum well. Hole injection into the multi-quantum well can be enhanced by effectively preventing rediffusion of the dopant in the direction of the third semiconductor layer 500. Additionally, the outermost barrier layer 223 also serves to prevent the well layers 211 and 221 from being damaged by heat.

At this time, the p-type dopant distributed in the multiple quantum well may be supplied from the second semiconductor layer 300.

The second semiconductor layer 300 may include GaN and provides a p-type dopant for hole injection into the multiple quantum well. The p-type dopant may be doped in a concentration range of 1.20E+20 atoms/cm ³ or more and 1.49E+20 atoms/cm ³ or less. If the doping concentration is less than 1.20E+20 atoms/cm ³ , the brightness improvement effect is minimal due to insufficient hole injection into the multi-quantum well. If the doping concentration exceeds 1.49E+20 atoms/cm ³ , excessive doping occurs. This is because problems with membrane quality deterioration may occur.

At this time, the concentration of the p-type dopant doped into the second semiconductor layer 300 is lower than that doped into the 2-1 electron blocking layer 421.

Meanwhile, the second semiconductor layer 300 may be grown in a temperature range of 830°C or higher to 920°C or lower.

At this time, the thickness of the second semiconductor layer 300 may be 4.75 nm or more and 5.25 nm or less. If the thickness is less than 4.75 nm, there is no effect of improving the deterioration of low-power characteristics, and if it exceeds 5.25 nm, resistance increases. This is because current efficiency may decrease.

Figure 6 is a conceptual diagram of the third semiconductor layer 500 of a semiconductor device according to an embodiment of the present invention.

The third semiconductor layer 500 includes GaN and can be grown at a temperature range of 970°C or higher to 1080°C or lower. If the growth temperature is less than 970°C, hole injection efficiency decreases, and if it exceeds 1080°C, deterioration of other layers may occur.

The third semiconductor layer 500 may be formed of a plurality of layers, and preferably may be formed of three layers. In this case, the 3-1 semiconductor layer 510, the 3-2 semiconductor layer 520, and the 3-3 semiconductor layer 530 may be disposed in the order adjacent to the third electron blocking layer 430. .

The 3-1 semiconductor layer 510 improves the film quality of the 3-2 semiconductor layer 520, which will be described later, and is a layer through which holes diffuse, and has a thickness of 38 nm or more and 52.5 nm or less. This is because if the thickness is less than 38 nm, the hole diffusion efficiency may decrease, and if the thickness exceeds 52.5 nm, the problem of increased resistance may occur.

The 3-2 semiconductor layer 520 is a layer into which holes are substantially injected in the third semiconductor layer 500, and has a thickness of 6 nm or more to 9.45 nm or less, and 6.9E+19 atoms/cm ³ or more to 7.7 nm. It may be doped with a p-type dopant having a concentration of E+19 atoms/cm ³ or less.

The 3-3 semiconductor layer 530 is a layer into which holes are injected together with the 3-2 semiconductor layer 520, has a thickness of 0.95 nm or more and 1.05 nm or less, and contains a p-type dopant of 2.1E+20 atoms/. It may be doped at a concentration of cm ³ or more to 2.4E+20 atoms/cm ³ or less.

If the thickness of the 3-2 semiconductor layer 520 and 3-3 semiconductor layer 530 is less than the above-mentioned range, hole injection efficiency may decrease, and if it exceeds the above-described range, a problem of increased resistance may occur.

In addition, hole injection efficiency can be improved by varying the concentration of the p-type dopant doped into the 3-2 semiconductor layer 520 and the 3-3 semiconductor layer 530, so that the p-type dopant is within the concentration range described above. It may be advantageous to be doped in .

Meanwhile, as described above, the injection efficiency of the p-type dopant can be improved by doping the 2-1 electron blocking layer 421 with indium and a p-type dopant, and the ratio of the p-type dopant acting as a carrier is doubled. It has an increasing effect.

Vf ₃ (V) Po(mW) WPE(%) EQE(%) Comparison example 1 2.79 107.8 59.4 59.7 Example 1 2.79 109.2 60.2 60.5

Table 1 shows the results of measuring the electrical and optical properties of Comparative Example 1 and Example 1 when a current of 65 mA was supplied. Here, in Comparative Example 1, the 2-1 electron blocking layer 421 is an AlGaN layer and doped only with a p-type dopant without indium doping, and in Example 1, the AlGaN layer is doped with indium and a p-type dopant. Looking at Table 1, Comparative Example 1 and Example 1 have the same operating voltage (Vf ₃ ), but the optical output (Po), photoelectric conversion efficiency (WPE), and internal quantum efficiency (EQE) of Example 1 are higher. It can be seen that the electrical and optical properties of Example 1 were further improved. This is interpreted to be because the injection efficiency of the p-type dopant and the ratio of the p-type dopant acting as a carrier increased due to the action of indium as described above.

Accordingly, it was confirmed that the electrical and optical properties of the semiconductor device were improved by doping the 2-1 electron blocking layer 421 with indium and p-type dopant.

Indium composition ratio (%) Po ₁ (mW) Po ₂ (mW) △Po Example 2 2.5 108.4 234.1 233.1 Comparison example 2 5 106.7 230.7 229.7 Comparison example 3 10 107.4 231.1 230.1

Table 2 shows the measured light output according to the composition ratio of indium doped into the 2-1 electron blocking layer 421. Among the measurement items, Po ₁ is the optical output when a current of 65mA is supplied, Po ₂ means the optical output when a current of 150mA is supplied, and △Po is the optical output change rate, i.e. (Po ₂ -Po ₁ ) This value represents /Po _1. Looking at Table 2, when the indium composition ratio is 2.5%, the values of Po ₁ , Po ₂ , and △Po appear the highest. On the other hand, when the indium composition ratio is 5% and 10%, which is higher than 2.5%, the values of Po ₁ , Po ₂ and △Po decrease, so it can be seen that the optical characteristics of the semiconductor device deteriorate as the doping amount of indium increases.

Therefore, the preferred doping amount of indium that can improve the optical characteristics of semiconductor devices is 1.5% or more and 3.5% or less.

Meanwhile, Figure 7 is a graph showing the analysis results of conventional semiconductor devices by secondary ion mass spectrometry (TOF-SIMS).

Conventionally, when manufacturing a nitride semiconductor device, a large amount of p-type dopant with poor doping efficiency was doped to dope the multi-quantum well region. However, when the amount of p-type dopant is increased to increase doping efficiency, separation of the p-type dopant occurs, which increases the operating voltage, and not only does light absorption occur due to overdoping of the p-type dopant, but also the p-type dopant There was a problem in that crystal defects occurred due to reverse diffusion, resulting in deterioration of the characteristics of the semiconductor device.

When the doping amount of the p-type dopant is increased, as shown in FIG. 7, the concentration of the p-type dopant doped in the multi-quantum well region (180 nm to 240 nm) is low, and starting from the third semiconductor layer 500 doped with the p-type dopant, the Since the concentration of the p-type dopant is maintained at a high concentration in the area adjacent to the quantum well, that is, from 0 nm to about 180 nm, the characteristics of the semiconductor device may deteriorate.

Figure 8 is a graph showing the analysis results of the semiconductor device 10 according to an embodiment of the present invention by secondary ion mass spectrometry (TOF-SIMS).

Referring to FIG. 8, the semiconductor device 10 according to an embodiment of the present invention has a p-type dopant concentration profile in a region adjacent to the second semiconductor layer 300 of the active layer 200 located in a depth range of 94.5 nm to 210 nm. There is a peak. At this time, the concentration of the p-type dopant doped in the active layer 200 is maintained higher than that of the conventional semiconductor device, and the p-type dopant is doped up to the last well layer region of the multiple quantum well, so the optical output and operating voltage of the semiconductor device are improved. It can be.

In addition, there is a lowest point of the peak in the second electron blocking layer 420 located in the range of 64 nm to 87 nm, and from this lowest point to the third electron blocking layer 430 in the range of about 45 nm to 64 nm, p has a concentration similar to the lowest point. A type dopant exists, but the concentration of the p-type dopant in the thickness direction has a constant concentration profile. Here, 'constant' means that the change in concentration in the thickness direction is small, and there is no significant peak.

Therefore, since the total concentration of p-type dopant doped in the semiconductor device 10 is formed to be low, the problem of crystal defects due to overdoping of p-type dopant is resolved, and the problems of increased operating voltage and deteriorated device characteristics can be improved. .

As previously described, this concentration profile can be obtained by growing the 2-1 electron blocking layer 421 at a relatively low temperature compared to the two adjacent layers. However, because this growth temperature difference causes a doping delay of the p-type dopant or a dopant diffusion phenomenon, the actual concentration peak exists in an area adjacent to the second semiconductor layer 300 of the active layer 200.

The embodiment of the present invention described above is not limited to the above-described embodiment and the accompanying drawings, and various substitutions, modifications, and changes are possible within the scope of the technical spirit of the embodiment. It will be clear to those skilled in the art to which an embodiment belongs.

10: Semiconductor device
100: first semiconductor layer
200: active layer
211, 221: Well layer
213: barrier layer
223: Outermost barrier layer
300: second semiconductor layer
400: Electronic blocking layer
410: first electron blocking layer
420: second electron blocking layer
421: 2-1 electron blocking layer
423: 2-2 electron blocking layer
430: Third electron blocking layer
500: Third semiconductor layer

Claims (9)

In semiconductor devices,
first semiconductor layer;
an active layer disposed on the first semiconductor layer including a well layer and a barrier layer;
a second semiconductor layer disposed on the active layer;
an electron blocking layer disposed on the second semiconductor layer; and
a third semiconductor layer disposed on the electron blocking layer;
Including,
The electron blocking layer is,
It includes a first electron blocking layer, a second electron blocking layer, and a third electron blocking layer sequentially disposed on the second semiconductor layer,
The second electron blocking layer is doped with a p-type dopant and indium (In),
The second electron blocking layer includes an indium layer having a concentration peak of indium (In) in the second electron blocking layer,
In the second electron blocking layer, the concentration peak of the P-type dopant does not overlap with the concentration peak of the indium (In) based on the thickness of the semiconductor device,
A semiconductor device wherein the concentration peak of the p-type dopant is located in a region closer to the second semiconductor layer compared to the indium layer.
delete delete According to paragraph 1,
The second electron blocking layer includes a 2-1 electron blocking layer and a 2-2 electron blocking layer sequentially disposed on the first electron blocking layer,
A semiconductor device in which the p-type dopant and indium (In) are doped into the 2-1 electron blocking layer.
delete According to paragraph 4,
A semiconductor device in which the p-type dopant of the 2-1 electron blocking layer is doped in a concentration range of 1.35E+20 atoms/cm3 or more to 1.65E+20 atoms/cm3 or less.
delete According to paragraph 4,
The 2-1 electron blocking layer is a semiconductor device grown at a temperature of 660°C or higher and 735°C or lower.

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